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Searched defs:LdSt (Results 1 – 13 of 13) sorted by relevance

/external/llvm/lib/Target/Lanai/
DLanaiInstrInfo.cpp751 MachineInstr &LdSt, unsigned &BaseReg, int64_t &Offset, unsigned &Width, in getMemOpBaseRegImmOfsWidth()
788 MachineInstr &LdSt, unsigned &BaseReg, int64_t &Offset, in getMemOpBaseRegImmOfs()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/
DLanaiInstrInfo.cpp754 MachineInstr &LdSt, unsigned &BaseReg, int64_t &Offset, unsigned &Width, in getMemOpBaseRegImmOfsWidth()
791 MachineInstr &LdSt, unsigned &BaseReg, int64_t &Offset, in getMemOpBaseRegImmOfs()
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.cpp1538 MachineInstr &LdSt, unsigned &BaseReg, int64_t &Offset, in getMemOpBaseRegImmOfs()
1573 MachineInstr &LdSt, unsigned &BaseReg, int64_t &Offset, unsigned &Width, in getMemOpBaseRegImmOfsWidth()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64InstrInfo.cpp2105 MachineInstr &LdSt, unsigned &BaseReg, int64_t &Offset, in getMemOpBaseRegImmOfs()
2112 MachineInstr &LdSt, unsigned &BaseReg, int64_t &Offset, unsigned &Width, in getMemOpBaseRegImmOfsWidth()
/external/llvm/lib/Target/AMDGPU/
DSIInstrInfo.cpp205 bool SIInstrInfo::getMemOpBaseRegImmOfs(MachineInstr &LdSt, unsigned &BaseReg, in getMemOpBaseRegImmOfs()
/external/llvm/lib/Target/Hexagon/
DHexagonInstrInfo.cpp2942 bool HexagonInstrInfo::getMemOpBaseRegImmOfs(MachineInstr &LdSt, in getMemOpBaseRegImmOfs()
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMISelDAGToDAG.cpp941 LSBaseSDNode *LdSt = cast<LSBaseSDNode>(Op); in SelectAddrMode6Offset() local
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonInstrInfo.cpp2886 bool HexagonInstrInfo::getMemOpBaseRegImmOfs(MachineInstr &LdSt, in getMemOpBaseRegImmOfs()
/external/llvm/lib/Target/ARM/
DARMISelDAGToDAG.cpp1133 LSBaseSDNode *LdSt = cast<LSBaseSDNode>(Op); in SelectAddrMode6Offset() local
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMISelDAGToDAG.cpp1006 LSBaseSDNode *LdSt = cast<LSBaseSDNode>(Op); in SelectAddrMode6Offset() local
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSIInstrInfo.cpp267 bool SIInstrInfo::getMemOpBaseRegImmOfs(MachineInstr &LdSt, unsigned &BaseReg, in getMemOpBaseRegImmOfs()
/external/swiftshader/third_party/subzero/src/
DIceTargetLoweringMIPS32.cpp5363 const Inst *LdSt, in formAddressingMode()
DIceTargetLoweringARM32.cpp5763 const Inst *LdSt, in formAddressingMode()