| /external/vixl/examples/aarch64/ |
| D | simulated-runtime-calls.cc | 68 __ Lsl(w0, w0, 2); in GenerateRuntimeCallExamples() local
|
| /external/v8/src/arm64/ |
| D | macro-assembler-arm64-inl.h | 741 void TurboAssembler::Lsl(const Register& rd, const Register& rn, in Lsl() function
748 void TurboAssembler::Lsl(const Register& rd, const Register& rn, in Lsl() function
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| /external/vixl/src/aarch64/ |
| D | macro-assembler-aarch64.h | 1904 void Lsl(const Register& rd, const Register& rn, unsigned shift) { in Lsl() function
1911 void Lsl(const Register& rd, const Register& rn, const Register& rm) { in Lsl() function
|
| /external/v8/src/builtins/arm64/ |
| D | builtins-arm64.cc | 2275 __ Lsl(counter, bound_argc, kPointerSizeLog2); in Generate_PushBoundArguments() local
2995 __ Lsl(result, mantissa, exponent); in Generate_DoubleToI() local
|
| /external/vixl/test/aarch32/ |
| D | test-assembler-aarch32.cc | 783 __ Lsl(r3, r1, 4); in TEST() local
807 __ Lsl(r3, r1, r9); in TEST() local
2795 __ Lsl(r4, r3, 28); in TEST() local
|
| /external/vixl/test/aarch64/ |
| D | test-assembler-aarch64.cc | 10036 __ Lsl(x16, x0, x1); in TEST() local
10037 __ Lsl(x17, x0, x2); in TEST() local
10038 __ Lsl(x18, x0, x3); in TEST() local
10039 __ Lsl(x19, x0, x4); in TEST() local
10040 __ Lsl(x20, x0, x5); in TEST() local
10041 __ Lsl(x21, x0, x6); in TEST() local
10043 __ Lsl(w22, w0, w1); in TEST() local
10044 __ Lsl(w23, w0, w2); in TEST() local
10045 __ Lsl(w24, w0, w3); in TEST() local
10046 __ Lsl(w25, w0, w4); in TEST() local
[all …]
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceInstARM32.h | 398 Lsl, enumerator
|
| /external/vixl/src/aarch32/ |
| D | macro-assembler-aarch32.h | 2251 void Lsl(Condition cond, Register rd, Register rm, const Operand& operand) { in Lsl() function
2268 void Lsl(Register rd, Register rm, const Operand& operand) { in Lsl() function
2271 void Lsl(FlagsUpdate flags, in Lsl() function
2297 void Lsl(FlagsUpdate flags, in Lsl() function
|