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1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2013-2015
4  * NVIDIA Corporation <www.nvidia.com>
5  */
6 
7 #ifndef _MAX77620_INIT_H_
8 #define _MAX77620_INIT_H_
9 
10 /* MAX77620-PMIC-specific early init regs */
11 
12 #define MAX77620_I2C_ADDR		0x78
13 #define MAX77620_I2C_ADDR_7BIT		0x3C
14 
15 #define MAX77620_CNFGGLBL1_REG		0x00
16 
17 #define MAX77620_SD0_REG		0x16
18 #define MAX77620_SD1_REG		0x17
19 #define MAX77620_SD2_REG		0x18
20 #define MAX77620_SD3_REG		0x19
21 #define MAX77620_CNFG2SD_REG		0x22
22 
23 #define MAX77620_CNFG1_L0_REG		0x23
24 #define MAX77620_CNFG2_L0_REG		0x24
25 #define MAX77620_CNFG1_L1_REG		0x25
26 #define MAX77620_CNFG2_L1_REG		0x26
27 #define MAX77620_CNFG1_L2_REG		0x27
28 #define MAX77620_CNFG2_L2_REG		0x28
29 #define MAX77620_CNFG1_L3_REG		0x29
30 #define MAX77620_CNFG2_L3_REG		0x2A
31 #define MAX77620_CNFG1_L4_REG		0x2B
32 #define MAX77620_CNFG2_L4_REG		0x2C
33 #define MAX77620_CNFG1_L5_REG		0x2D
34 #define MAX77620_CNFG2_L5_REG		0x2E
35 #define MAX77620_CNFG1_L6_REG		0x2F
36 #define MAX77620_CNFG2_L6_REG		0x30
37 #define MAX77620_CNFG1_L7_REG		0x31
38 #define MAX77620_CNFG2_L7_REG		0x32
39 #define MAX77620_CNFG1_L8_REG		0x33
40 #define MAX77620_CNFG2_L8_REG		0x34
41 #define MAX77620_CNFG3_LDO_REG		0x35
42 
43 #define MAX77620_GPIO0_REG		0x36
44 #define MAX77620_GPIO1_REG		0x37
45 #define MAX77620_GPIO2_REG		0x38
46 #define MAX77620_GPIO3_REG		0x39
47 #define MAX77620_GPIO4_REG		0x3A
48 #define MAX77620_GPIO5_REG		0x3B
49 #define MAX77620_GPIO6_REG		0x3C
50 #define MAX77620_GPIO7_REG		0x3D
51 #define MAX77620_GPIO_PUE_GPIO		0x3E
52 #define MAX77620_GPIO_PDE_GPIO		0x3F
53 
54 #define MAX77620_AME_GPIO		0x40
55 #define MAX77620_REG_ONOFF_CFG1		0x41
56 #define MAX77620_REG_ONOFF_CFG2		0x42
57 
58 #define MAX77620_CID0_REG		0x58
59 #define MAX77620_CID1_REG		0x59
60 #define MAX77620_CID2_REG		0x5A
61 #define MAX77620_CID3_REG		0x5B
62 #define MAX77620_CID4_REG		0x5C
63 #define MAX77620_CID5_REG		0x5D
64 
65 #define I2C_SEND_2_BYTES	0x0A02
66 
67 void pmic_enable_cpu_vdd(void);
68 
69 #endif	/* _MAX77620_INIT_H_ */
70