Searched defs:MIa (Results 1 – 16 of 16) sorted by relevance
| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCDuplexInfo.cpp | 572 MCInst const &MIa, bool ExtendedA, in isOrderedDuplexPair()
645 bool HexagonMCInstrInfo::isDuplexPair(MCInst const &MIa, MCInst const &MIb) { in isDuplexPair()
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| D | HexagonMCCompound.cpp | 345 bool isOrderedCompoundPair(MCInst const &MIa, bool IsExtendedA, in isOrderedCompoundPair()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonMCDuplexInfo.cpp | 574 MCInst const &MIa, bool ExtendedA, in isOrderedDuplexPair()
653 bool HexagonMCInstrInfo::isDuplexPair(MCInst const &MIa, MCInst const &MIb) { in isDuplexPair()
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| D | HexagonMCCompound.cpp | 336 static bool isOrderedCompoundPair(MCInst const &MIa, bool IsExtendedA, in isOrderedCompoundPair()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64LoadStoreOptimizer.cpp | 1019 static bool mayAlias(MachineInstr &MIa, MachineInstr &MIb, in mayAlias()
1032 static bool mayAlias(MachineInstr &MIa, in mayAlias()
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| D | AArch64InstrInfo.cpp | 1079 MachineInstr &MIa, MachineInstr &MIb, AliasAnalysis *AA) const { in areMemAccessesTriviallyDisjoint()
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64LoadStoreOptimizer.cpp | 1075 static bool mayAlias(MachineInstr &MIa, MachineInstr &MIb, in mayAlias()
1088 static bool mayAlias(MachineInstr &MIa, in mayAlias()
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| D | AArch64InstrInfo.cpp | 658 MachineInstr &MIa, MachineInstr &MIb, AliasAnalysis *AA) const { in areMemAccessesTriviallyDisjoint()
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| /external/llvm/lib/Target/Lanai/ |
| D | LanaiInstrInfo.cpp | 89 bool LanaiInstrInfo::areMemAccessesTriviallyDisjoint(MachineInstr &MIa, in areMemAccessesTriviallyDisjoint()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/ |
| D | LanaiInstrInfo.cpp | 90 MachineInstr &MIa, MachineInstr &MIb, AliasAnalysis * /*AA*/) const { in areMemAccessesTriviallyDisjoint()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 1341 bool SIInstrInfo::checkInstOffsetsDoNotOverlap(MachineInstr &MIa, in checkInstOffsetsDoNotOverlap()
1364 bool SIInstrInfo::areMemAccessesTriviallyDisjoint(MachineInstr &MIa, in areMemAccessesTriviallyDisjoint()
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| /external/llvm/lib/CodeGen/ |
| D | ScheduleDAGInstrs.cpp | 563 const DataLayout &DL, MachineInstr *MIa, in MIsNeedChainEdge()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrInfo.cpp | 1627 MachineInstr &MIa, MachineInstr &MIb, AliasAnalysis *AA) const { in areMemAccessesTriviallyDisjoint()
2025 bool HexagonInstrInfo::isDuplexPair(const MachineInstr *MIa, in isDuplexPair()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonInstrInfo.cpp | 1816 MachineInstr &MIa, MachineInstr &MIb, AliasAnalysis *AA) const { in areMemAccessesTriviallyDisjoint()
2087 bool HexagonInstrInfo::isDuplexPair(const MachineInstr &MIa, in isDuplexPair()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.cpp | 1860 areMemAccessesTriviallyDisjoint(MachineInstr &MIa, MachineInstr &MIb, in areMemAccessesTriviallyDisjoint()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 2118 bool SIInstrInfo::checkInstOffsetsDoNotOverlap(MachineInstr &MIa, in checkInstOffsetsDoNotOverlap()
2141 bool SIInstrInfo::areMemAccessesTriviallyDisjoint(MachineInstr &MIa, in areMemAccessesTriviallyDisjoint()
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