| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/ |
| D | Utils.cpp | 31 unsigned llvm::constrainRegToClass(MachineRegisterInfo &MRI, in constrainRegToClass()
49 MachineRegisterInfo &MRI, const TargetInstrInfo &TII, in constrainOperandRegClass()
96 MachineRegisterInfo &MRI = MF.getRegInfo(); in constrainSelectedInstRegOperands() local
136 const MachineRegisterInfo &MRI) { in isTriviallyDead()
186 const MachineRegisterInfo &MRI) { in getConstantVRegVal()
202 const MachineRegisterInfo &MRI) { in getConstantFPVRegVal()
210 const MachineRegisterInfo &MRI) { in getOpcodeDef()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsCallLowering.h | 29 MipsHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in MipsHandler()
38 MachineRegisterInfo &MRI; variable
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMAsmBackendDarwin.h | 19 const MCRegisterInfo &MRI; variable
23 const MCRegisterInfo &MRI, MachO::CPUSubTypeARM st) in ARMAsmBackendDarwin()
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMAsmBackendDarwin.h | 18 const MCRegisterInfo &MRI; variable
22 const MCRegisterInfo &MRI, MachO::CPUSubTypeARM st) in ARMAsmBackendDarwin()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/InstPrinter/ |
| D | AMDGPUInstPrinter.h | 23 const MCInstrInfo &MII, const MCRegisterInfo &MRI) in AMDGPUInstPrinter()
224 const MCRegisterInfo &MRI) in R600InstPrinter()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86InstructionSelector.cpp | 315 MachineRegisterInfo &MRI = MF.getRegInfo(); in select() local
467 const MachineRegisterInfo &MRI, in X86SelectAddress()
493 MachineRegisterInfo &MRI, in selectLoadStoreOp()
541 MachineRegisterInfo &MRI, in selectFrameIndexOrGep()
569 MachineRegisterInfo &MRI, in selectGlobalValue()
615 MachineRegisterInfo &MRI, in selectConstant()
672 MachineInstr &I, MachineRegisterInfo &MRI, const unsigned DstReg, in selectTurnIntoCOPY()
687 MachineRegisterInfo &MRI, in selectTruncOrPtrToInt()
753 MachineRegisterInfo &MRI, in selectZext()
864 MachineRegisterInfo &MRI, in selectAnyext()
[all …]
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| D | X86RegisterBankInfo.cpp | 110 const MachineInstr &MI, const MachineRegisterInfo &MRI, const bool isFP, in getInstrPartialMappingIdxs()
146 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getSameOperandsMapping() local
162 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrMapping() local
255 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrAlternativeMappings() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPURegisterBankInfo.cpp | 57 const MachineRegisterInfo &MRI = MF->getRegInfo(); in isConstant() local
103 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrAlternativeMappings() local
194 const MachineRegisterInfo &MRI = MF.getRegInfo(); in isSALUMapping() local
207 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getDefaultMappingSOP() local
221 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getDefaultMappingVOP() local
249 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrMappingForLoad() local
279 const MachineRegisterInfo &MRI, in getRegBankID()
301 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getInstrMapping() local
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| D | GCNRegPressure.cpp | 39 const MachineRegisterInfo &MRI) { in printLivesAt()
86 const MachineRegisterInfo &MRI) { in getRegKind()
98 const MachineRegisterInfo &MRI) { in inc()
194 const MachineRegisterInfo &MRI) { in getDefRegMask()
207 const MachineRegisterInfo &MRI, in getUsedRegMask()
228 const MachineRegisterInfo &MRI) { in collectVirtualRegUses()
256 const MachineRegisterInfo &MRI) { in getLiveLaneMask()
274 const MachineRegisterInfo &MRI) { in getLiveRegs()
496 const MachineRegisterInfo &MRI) { in printLiveRegs()
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| D | AMDGPUInstructionSelector.cpp | 67 MachineRegisterInfo &MRI = MF->getRegInfo(); in selectCOPY() local
89 MachineRegisterInfo &MRI = MF->getRegInfo(); in getSubOperand64() local
125 MachineRegisterInfo &MRI = MF->getRegInfo(); in selectG_ADD() local
172 MachineRegisterInfo &MRI = MF->getRegInfo(); in selectG_IMPLICIT_DEF() local
196 MachineRegisterInfo &MRI = MF->getRegInfo(); in selectG_INTRINSIC() local
240 MachineRegisterInfo &MRI = MF->getRegInfo(); in selectG_INTRINSIC_W_SIDE_EFFECTS() local
283 MachineRegisterInfo &MRI = MF->getRegInfo(); in selectG_STORE() local
325 MachineRegisterInfo &MRI = MF->getRegInfo(); in selectG_CONSTANT() local
394 const MachineRegisterInfo &MRI, SmallVectorImpl<GEPInfo> &AddrInfo) const { in getAddrModeInfo() argument
522 MachineRegisterInfo &MRI = MF->getRegInfo(); in selectSMRD() local
[all …]
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| D | SIFixSGPRCopies.cpp | 148 const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo(); in hasVGPROperands() local
163 const MachineRegisterInfo &MRI) { in getCopyRegClasses()
198 MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo(); in tryChangeVGPRtoSGPRinCopy() local
236 MachineRegisterInfo &MRI) { in foldVGPRCopyIntoRegSequence()
305 const MachineRegisterInfo &MRI, in phiHasVGPROperands()
317 const MachineRegisterInfo &MRI, in phiHasBreakDef()
448 const MachineRegisterInfo &MRI, in hoistAndMergeSGPRInits()
572 MachineRegisterInfo &MRI = MF.getRegInfo(); in runOnMachineFunction() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/DebugInfo/DWARF/ |
| D | DWARFDebugLoc.cpp | 34 const MCRegisterInfo *MRI) { in dumpExpression()
42 const MCRegisterInfo *MRI, in dump()
68 void DWARFDebugLoc::dump(raw_ostream &OS, const MCRegisterInfo *MRI, in dump()
202 const MCRegisterInfo *MRI, in dump()
212 void DWARFDebugLocDWO::dump(raw_ostream &OS, const MCRegisterInfo *MRI, in dump()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/NVPTX/ |
| D | NVPTXPeephole.cpp | 83 const auto &MRI = MF.getRegInfo(); in isCVTAToLocalCombinationCandidate() local
108 const auto &MRI = MF.getRegInfo(); in CombineCVTAToLocal() local
147 const auto &MRI = MF.getRegInfo(); in runOnMachineFunction() local
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXPeephole.cpp | 83 const auto &MRI = MF.getRegInfo(); in isCVTAToLocalCombinationCandidate() local
108 const auto &MRI = MF.getRegInfo(); in CombineCVTAToLocal() local
147 const auto &MRI = MF.getRegInfo(); in runOnMachineFunction() local
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| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyStoreResults.cpp | 80 const MachineRegisterInfo &MRI, in ReplaceDominatedUses()
143 const MachineRegisterInfo &MRI, in optimizeStore()
152 const MachineRegisterInfo &MRI, in optimizeCall()
186 MachineRegisterInfo &MRI = MF.getRegInfo(); in runOnMachineFunction() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/MCTargetDesc/ |
| D | SparcMCTargetDesc.cpp | 35 static MCAsmInfo *createSparcMCAsmInfo(const MCRegisterInfo &MRI, in createSparcMCAsmInfo()
44 static MCAsmInfo *createSparcV9MCAsmInfo(const MCRegisterInfo &MRI, in createSparcV9MCAsmInfo()
88 const MCRegisterInfo &MRI) { in createSparcMCInstPrinter()
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsAsmBackend.cpp | 484 const MCRegisterInfo &MRI, in createMipsAsmBackendEL32()
491 const MCRegisterInfo &MRI, in createMipsAsmBackendEB32()
498 const MCRegisterInfo &MRI, in createMipsAsmBackendEL64()
504 const MCRegisterInfo &MRI, in createMipsAsmBackendEB64()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | LivePhysRegs.cpp | 144 bool LivePhysRegs::available(const MachineRegisterInfo &MRI, in available()
179 const MachineRegisterInfo &MRI = MF.getRegInfo(); in addCalleeSavedRegs() local
250 const MachineRegisterInfo &MRI = MF.getRegInfo(); in computeLiveIns() local
261 const MachineRegisterInfo &MRI = MF.getRegInfo(); in addLiveIns() local
282 const MachineRegisterInfo &MRI = MF.getRegInfo(); in recomputeLivenessFlags() local
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| D | MIRCanonicalizerPass.cpp | 241 MachineRegisterInfo *MRI = &MBB->getParent()->getRegInfo(); in rescheduleCanonically() local
323 MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo(); in propagateLocalCopies() local
368 MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo(); in populateCandidates() local
402 const MachineRegisterInfo &MRI = MF.getRegInfo(); in doCandidateWalk() local
473 MachineRegisterInfo &MRI; member in __anon7675f1380911::NamedVRegCursor
477 NamedVRegCursor(MachineRegisterInfo &MRI) : MRI(MRI) { in NamedVRegCursor()
519 MachineRegisterInfo &MRI, NamedVRegCursor &NVC) { in GetVRegRenameMap()
587 MachineRegisterInfo &MRI) { in doVRegRenaming()
663 MachineRegisterInfo &MRI = MF.getRegInfo(); in runOnBasicBlock() local
797 MachineRegisterInfo &MRI = MF.getRegInfo(); in runOnMachineFunction() local
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| /external/llvm/lib/Target/BPF/MCTargetDesc/ |
| D | BPFMCCodeEmitter.cpp | 33 const MCRegisterInfo &MRI; member in __anonf7c19bba0111::BPFMCCodeEmitter
65 const MCRegisterInfo &MRI, in createBPFMCCodeEmitter()
71 const MCRegisterInfo &MRI, in createBPFbeMCCodeEmitter()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/BPF/MCTargetDesc/ |
| D | BPFMCCodeEmitter.cpp | 35 const MCRegisterInfo &MRI; member in __anon48388f120111::BPFMCCodeEmitter
75 const MCRegisterInfo &MRI, in createBPFMCCodeEmitter()
81 const MCRegisterInfo &MRI, in createBPFbeMCCodeEmitter()
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Analysis/ |
| D | AliasAnalysis.h | 140 LLVM_NODISCARD inline bool isNoModRef(const ModRefInfo MRI) { in isNoModRef()
144 LLVM_NODISCARD inline bool isModOrRefSet(const ModRefInfo MRI) { in isModOrRefSet()
147 LLVM_NODISCARD inline bool isModAndRefSet(const ModRefInfo MRI) { in isModAndRefSet()
151 LLVM_NODISCARD inline bool isModSet(const ModRefInfo MRI) { in isModSet()
154 LLVM_NODISCARD inline bool isRefSet(const ModRefInfo MRI) { in isRefSet()
157 LLVM_NODISCARD inline bool isMustSet(const ModRefInfo MRI) { in isMustSet()
161 LLVM_NODISCARD inline ModRefInfo setMod(const ModRefInfo MRI) { in setMod()
165 LLVM_NODISCARD inline ModRefInfo setRef(const ModRefInfo MRI) { in setRef()
169 LLVM_NODISCARD inline ModRefInfo setMust(const ModRefInfo MRI) { in setMust()
173 LLVM_NODISCARD inline ModRefInfo setModAndRef(const ModRefInfo MRI) { in setModAndRef()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyPeephole.cpp | 63 MachineRegisterInfo &MRI) { in MaybeRewriteToDrop()
78 MachineRegisterInfo &MRI, in MaybeRewriteToFallthrough()
119 MachineRegisterInfo &MRI = MF.getRegInfo(); in runOnMachineFunction() local
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIShrinkInstructions.cpp | 70 const MachineRegisterInfo &MRI) { in isVGPR()
82 const MachineRegisterInfo &MRI) { in canShrink()
130 MachineRegisterInfo &MRI, bool TryToCommute = true) { in foldImmediates()
201 MachineRegisterInfo &MRI = MF.getRegInfo(); in runOnMachineFunction() local
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| D | SIFixSGPRCopies.cpp | 116 const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo(); in hasVGPROperands() local
131 const MachineRegisterInfo &MRI) { in getCopyRegClasses()
179 MachineRegisterInfo &MRI) { in foldVGPRCopyIntoRegSequence()
241 MachineRegisterInfo &MRI = MF.getRegInfo(); in runOnMachineFunction() local
|