1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com> 4 */ 5 6 #ifndef _QUARK_MSG_PORT_H_ 7 #define _QUARK_MSG_PORT_H_ 8 9 /* 10 * In the Quark SoC, some chipset commands are accomplished by utilizing 11 * the internal message network within the host bridge (D0:F0). Accesses 12 * to this network are accomplished by populating the message control 13 * register (MCR), Message Control Register eXtension (MCRX) and the 14 * message data register (MDR). 15 */ 16 #define MSG_CTRL_REG 0xd0 /* Message Control Register */ 17 #define MSG_DATA_REG 0xd4 /* Message Data Register */ 18 #define MSG_CTRL_EXT_REG 0xd8 /* Message Control Register EXT */ 19 20 /* Normal Read/Write OpCodes */ 21 #define MSG_OP_READ 0x10 22 #define MSG_OP_WRITE 0x11 23 24 /* Alternative Read/Write OpCodes */ 25 #define MSG_OP_ALT_READ 0x06 26 #define MSG_OP_ALT_WRITE 0x07 27 28 /* IO Read/Write OpCodes */ 29 #define MSG_OP_IO_READ 0x02 30 #define MSG_OP_IO_WRITE 0x03 31 32 /* All byte enables */ 33 #define MSG_BYTE_ENABLE 0xf0 34 35 #ifndef __ASSEMBLY__ 36 37 /** 38 * msg_port_setup - set up the message port control register 39 * 40 * @op: message bus access opcode 41 * @port: port number on the message bus 42 * @reg: register number within a port 43 */ 44 void msg_port_setup(int op, int port, int reg); 45 46 /** 47 * msg_port_read - read a message port register using normal opcode 48 * 49 * @port: port number on the message bus 50 * @reg: register number within a port 51 * 52 * @return: message port register value 53 */ 54 u32 msg_port_read(u8 port, u32 reg); 55 56 /** 57 * msg_port_write - write a message port register using normal opcode 58 * 59 * @port: port number on the message bus 60 * @reg: register number within a port 61 * @value: register value to write 62 */ 63 void msg_port_write(u8 port, u32 reg, u32 value); 64 65 /** 66 * msg_port_alt_read - read a message port register using alternative opcode 67 * 68 * @port: port number on the message bus 69 * @reg: register number within a port 70 * 71 * @return: message port register value 72 */ 73 u32 msg_port_alt_read(u8 port, u32 reg); 74 75 /** 76 * msg_port_alt_write - write a message port register using alternative opcode 77 * 78 * @port: port number on the message bus 79 * @reg: register number within a port 80 * @value: register value to write 81 */ 82 void msg_port_alt_write(u8 port, u32 reg, u32 value); 83 84 /** 85 * msg_port_io_read - read a message port register using I/O opcode 86 * 87 * @port: port number on the message bus 88 * @reg: register number within a port 89 * 90 * @return: message port register value 91 */ 92 u32 msg_port_io_read(u8 port, u32 reg); 93 94 /** 95 * msg_port_io_write - write a message port register using I/O opcode 96 * 97 * @port: port number on the message bus 98 * @reg: register number within a port 99 * @value: register value to write 100 */ 101 void msg_port_io_write(u8 port, u32 reg, u32 value); 102 103 /* clrbits, setbits, clrsetbits macros for message port access */ 104 105 #define msg_port_normal_read msg_port_read 106 #define msg_port_normal_write msg_port_write 107 108 #define msg_port_generic_clrsetbits(type, port, reg, clr, set) \ 109 msg_port_##type##_write(port, reg, \ 110 (msg_port_##type##_read(port, reg) \ 111 & ~(clr)) | (set)) 112 113 #define msg_port_clrbits(port, reg, clr) \ 114 msg_port_generic_clrsetbits(normal, port, reg, clr, 0) 115 #define msg_port_setbits(port, reg, set) \ 116 msg_port_generic_clrsetbits(normal, port, reg, 0, set) 117 #define msg_port_clrsetbits(port, reg, clr, set) \ 118 msg_port_generic_clrsetbits(normal, port, reg, clr, set) 119 120 #define msg_port_alt_clrbits(port, reg, clr) \ 121 msg_port_generic_clrsetbits(alt, port, reg, clr, 0) 122 #define msg_port_alt_setbits(port, reg, set) \ 123 msg_port_generic_clrsetbits(alt, port, reg, 0, set) 124 #define msg_port_alt_clrsetbits(port, reg, clr, set) \ 125 msg_port_generic_clrsetbits(alt, port, reg, clr, set) 126 127 #define msg_port_io_clrbits(port, reg, clr) \ 128 msg_port_generic_clrsetbits(io, port, reg, clr, 0) 129 #define msg_port_io_setbits(port, reg, set) \ 130 msg_port_generic_clrsetbits(io, port, reg, 0, set) 131 #define msg_port_io_clrsetbits(port, reg, clr, set) \ 132 msg_port_generic_clrsetbits(io, port, reg, clr, set) 133 134 #endif /* __ASSEMBLY__ */ 135 136 #endif /* _QUARK_MSG_PORT_H_ */ 137