1 /*
2 * Copyright (c) 2013 Christian Svensson <blue@cmd.nu>
3 * Copyright (c) 2014-2015 Dmitry V. Levin <ldv@altlinux.org>
4 * Copyright (c) 2014-2017 The strace developers.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30 #include "defs.h"
31
32 #ifdef OR1K
33
34 #define OR1K_ATOMIC_SWAP 1
35 #define OR1K_ATOMIC_CMPXCHG 2
36 #define OR1K_ATOMIC_XCHG 3
37 #define OR1K_ATOMIC_ADD 4
38 #define OR1K_ATOMIC_DECPOS 5
39 #define OR1K_ATOMIC_AND 6
40 #define OR1K_ATOMIC_OR 7
41 #define OR1K_ATOMIC_UMAX 8
42 #define OR1K_ATOMIC_UMIN 9
43
44 #include "xlat/atomic_ops.h"
45
SYS_FUNC(or1k_atomic)46 SYS_FUNC(or1k_atomic)
47 {
48 printxval64(atomic_ops, tcp->u_arg[0], "???");
49 switch (tcp->u_arg[0]) {
50 case OR1K_ATOMIC_SWAP:
51 tprintf(", 0x%lx, 0x%lx", tcp->u_arg[1], tcp->u_arg[2]);
52 break;
53 case OR1K_ATOMIC_CMPXCHG:
54 tprintf(", 0x%lx, %#lx, %#lx", tcp->u_arg[1], tcp->u_arg[2],
55 tcp->u_arg[3]);
56 break;
57
58 case OR1K_ATOMIC_XCHG:
59 case OR1K_ATOMIC_ADD:
60 case OR1K_ATOMIC_AND:
61 case OR1K_ATOMIC_OR:
62 case OR1K_ATOMIC_UMAX:
63 case OR1K_ATOMIC_UMIN:
64 tprintf(", 0x%lx, %#lx", tcp->u_arg[1], tcp->u_arg[2]);
65 break;
66
67 case OR1K_ATOMIC_DECPOS:
68 tprintf(", 0x%lx", tcp->u_arg[1]);
69 break;
70
71 default:
72 break;
73 }
74
75 return RVAL_DECODED | RVAL_HEX;
76 }
77
78 #endif /* OR1K */
79