/external/capstone/arch/XCore/ |
D | XCoreDisassembler.c | 626 unsigned Op1, Op2, Op3, Op4, Op5, Op6; in DecodeL6RInstruction() local 667 unsigned Op1, Op2, Op3, Op4, Op5; in DecodeL5RInstruction() local 689 unsigned Op4 = fieldFromInstruction_4(Insn, 16, 4); in DecodeL4RSrcDstInstruction() local 709 unsigned Op4 = fieldFromInstruction_4(Insn, 16, 4); in DecodeL4RSrcDstSrcDstInstruction() local
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/external/llvm/lib/Target/XCore/Disassembler/ |
D | XCoreDisassembler.cpp | 648 unsigned Op1, Op2, Op3, Op4, Op5, Op6; in DecodeL6RInstruction() local 682 unsigned Op1, Op2, Op3, Op4, Op5; in DecodeL5RInstruction() local 703 unsigned Op4 = fieldFromInstruction(Insn, 16, 4); in DecodeL4RSrcDstInstruction() local 722 unsigned Op4 = fieldFromInstruction(Insn, 16, 4); in DecodeL4RSrcDstSrcDstInstruction() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/XCore/Disassembler/ |
D | XCoreDisassembler.cpp | 648 unsigned Op1, Op2, Op3, Op4, Op5, Op6; in DecodeL6RInstruction() local 682 unsigned Op1, Op2, Op3, Op4, Op5; in DecodeL5RInstruction() local 703 unsigned Op4 = fieldFromInstruction(Insn, 16, 4); in DecodeL4RSrcDstInstruction() local 722 unsigned Op4 = fieldFromInstruction(Insn, 16, 4); in DecodeL4RSrcDstSrcDstInstruction() local
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZISelDAGToDAG.cpp | 1305 SDValue Op4 = Node->getOperand(4); in Select() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
D | SystemZISelDAGToDAG.cpp | 1511 SDValue Op4 = Node->getOperand(4); in Select() local
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86ISelDAGToDAG.cpp | 2234 SDValue Op0, Op1, Op2, Op3, Op4; in SelectInlineAsmMemoryOperand() local
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D | X86ISelLowering.cpp | 10190 unsigned Op4 = cast<ConstantSDNode>(Op.getOperand(4))->getZExtValue(); in LowerMEMBARRIER() local
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/external/llvm/lib/Target/AArch64/AsmParser/ |
D | AArch64AsmParser.cpp | 3839 AArch64Operand &Op4 = static_cast<AArch64Operand &>(*Operands[4]); in MatchAndEmitInstruction() local 3903 AArch64Operand &Op4 = static_cast<AArch64Operand &>(*Operands[4]); in MatchAndEmitInstruction() local
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/external/llvm/lib/Target/X86/ |
D | X86ISelDAGToDAG.cpp | 2698 SDValue Op0, Op1, Op2, Op3, Op4; in SelectInlineAsmMemoryOperand() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/AsmParser/ |
D | AArch64AsmParser.cpp | 4437 AArch64Operand &Op4 = static_cast<AArch64Operand &>(*Operands[4]); in MatchAndEmitInstruction() local 4501 AArch64Operand &Op4 = static_cast<AArch64Operand &>(*Operands[4]); in MatchAndEmitInstruction() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86ISelDAGToDAG.cpp | 3393 SDValue Op0, Op1, Op2, Op3, Op4; in SelectInlineAsmMemoryOperand() local
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | SelectionDAG.cpp | 4737 SDValue Op3, SDValue Op4) { in UpdateNodeOperands() 4744 SDValue Op3, SDValue Op4, SDValue Op5) { in UpdateNodeOperands()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAG.cpp | 5782 SDValue Op3, SDValue Op4) { in UpdateNodeOperands() 5789 SDValue Op3, SDValue Op4, SDValue Op5) { in UpdateNodeOperands()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAG.cpp | 6959 SDValue Op3, SDValue Op4) { in UpdateNodeOperands() 6966 SDValue Op3, SDValue Op4, SDValue Op5) { in UpdateNodeOperands()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/AsmParser/ |
D | ARMAsmParser.cpp | 5753 auto &Op4 = static_cast<ARMOperand &>(*Operands[4]); in tryConvertingToTwoOperandForm() local
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/external/llvm/lib/Target/ARM/AsmParser/ |
D | ARMAsmParser.cpp | 5544 auto &Op4 = static_cast<ARMOperand &>(*Operands[4]); in tryConvertingToTwoOperandForm() local
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