/external/llvm/lib/CodeGen/ |
D | RegUsageInfoCollector.cpp | 80 uint32_t *RegMask, unsigned PReg) { in markRegClobbered() 117 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) in runOnMachineFunction() local 133 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) in runOnMachineFunction() local
|
D | RegisterUsageInfo.cpp | 86 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) { in print() local
|
D | RegAllocPBQP.cpp | 587 unsigned PReg = RawPRegOrder[I]; in initializeGraph() local 685 unsigned PReg = G.getNodeMetadata(NId).getAllowedRegs()[AllocOption - 1]; in mapPBQPToRegAlloc() local 713 unsigned PReg = MRI.getSimpleHint(LI.reg); in finalizeAlloc() local
|
D | CallingConvLower.cpp | 246 for (MCPhysReg PReg : RemainingRegs) { in analyzeMustTailForwardedRegisters() local
|
D | MachineFunction.cpp | 512 unsigned MachineFunction::addLiveIn(unsigned PReg, in addLiveIn()
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
D | RegUsageInfoCollector.cpp | 114 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) { in runOnMachineFunction() local 139 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) in runOnMachineFunction() local 169 for (unsigned PReg = 1, PRegE = TRI.getNumRegs(); PReg < PRegE; ++PReg) { in computeCalleeSavedRegs() local
|
D | RegisterUsageInfo.cpp | 96 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) { in print() local
|
D | RegAllocPBQP.cpp | 615 unsigned PReg = RawPRegOrder[I]; in initializeGraph() local 726 unsigned PReg = G.getNodeMetadata(NId).getAllowedRegs()[AllocOption - 1]; in mapPBQPToRegAlloc() local 754 unsigned PReg = MRI.getSimpleHint(LI.reg); in finalizeAlloc() local
|
D | CallingConvLower.cpp | 263 for (MCPhysReg PReg : RemainingRegs) { in analyzeMustTailForwardedRegisters() local
|
D | MachineFunction.cpp | 608 unsigned MachineFunction::addLiveIn(unsigned PReg, in addLiveIn()
|
/external/llvm/lib/Target/AMDGPU/ |
D | R600ExpandSpecialInstrs.cpp | 122 unsigned PReg = AMDGPU::R600_ArrayBaseRegClass.getRegister( in runOnMachineFunction() local 151 unsigned PReg = AMDGPU::R600_ArrayBaseRegClass.getRegister( in runOnMachineFunction() local 181 unsigned PReg = AMDGPU::R600_ArrayBaseRegClass.getRegister( in runOnMachineFunction() local
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyReplacePhysRegs.cpp | 80 for (unsigned PReg = WebAssembly::NoRegister + 1; in runOnMachineFunction() local
|
/external/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyReplacePhysRegs.cpp | 76 for (unsigned PReg = WebAssembly::NoRegister + 1; in runOnMachineFunction() local
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Nios2/ |
D | Nios2ISelLowering.cpp | 73 static unsigned addLiveIn(MachineFunction &MF, unsigned PReg, in addLiveIn()
|
/external/llvm/lib/Target/Hexagon/ |
D | HexagonBlockRanges.cpp | 272 unsigned PReg = *RC.begin(); in expandToSubRegs() local
|
D | HexagonBitTracker.cpp | 1130 unsigned HexagonEvaluator::getNextPhysReg(unsigned PReg, unsigned Width) const { in getNextPhysReg()
|
/external/llvm/include/llvm/CodeGen/ |
D | CallingConvLower.h | 169 MCPhysReg PReg; member
|
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
D | CallingConvLower.h | 170 MCPhysReg PReg; member
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
D | HexagonBlockRanges.cpp | 281 unsigned PReg = *RC.begin(); in expandToSubRegs() local
|
D | HexagonBitTracker.cpp | 1241 unsigned HexagonEvaluator::getNextPhysReg(unsigned PReg, unsigned Width) const { in getNextPhysReg()
|
D | HexagonInstrInfo.cpp | 1251 unsigned PReg = Op1.getReg(); in expandPostRAPseudo() local 1285 unsigned PReg = Op1.getReg(); in expandPostRAPseudo() local
|
/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
D | MachineFunction.cpp | 390 unsigned MachineFunction::addLiveIn(unsigned PReg, in addLiveIn()
|
/external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
D | AlphaISelLowering.cpp | 39 static unsigned AddLiveIn(MachineFunction &MF, unsigned PReg, in AddLiveIn()
|
/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86FastISel.cpp | 919 unsigned PReg = createResultReg(&X86::GR8RegClass); in X86SelectCmp() local
|
/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMLoadStoreOptimizer.cpp | 450 unsigned PReg = PMO.getReg(); in MergeLDR_STR() local
|