Searched defs:PrevReg (Results 1 – 13 of 13) sorted by relevance
226 if (unsigned PrevReg = Result.getRegisterForVar(Var)) in calculateDbgValueHistory() local
250 if (unsigned PrevReg = Result.getRegisterForVar(Var)) in calculateDbgValueHistory() local
615 unsigned PrevReg = -1; in PreprocessTrunc() local
528 MCOperand PrevReg = MCOperand::createReg(Sparc::G0); in expandSET() local
500 MCOperand PrevReg = MCOperand::createReg(Sparc::G0); in expandSET() local
2670 unsigned PrevReg = 0; in generateExistingPhis() local3249 unsigned NewReg, unsigned PrevReg) { in rewriteScheduledInstr()3327 unsigned PrevReg = getLoopPhiReg(*Phi, MI->getParent()); in canUseLastOffsetValue() local
662 unsigned RAGreedy::canReassign(LiveInterval &VirtReg, unsigned PrevReg) { in canReassign()
2788 unsigned PrevReg = 0; in generateExistingPhis() local3372 unsigned NewReg, unsigned PrevReg) { in rewriteScheduledInstr()3450 unsigned PrevReg = getLoopPhiReg(*Phi, MI->getParent()); in canUseLastOffsetValue() local
805 unsigned RAGreedy::canReassign(LiveInterval &VirtReg, unsigned PrevReg) { in canReassign()
1119 int PrevReg = *RegList.List->begin(); in isRegList16() local4647 unsigned PrevReg = Mips::NoRegister; in parseRegisterList() local
1387 int PrevReg = *RegList.List->begin(); in isRegList16() local6200 unsigned PrevReg = Mips::NoRegister; in parseRegisterList() local
2982 int64_t PrevReg = FirstReg; in parseVectorList() local
3202 int64_t PrevReg = FirstReg; in tryParseVectorList() local