Searched defs:RegB (Results 1 – 11 of 11) sorted by relevance
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/MC/ |
D | MCRegisterInfo.h | 456 bool isSubRegister(unsigned RegA, unsigned RegB) const { in isSubRegister() 464 bool isSubRegisterEq(unsigned RegA, unsigned RegB) const { in isSubRegisterEq() 470 bool isSuperRegisterEq(unsigned RegA, unsigned RegB) const { in isSuperRegisterEq() 476 bool isSuperOrSubRegisterEq(unsigned RegA, unsigned RegB) const { in isSuperOrSubRegisterEq() 552 inline bool MCRegisterInfo::isSuperRegister(unsigned RegA, unsigned RegB) const{ in isSuperRegister()
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/external/llvm/include/llvm/MC/ |
D | MCRegisterInfo.h | 434 bool isSubRegister(unsigned RegA, unsigned RegB) const { in isSubRegister() 442 bool isSubRegisterEq(unsigned RegA, unsigned RegB) const { in isSubRegisterEq() 448 bool isSuperRegisterEq(unsigned RegA, unsigned RegB) const { in isSuperRegisterEq() 454 bool isSuperOrSubRegisterEq(unsigned RegA, unsigned RegB) const { in isSuperOrSubRegisterEq() 527 inline bool MCRegisterInfo::isSuperRegister(unsigned RegA, unsigned RegB) const{ in isSuperRegister()
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/external/llvm/lib/CodeGen/ |
D | TwoAddressInstructionPass.cpp | 534 regsAreCompatible(unsigned RegA, unsigned RegB, const TargetRegisterInfo *TRI) { in regsAreCompatible() 674 TwoAddressInstructionPass::isProfitableToConv3Addr(unsigned RegA,unsigned RegB){ in isProfitableToConv3Addr() 693 unsigned RegA, unsigned RegB, in convertInstTo3Addr() 1456 unsigned RegB = 0; in processTiedPairs() local
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D | TargetInstrInfo.cpp | 702 unsigned RegB = OpB.getReg(); in reassociateOps() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
D | TwoAddressInstructionPass.cpp | 563 regsAreCompatible(unsigned RegA, unsigned RegB, const TargetRegisterInfo *TRI) { in regsAreCompatible() 714 TwoAddressInstructionPass::isProfitableToConv3Addr(unsigned RegA,unsigned RegB){ in isProfitableToConv3Addr() 733 unsigned RegA, unsigned RegB, in convertInstTo3Addr() 1511 unsigned RegB = 0; in processTiedPairs() local
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D | ImplicitNullChecks.cpp | 284 unsigned RegB = MOB.getReg(); in canReorder() local
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D | TargetInstrInfo.cpp | 812 unsigned RegB = OpB.getReg(); in reassociateOps() local
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/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
D | TwoAddressInstructionPass.cpp | 516 regsAreCompatible(unsigned RegA, unsigned RegB, const TargetRegisterInfo *TRI) { in regsAreCompatible() 595 unsigned RegB, unsigned RegC, unsigned Dist) { in CommuteInstruction() 631 TwoAddressInstructionPass::isProfitableToConv3Addr(unsigned RegA,unsigned RegB){ in isProfitableToConv3Addr() 651 unsigned RegA, unsigned RegB, in ConvertInstTo3Addr()
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/external/swiftshader/third_party/llvm-7.0/llvm/unittests/Analysis/ |
D | SparsePropagation.cpp | 483 auto RegB = TestLatticeKey(B, IPOGrouping::Register); in TEST_F() local
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonInstrInfo.cpp | 1981 for (auto &RegB : UsesB) { in isDependent() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
D | HexagonInstrInfo.cpp | 2048 for (auto &RegB : UsesB) { in isDependent() local
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