| /external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
| D | CodeGenRegisters.cpp | 76 void CodeGenSubRegIndex::updateComponents(CodeGenRegBank &RegBank) { in updateComponents()
168 void CodeGenRegister::buildObjectGraph(CodeGenRegBank &RegBank) { in buildObjectGraph()
255 bool CodeGenRegister::inheritRegUnits(CodeGenRegBank &RegBank) { in inheritRegUnits()
267 CodeGenRegister::computeSubRegs(CodeGenRegBank &RegBank) { in computeSubRegs()
465 void CodeGenRegister::computeSecondarySubRegs(CodeGenRegBank &RegBank) { in computeSecondarySubRegs()
546 void CodeGenRegister::computeSuperRegs(CodeGenRegBank &RegBank) { in computeSuperRegs()
732 CodeGenRegisterClass::CodeGenRegisterClass(CodeGenRegBank &RegBank, Record *R) in CodeGenRegisterClass()
807 CodeGenRegisterClass::CodeGenRegisterClass(CodeGenRegBank &RegBank, in CodeGenRegisterClass()
826 void CodeGenRegisterClass::inheritProperties(CodeGenRegBank &RegBank) { in inheritProperties()
930 void CodeGenRegisterClass::computeSubClasses(CodeGenRegBank &RegBank) { in computeSubClasses()
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| D | RegisterInfoEmitter.cpp | 63 CodeGenRegBank &RegBank = Target.getRegBank(); in RegisterInfoEmitter() local
195 EmitRegUnitPressure(raw_ostream &OS, const CodeGenRegBank &RegBank, in EmitRegUnitPressure()
654 CodeGenRegBank &RegBank, in emitComposeSubRegIndices()
724 CodeGenRegBank &RegBank, in emitComposeSubRegIndexLaneMask()
825 CodeGenRegBank &RegBank) { in runMCDesc()
1096 CodeGenRegBank &RegBank) { in runTargetHeader()
1166 CodeGenRegBank &RegBank){ in runTargetDesc()
1570 CodeGenRegBank &RegBank = Target.getRegBank(); in run() local
1581 CodeGenRegBank &RegBank = Target.getRegBank(); in debugDump() local
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| D | CodeGenTarget.h | 54 mutable std::unique_ptr<CodeGenRegBank> RegBank; variable
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| /external/llvm/utils/TableGen/ |
| D | CodeGenRegisters.cpp | 56 void CodeGenSubRegIndex::updateComponents(CodeGenRegBank &RegBank) { in updateComponents()
117 void CodeGenRegister::buildObjectGraph(CodeGenRegBank &RegBank) { in buildObjectGraph()
202 bool CodeGenRegister::inheritRegUnits(CodeGenRegBank &RegBank) { in inheritRegUnits()
215 CodeGenRegister::computeSubRegs(CodeGenRegBank &RegBank) { in computeSubRegs()
410 void CodeGenRegister::computeSecondarySubRegs(CodeGenRegBank &RegBank) { in computeSecondarySubRegs()
478 void CodeGenRegister::computeSuperRegs(CodeGenRegBank &RegBank) { in computeSuperRegs()
653 CodeGenRegisterClass::CodeGenRegisterClass(CodeGenRegBank &RegBank, Record *R) in CodeGenRegisterClass()
722 CodeGenRegisterClass::CodeGenRegisterClass(CodeGenRegBank &RegBank, in CodeGenRegisterClass()
739 void CodeGenRegisterClass::inheritProperties(CodeGenRegBank &RegBank) { in inheritProperties()
850 void CodeGenRegisterClass::computeSubClasses(CodeGenRegBank &RegBank) { in computeSubClasses()
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| D | RegisterInfoEmitter.cpp | 190 EmitRegUnitPressure(raw_ostream &OS, const CodeGenRegBank &RegBank, in EmitRegUnitPressure()
648 CodeGenRegBank &RegBank, in emitComposeSubRegIndices()
718 CodeGenRegBank &RegBank, in emitComposeSubRegIndexLaneMask()
816 CodeGenRegBank &RegBank) { in runMCDesc()
1092 CodeGenRegBank &RegBank) { in runTargetHeader()
1161 CodeGenRegBank &RegBank){ in runTargetDesc()
1527 CodeGenRegBank &RegBank = Target.getRegBank(); in run() local
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| D | CodeGenTarget.h | 70 mutable std::unique_ptr<CodeGenRegBank> RegBank; variable
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| /external/llvm/lib/CodeGen/GlobalISel/ |
| D | RegisterBankInfo.cpp | 60 RegisterBank &RegBank = getRegBank(ID); in createRegisterBank() local
195 const RegisterBank &RegBank = getRegBankFromRegClass(*RC); in getRegBankFromConstraints() local
220 const RegisterBank *RegBank = nullptr; in getInstrMappingImpl() local
454 unsigned OpIdx, unsigned MaskSize, const RegisterBank &RegBank) { in setOperandMapping()
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| /external/swiftshader/third_party/LLVM/utils/TableGen/ |
| D | RegisterInfoEmitter.cpp | 243 CodeGenRegBank &RegBank) { in runMCDesc()
407 CodeGenRegBank &RegBank) { in runTargetHeader()
483 CodeGenRegBank &RegBank){ in runTargetDesc()
842 CodeGenRegBank &RegBank = Target.getRegBank(); in run() local
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| D | CodeGenRegisters.cpp | 49 CodeGenRegister::getSubRegs(CodeGenRegBank &RegBank) { in getSubRegs()
258 CodeGenRegisterClass::CodeGenRegisterClass(CodeGenRegBank &RegBank, Record *R) in CodeGenRegisterClass()
351 void CodeGenRegisterClass::inheritProperties(CodeGenRegBank &RegBank) { in inheritProperties()
463 void CodeGenRegisterClass::computeSubClasses(CodeGenRegBank &RegBank) { in computeSubClasses()
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| D | CodeGenTarget.h | 68 mutable CodeGenRegBank *RegBank; variable
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/ |
| D | RegisterBankInfo.cpp | 73 const RegisterBank &RegBank = getRegBank(Idx); in verify() local
121 const RegisterBank &RegBank = getRegBankFromRegClass(*RC); in getRegBankFromConstraints() local
234 const RegisterBank *RegBank) { in hashPartialMapping()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMInstructionSelector.cpp | 124 const RegisterBank *RegBank = RBI.getRegBank(Reg, MRI, TRI); in guessRegClass() local
250 static unsigned selectLoadStoreOpCode(unsigned Opc, unsigned RegBank, in selectLoadStoreOpCode()
896 unsigned RegBank = RBI.getRegBank(Reg, MRI, TRI)->getID(); in select() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/MIRParser/ |
| D | MIParser.h | 40 const RegisterBank *RegBank; member
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| D | MIRParser.cpp | 456 const RegisterBank *RegBank = getRegBank(MF, VReg.Class.Value); in parseRegisterInfo() local
865 const auto &RegBank = RBI->getRegBank(I); in initNames2RegBanks() local
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| D | MIParser.cpp | 1060 const RegisterBank *RegBank = nullptr; in parseRegisterClassOrBank() local
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| /external/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | RegisterBankInfo.h | 54 const RegisterBank *RegBank; member
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | RegisterBankInfo.h | 59 const RegisterBank *RegBank; member
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| /external/llvm/lib/CodeGen/MIRParser/ |
| D | MIRParser.cpp | 380 const auto *RegBank = getRegBank(MF, VReg.Class.Value); in initializeRegisterInfo() local
736 const auto &RegBank = RBI->getRegBank(I); in initNames2RegBanks() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86InstructionSelector.cpp | 199 const RegisterBank &RegBank = *RBI.getRegBank(Reg, MRI, TRI); in getRegClass() local
1260 const RegisterBank &RegBank = *RBI.getRegBank(DstReg, MRI, TRI); in selectMergeValues() local
1329 const RegisterBank &RegBank = *RBI.getRegBank(DstReg, MRI, TRI); in materializeFP() local
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| /external/llvm/lib/CodeGen/ |
| D | MachineRegisterInfo.cpp | 45 const RegisterBank &RegBank) { in setRegBank()
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| D | MachineVerifier.cpp | 998 const RegisterBank *RegBank = MRI->getRegBankOrNull(Reg); in visitMachineOperand() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstructionSelector.cpp | 352 const RegisterBank &RegBank = *RBI.getRegBank(SrcReg, MRI, TRI); in selectCopy() local
362 const RegisterBank &RegBank = *RBI.getRegBank(DstReg, MRI, TRI); in selectCopy() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | MachineRegisterInfo.cpp | 65 const RegisterBank &RegBank) { in setRegBank()
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| D | MachineVerifier.cpp | 1232 const RegisterBank *RegBank = MRI->getRegBankOrNull(Reg); in visitMachineOperand() local
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