| /external/swiftshader/third_party/LLVM/utils/TableGen/ |
| D | CallingConvEmitter.cpp | 94 ListInit *RegList = Action->getValueAsListInit("RegList"); in EmitAction() local
115 ListInit *RegList = Action->getValueAsListInit("RegList"); in EmitAction() local
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| D | CodeGenRegisters.cpp | 712 std::vector<Record*> RegList = Reg->TheDef->getValueAsListOfDefs("Aliases"); in computeOverlaps() local
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| /external/v8/src/ |
| D | reglist.h | 18 typedef uint64_t RegList; typedef
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86CallingConv.cpp | 27 static const MCPhysReg RegList[] = {X86::EAX, X86::ECX, X86::EDX, X86::EDI, in CC_X86_32_RegCall_Assign2Regs() local
90 ArrayRef<MCPhysReg> RegList = CC_X86_VectorCallGetSSEs(ValVT); in CC_X86_VectorCallAssignRegister() local
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| D | X86CallingConv.h | 67 static const MCPhysReg RegList[] = {X86::EAX, X86::EDX, X86::ECX}; in CC_X86_32_MCUInReg() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
| D | CallingConvEmitter.cpp | 113 ListInit *RegList = Action->getValueAsListInit("RegList"); in EmitAction() local
134 ListInit *RegList = Action->getValueAsListInit("RegList"); in EmitAction() local
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| /external/llvm/utils/TableGen/ |
| D | CallingConvEmitter.cpp | 113 ListInit *RegList = Action->getValueAsListInit("RegList"); in EmitAction() local
134 ListInit *RegList = Action->getValueAsListInit("RegList"); in EmitAction() local
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| /external/llvm/lib/Target/X86/ |
| D | X86CallingConv.h | 53 static const MCPhysReg RegList[] = {X86::EAX, X86::EDX, X86::ECX}; in CC_X86_32_MCUInReg() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMCallingConv.h | 31 static const MCPhysReg RegList[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3 }; in f64AssignAPCS() local
206 ArrayRef<MCPhysReg> RegList; in CC_ARM_AAPCS_Custom_Aggregate() local
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| D | ARMBaseRegisterInfo.cpp | 69 const MCPhysReg *RegList = in getCalleeSavedRegs() local
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMCallingConv.h | 31 static const MCPhysReg RegList[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3 }; in f64AssignAPCS() local
206 ArrayRef<MCPhysReg> RegList; in CC_ARM_AAPCS_Custom_Aggregate() local
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| D | ARMBaseRegisterInfo.cpp | 64 const MCPhysReg *RegList = in getCalleeSavedRegs() local
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| D | ARMAsmPrinter.cpp | 1161 SmallVector<unsigned, 4> RegList; in EmitUnwindingInstruction() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64CallingConvention.h | 89 ArrayRef<MCPhysReg> RegList; in CC_AArch64_Custom_Block() local
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64CallingConvention.h | 89 ArrayRef<MCPhysReg> RegList; in CC_AArch64_Custom_Block() local
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMCallingConv.h | 32 static const unsigned RegList[] = { ARM::R0, ARM::R1, ARM::R2, ARM::R3 }; in f64AssignAPCS() local
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMTargetStreamer.cpp | 56 void ARMTargetStreamer::emitRegSave(const SmallVectorImpl<unsigned> &RegList, in emitRegSave()
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| D | ARMELFStreamer.cpp | 137 void ARMTargetAsmStreamer::emitRegSave(const SmallVectorImpl<unsigned> &RegList, in emitRegSave()
649 void ARMTargetELFStreamer::emitRegSave(const SmallVectorImpl<unsigned> &RegList, in emitRegSave()
1328 void ARMELFStreamer::emitRegSave(const SmallVectorImpl<unsigned> &RegList, in emitRegSave()
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| /external/llvm/lib/CodeGen/ |
| D | MachineCopyPropagation.cpp | 35 typedef SmallVector<unsigned, 4> RegList; typedef
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMTargetStreamer.cpp | 99 void ARMTargetStreamer::emitRegSave(const SmallVectorImpl<unsigned> &RegList, in emitRegSave()
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| D | ARMELFStreamer.cpp | 158 void ARMTargetAsmStreamer::emitRegSave(const SmallVectorImpl<unsigned> &RegList, in emitRegSave()
743 void ARMTargetELFStreamer::emitRegSave(const SmallVectorImpl<unsigned> &RegList, in emitRegSave()
1440 void ARMELFStreamer::emitRegSave(const SmallVectorImpl<unsigned> &RegList, in emitRegSave()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | MachineCopyPropagation.cpp | 77 using RegList = SmallVector<unsigned, 4>; typedef
|
| /external/vixl/src/aarch64/ |
| D | operands-aarch64.h | 35 typedef uint64_t RegList; typedef
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| /external/swiftshader/third_party/LLVM/lib/MC/ |
| D | MCStreamer.cpp | 597 void MCStreamer::EmitRegSave(const SmallVectorImpl<unsigned> &RegList, bool) { in EmitRegSave()
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| D | MCAsmStreamer.cpp | 1213 void MCAsmStreamer::EmitRegSave(const SmallVectorImpl<unsigned> &RegList, in EmitRegSave()
|