1 /*
2 * Copyright (C) 2012 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 #include "disassembler_mips.h"
18
19 #include <ostream>
20 #include <sstream>
21
22 #include "android-base/logging.h"
23 #include "android-base/stringprintf.h"
24
25 #include "base/bit_utils.h"
26
27 using android::base::StringPrintf;
28
29 namespace art {
30 namespace mips {
31
32 struct MipsInstruction {
33 uint32_t mask;
34 uint32_t value;
35 const char* name;
36 const char* args_fmt;
37
Matchesart::mips::MipsInstruction38 bool Matches(uint32_t instruction) const {
39 return (instruction & mask) == value;
40 }
41 };
42
43 static const char* gO32AbiRegNames[] = {
44 "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
45 "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7",
46 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
47 "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra"
48 };
49
50 static const char* gN64AbiRegNames[] = {
51 "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
52 "a4", "a5", "a6", "a7", "t0", "t1", "t2", "t3",
53 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
54 "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra"
55 };
56
57 static const uint32_t kOpcodeShift = 26;
58
59 static const uint32_t kCop1 = (17 << kOpcodeShift);
60 static const uint32_t kMsa = (30 << kOpcodeShift); // MSA major opcode.
61
62 static const uint32_t kITypeMask = (0x3f << kOpcodeShift);
63 static const uint32_t kJTypeMask = (0x3f << kOpcodeShift);
64 static const uint32_t kRTypeMask = ((0x3f << kOpcodeShift) | (0x3f));
65 static const uint32_t kSpecial0Mask = (0x3f << kOpcodeShift);
66 static const uint32_t kSpecial2Mask = (0x3f << kOpcodeShift);
67 static const uint32_t kSpecial3Mask = (0x3f << kOpcodeShift);
68 static const uint32_t kFpMask = kRTypeMask;
69 static const uint32_t kMsaMask = kRTypeMask;
70 static const uint32_t kMsaSpecialMask = (0x3f << kOpcodeShift);
71
72 static const MipsInstruction gMipsInstructions[] = {
73 // "sll r0, r0, 0" is the canonical "nop", used in delay slots.
74 { 0xffffffff, 0, "nop", "" },
75
76 // R-type instructions.
77 { kRTypeMask, 0, "sll", "DTA", },
78 // 0, 1, movci
79 { kRTypeMask | (0x1f << 21), 2, "srl", "DTA", },
80 { kRTypeMask, 3, "sra", "DTA", },
81 { kRTypeMask | (0x1f << 6), 4, "sllv", "DTS", },
82 { kRTypeMask | (0x1f << 6), 6, "srlv", "DTS", },
83 { kRTypeMask | (0x1f << 6), (1 << 6) | 6, "rotrv", "DTS", },
84 { kRTypeMask | (0x1f << 6), 7, "srav", "DTS", },
85 { kRTypeMask, 8, "jr", "S", },
86 { kRTypeMask | (0x1f << 11), 9 | (31 << 11), "jalr", "S", }, // rd = 31 is implicit.
87 { kRTypeMask | (0x1f << 11), 9, "jr", "S", }, // rd = 0 is implicit.
88 { kRTypeMask, 9, "jalr", "DS", }, // General case.
89 { kRTypeMask | (0x1f << 6), 10, "movz", "DST", },
90 { kRTypeMask | (0x1f << 6), 11, "movn", "DST", },
91 { kRTypeMask, 12, "syscall", "", }, // TODO: code
92 { kRTypeMask, 13, "break", "", }, // TODO: code
93 { kRTypeMask, 15, "sync", "", }, // TODO: type
94 { kRTypeMask, 16, "mfhi", "D", },
95 { kRTypeMask, 17, "mthi", "S", },
96 { kRTypeMask, 18, "mflo", "D", },
97 { kRTypeMask, 19, "mtlo", "S", },
98 { kRTypeMask | (0x1f << 6), 20, "dsllv", "DTS", },
99 { kRTypeMask | (0x1f << 6), 22, "dsrlv", "DTS", },
100 { kRTypeMask | (0x1f << 6), (1 << 6) | 22, "drotrv", "DTS", },
101 { kRTypeMask | (0x1f << 6), 23, "dsrav", "DTS", },
102 { kRTypeMask | (0x1f << 6), 24, "mult", "ST", },
103 { kRTypeMask | (0x1f << 6), 25, "multu", "ST", },
104 { kRTypeMask | (0x1f << 6), 26, "div", "ST", },
105 { kRTypeMask | (0x1f << 6), 27, "divu", "ST", },
106 { kRTypeMask | (0x1f << 6), 24 + (2 << 6), "mul", "DST", },
107 { kRTypeMask | (0x1f << 6), 24 + (3 << 6), "muh", "DST", },
108 { kRTypeMask | (0x1f << 6), 26 + (2 << 6), "div", "DST", },
109 { kRTypeMask | (0x1f << 6), 26 + (3 << 6), "mod", "DST", },
110 { kRTypeMask, 32, "add", "DST", },
111 { kRTypeMask, 33, "addu", "DST", },
112 { kRTypeMask, 34, "sub", "DST", },
113 { kRTypeMask, 35, "subu", "DST", },
114 { kRTypeMask, 36, "and", "DST", },
115 { kRTypeMask | (0x1f << 16), 37 | (0 << 16), "move", "DS" },
116 { kRTypeMask | (0x1f << 21), 37 | (0 << 21), "move", "DT" },
117 { kRTypeMask, 37, "or", "DST", },
118 { kRTypeMask, 38, "xor", "DST", },
119 { kRTypeMask, 39, "nor", "DST", },
120 { kRTypeMask, 42, "slt", "DST", },
121 { kRTypeMask, 43, "sltu", "DST", },
122 { kRTypeMask, 45, "daddu", "DST", },
123 { kRTypeMask, 46, "dsub", "DST", },
124 { kRTypeMask, 47, "dsubu", "DST", },
125 // TODO: tge[u], tlt[u], teg, tne
126 { kRTypeMask | (0x1f << 21), 56, "dsll", "DTA", },
127 { kRTypeMask | (0x1f << 21), 58, "dsrl", "DTA", },
128 { kRTypeMask | (0x1f << 21), (1 << 21) | 58, "drotr", "DTA", },
129 { kRTypeMask | (0x1f << 21), 59, "dsra", "DTA", },
130 { kRTypeMask | (0x1f << 21), 60, "dsll32", "DTA", },
131 { kRTypeMask | (0x1f << 21), 62, "dsrl32", "DTA", },
132 { kRTypeMask | (0x1f << 21), (1 << 21) | 62, "drotr32", "DTA", },
133 { kRTypeMask | (0x1f << 21), 63, "dsra32", "DTA", },
134
135 // SPECIAL0
136 { kSpecial0Mask | 0x307ff, 1, "movf", "DSc" },
137 { kSpecial0Mask | 0x307ff, 0x10001, "movt", "DSc" },
138 { kSpecial0Mask | 0x7ff, (2 << 6) | 24, "mul", "DST" },
139 { kSpecial0Mask | 0x7ff, (3 << 6) | 24, "muh", "DST" },
140 { kSpecial0Mask | 0x7ff, (2 << 6) | 25, "mulu", "DST" },
141 { kSpecial0Mask | 0x7ff, (3 << 6) | 25, "muhu", "DST" },
142 { kSpecial0Mask | 0x7ff, (2 << 6) | 26, "div", "DST" },
143 { kSpecial0Mask | 0x7ff, (3 << 6) | 26, "mod", "DST" },
144 { kSpecial0Mask | 0x7ff, (2 << 6) | 27, "divu", "DST" },
145 { kSpecial0Mask | 0x7ff, (3 << 6) | 27, "modu", "DST" },
146 { kSpecial0Mask | 0x7ff, (2 << 6) | 28, "dmul", "DST" },
147 { kSpecial0Mask | 0x7ff, (3 << 6) | 28, "dmuh", "DST" },
148 { kSpecial0Mask | 0x7ff, (2 << 6) | 29, "dmulu", "DST" },
149 { kSpecial0Mask | 0x7ff, (3 << 6) | 29, "dmuhu", "DST" },
150 { kSpecial0Mask | 0x7ff, (2 << 6) | 30, "ddiv", "DST" },
151 { kSpecial0Mask | 0x7ff, (3 << 6) | 30, "dmod", "DST" },
152 { kSpecial0Mask | 0x7ff, (2 << 6) | 31, "ddivu", "DST" },
153 { kSpecial0Mask | 0x7ff, (3 << 6) | 31, "dmodu", "DST" },
154 { kSpecial0Mask | 0x7ff, (0 << 6) | 53, "seleqz", "DST" },
155 { kSpecial0Mask | 0x7ff, (0 << 6) | 55, "selnez", "DST" },
156 { kSpecial0Mask | (0x1f << 21) | 0x3f, (1 << 21) | 2, "rotr", "DTA", },
157 { kSpecial0Mask | (0x1f << 16) | 0x7ff, (0x01 << 6) | 0x10, "clz", "DS" },
158 { kSpecial0Mask | (0x1f << 16) | 0x7ff, (0x01 << 6) | 0x11, "clo", "DS" },
159 { kSpecial0Mask | (0x1f << 16) | 0x7ff, (0x01 << 6) | 0x12, "dclz", "DS" },
160 { kSpecial0Mask | (0x1f << 16) | 0x7ff, (0x01 << 6) | 0x13, "dclo", "DS" },
161 { kSpecial0Mask | 0x73f, 0x05, "lsa", "DSTj" },
162 { kSpecial0Mask | 0x73f, 0x15, "dlsa", "DSTj" },
163 // TODO: sdbbp
164
165 // SPECIAL2
166 { kSpecial2Mask | 0x7ff, (28 << kOpcodeShift) | 2, "mul", "DST" },
167 { kSpecial2Mask | 0x7ff, (28 << kOpcodeShift) | 32, "clz", "DS" },
168 { kSpecial2Mask | 0x7ff, (28 << kOpcodeShift) | 33, "clo", "DS" },
169 { kSpecial2Mask | 0xffff, (28 << kOpcodeShift) | 0, "madd", "ST" },
170 { kSpecial2Mask | 0xffff, (28 << kOpcodeShift) | 1, "maddu", "ST" },
171 { kSpecial2Mask | 0xffff, (28 << kOpcodeShift) | 2, "mul", "DST" },
172 { kSpecial2Mask | 0xffff, (28 << kOpcodeShift) | 4, "msub", "ST" },
173 { kSpecial2Mask | 0xffff, (28 << kOpcodeShift) | 5, "msubu", "ST" },
174 { kSpecial2Mask | 0x3f, (28 << kOpcodeShift) | 0x3f, "sdbbp", "" }, // TODO: code
175
176 // SPECIAL3
177 { kSpecial3Mask | 0x3f, (31 << kOpcodeShift), "ext", "TSAZ", },
178 { kSpecial3Mask | 0x3f, (31 << kOpcodeShift) | 3, "dext", "TSAZ", },
179 { kSpecial3Mask | 0x3f, (31 << kOpcodeShift) | 4, "ins", "TSAz", },
180 { kSpecial3Mask | 0x3f, (31 << kOpcodeShift) | 5, "dinsm", "TSAJ", },
181 { kSpecial3Mask | 0x3f, (31 << kOpcodeShift) | 6, "dinsu", "TSFz", },
182 { kSpecial3Mask | 0x3f, (31 << kOpcodeShift) | 7, "dins", "TSAz", },
183 { kSpecial3Mask | (0x1f << 21) | (0x1f << 6) | 0x3f,
184 (31 << kOpcodeShift) | (16 << 6) | 32,
185 "seb",
186 "DT", },
187 { kSpecial3Mask | (0x1f << 21) | (0x1f << 6) | 0x3f,
188 (31 << kOpcodeShift) | (24 << 6) | 32,
189 "seh",
190 "DT", },
191 { kSpecial3Mask | (0x1f << 21) | (0x1f << 6) | 0x3f,
192 (31 << kOpcodeShift) | 32,
193 "bitswap",
194 "DT", },
195 { kSpecial3Mask | (0x1f << 21) | (0x1f << 6) | 0x3f,
196 (31 << kOpcodeShift) | 36,
197 "dbitswap",
198 "DT", },
199 { kSpecial3Mask | (0x1f << 21) | (0x1f << 6) | 0x3f,
200 (31 << kOpcodeShift) | (2 << 6) | 36,
201 "dsbh",
202 "DT", },
203 { kSpecial3Mask | (0x1f << 21) | (0x1f << 6) | 0x3f,
204 (31 << kOpcodeShift) | (5 << 6) | 36,
205 "dshd",
206 "DT", },
207 { kSpecial3Mask | (0x1f << 21) | (0x1f << 6) | 0x3f,
208 (31 << kOpcodeShift) | (2 << 6) | 32,
209 "wsbh",
210 "DT", },
211 { kSpecial3Mask | 0x7f, (31 << kOpcodeShift) | 0x26, "sc", "Tl", },
212 { kSpecial3Mask | 0x7f, (31 << kOpcodeShift) | 0x27, "scd", "Tl", },
213 { kSpecial3Mask | 0x7f, (31 << kOpcodeShift) | 0x36, "ll", "Tl", },
214 { kSpecial3Mask | 0x7f, (31 << kOpcodeShift) | 0x37, "lld", "Tl", },
215
216 // J-type instructions.
217 { kJTypeMask, 2 << kOpcodeShift, "j", "L" },
218 { kJTypeMask, 3 << kOpcodeShift, "jal", "L" },
219
220 // I-type instructions.
221 { kITypeMask | (0x3ff << 16), 4 << kOpcodeShift, "b", "B" },
222 { kITypeMask | (0x1f << 16), 4 << kOpcodeShift | (0 << 16), "beqz", "SB" },
223 { kITypeMask | (0x1f << 21), 4 << kOpcodeShift | (0 << 21), "beqz", "TB" },
224 { kITypeMask, 4 << kOpcodeShift, "beq", "STB" },
225 { kITypeMask | (0x1f << 16), 5 << kOpcodeShift | (0 << 16), "bnez", "SB" },
226 { kITypeMask | (0x1f << 21), 5 << kOpcodeShift | (0 << 21), "bnez", "TB" },
227 { kITypeMask, 5 << kOpcodeShift, "bne", "STB" },
228 { kITypeMask | (0x1f << 16), 1 << kOpcodeShift | (1 << 16), "bgez", "SB" },
229 { kITypeMask | (0x1f << 16), 1 << kOpcodeShift | (0 << 16), "bltz", "SB" },
230 { kITypeMask | (0x3ff << 16), 1 << kOpcodeShift | (16 << 16), "nal", "" },
231 { kITypeMask | (0x1f << 16), 1 << kOpcodeShift | (16 << 16), "bltzal", "SB" },
232 { kITypeMask | (0x3ff << 16), 1 << kOpcodeShift | (17 << 16), "bal", "B" },
233 { kITypeMask | (0x1f << 16), 1 << kOpcodeShift | (17 << 16), "bgezal", "SB" },
234 { kITypeMask | (0x1f << 16), 6 << kOpcodeShift | (0 << 16), "blez", "SB" },
235 { kITypeMask, 6 << kOpcodeShift, "bgeuc", "STB" },
236 { kITypeMask | (0x1f << 16), 7 << kOpcodeShift | (0 << 16), "bgtz", "SB" },
237 { kITypeMask, 7 << kOpcodeShift, "bltuc", "STB" },
238 { kITypeMask | (0x1f << 16), 1 << kOpcodeShift | (6 << 16), "dahi", "Si", },
239 { kITypeMask | (0x1f << 16), 1 << kOpcodeShift | (30 << 16), "dati", "Si", },
240
241 { kITypeMask, 8 << kOpcodeShift, "beqc", "STB" },
242
243 { kITypeMask | (0x1f << 21), 9 << kOpcodeShift | (0 << 21), "li", "Ti" },
244 { kITypeMask, 9 << kOpcodeShift, "addiu", "TSi", },
245 { kITypeMask, 10 << kOpcodeShift, "slti", "TSi", },
246 { kITypeMask, 11 << kOpcodeShift, "sltiu", "TSi", },
247 { kITypeMask, 12 << kOpcodeShift, "andi", "TSI", },
248 { kITypeMask | (0x1f << 21), 13 << kOpcodeShift | (0 << 21), "li", "TI" },
249 { kITypeMask, 13 << kOpcodeShift, "ori", "TSI", },
250 { kITypeMask, 14 << kOpcodeShift, "xori", "TSI", },
251 { kITypeMask | (0x1f << 21), 15 << kOpcodeShift, "lui", "Ti", },
252 { kITypeMask, 15 << kOpcodeShift, "aui", "TSi", },
253
254 { kITypeMask | (0x3e3 << 16), (17 << kOpcodeShift) | (8 << 21), "bc1f", "cB" },
255 { kITypeMask | (0x3e3 << 16), (17 << kOpcodeShift) | (8 << 21) | (1 << 16), "bc1t", "cB" },
256 { kITypeMask | (0x1f << 21), (17 << kOpcodeShift) | (9 << 21), "bc1eqz", "tB" },
257 { kITypeMask | (0x1f << 21), (17 << kOpcodeShift) | (13 << 21), "bc1nez", "tB" },
258
259 { kITypeMask | (0x1f << 21), 22 << kOpcodeShift, "blezc", "TB" },
260
261 // TODO: de-dup
262 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (1 << 21) | (1 << 16), "bgezc", "TB" },
263 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (2 << 21) | (2 << 16), "bgezc", "TB" },
264 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (3 << 21) | (3 << 16), "bgezc", "TB" },
265 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (4 << 21) | (4 << 16), "bgezc", "TB" },
266 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (5 << 21) | (5 << 16), "bgezc", "TB" },
267 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (6 << 21) | (6 << 16), "bgezc", "TB" },
268 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (7 << 21) | (7 << 16), "bgezc", "TB" },
269 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (8 << 21) | (8 << 16), "bgezc", "TB" },
270 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (9 << 21) | (9 << 16), "bgezc", "TB" },
271 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (10 << 21) | (10 << 16), "bgezc", "TB" },
272 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (11 << 21) | (11 << 16), "bgezc", "TB" },
273 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (12 << 21) | (12 << 16), "bgezc", "TB" },
274 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (13 << 21) | (13 << 16), "bgezc", "TB" },
275 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (14 << 21) | (14 << 16), "bgezc", "TB" },
276 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (15 << 21) | (15 << 16), "bgezc", "TB" },
277 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (16 << 21) | (16 << 16), "bgezc", "TB" },
278 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (17 << 21) | (17 << 16), "bgezc", "TB" },
279 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (18 << 21) | (18 << 16), "bgezc", "TB" },
280 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (19 << 21) | (19 << 16), "bgezc", "TB" },
281 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (20 << 21) | (20 << 16), "bgezc", "TB" },
282 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (21 << 21) | (21 << 16), "bgezc", "TB" },
283 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (22 << 21) | (22 << 16), "bgezc", "TB" },
284 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (23 << 21) | (23 << 16), "bgezc", "TB" },
285 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (24 << 21) | (24 << 16), "bgezc", "TB" },
286 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (25 << 21) | (25 << 16), "bgezc", "TB" },
287 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (26 << 21) | (26 << 16), "bgezc", "TB" },
288 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (27 << 21) | (27 << 16), "bgezc", "TB" },
289 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (28 << 21) | (28 << 16), "bgezc", "TB" },
290 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (29 << 21) | (29 << 16), "bgezc", "TB" },
291 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (30 << 21) | (30 << 16), "bgezc", "TB" },
292 { kITypeMask | (0x3ff << 16), (22 << kOpcodeShift) | (31 << 21) | (31 << 16), "bgezc", "TB" },
293
294 { kITypeMask, 22 << kOpcodeShift, "bgec", "STB" },
295
296 { kITypeMask | (0x1f << 21), 23 << kOpcodeShift, "bgtzc", "TB" },
297
298 // TODO: de-dup
299 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (1 << 21) | (1 << 16), "bltzc", "TB" },
300 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (2 << 21) | (2 << 16), "bltzc", "TB" },
301 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (3 << 21) | (3 << 16), "bltzc", "TB" },
302 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (4 << 21) | (4 << 16), "bltzc", "TB" },
303 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (5 << 21) | (5 << 16), "bltzc", "TB" },
304 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (6 << 21) | (6 << 16), "bltzc", "TB" },
305 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (7 << 21) | (7 << 16), "bltzc", "TB" },
306 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (8 << 21) | (8 << 16), "bltzc", "TB" },
307 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (9 << 21) | (9 << 16), "bltzc", "TB" },
308 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (10 << 21) | (10 << 16), "bltzc", "TB" },
309 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (11 << 21) | (11 << 16), "bltzc", "TB" },
310 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (12 << 21) | (12 << 16), "bltzc", "TB" },
311 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (13 << 21) | (13 << 16), "bltzc", "TB" },
312 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (14 << 21) | (14 << 16), "bltzc", "TB" },
313 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (15 << 21) | (15 << 16), "bltzc", "TB" },
314 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (16 << 21) | (16 << 16), "bltzc", "TB" },
315 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (17 << 21) | (17 << 16), "bltzc", "TB" },
316 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (18 << 21) | (18 << 16), "bltzc", "TB" },
317 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (19 << 21) | (19 << 16), "bltzc", "TB" },
318 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (20 << 21) | (20 << 16), "bltzc", "TB" },
319 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (21 << 21) | (21 << 16), "bltzc", "TB" },
320 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (22 << 21) | (22 << 16), "bltzc", "TB" },
321 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (23 << 21) | (23 << 16), "bltzc", "TB" },
322 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (24 << 21) | (24 << 16), "bltzc", "TB" },
323 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (25 << 21) | (25 << 16), "bltzc", "TB" },
324 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (26 << 21) | (26 << 16), "bltzc", "TB" },
325 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (27 << 21) | (27 << 16), "bltzc", "TB" },
326 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (28 << 21) | (28 << 16), "bltzc", "TB" },
327 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (29 << 21) | (29 << 16), "bltzc", "TB" },
328 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (30 << 21) | (30 << 16), "bltzc", "TB" },
329 { kITypeMask | (0x3ff << 16), (23 << kOpcodeShift) | (31 << 21) | (31 << 16), "bltzc", "TB" },
330
331 { kITypeMask, 23 << kOpcodeShift, "bltc", "STB" },
332
333 { kITypeMask, 24 << kOpcodeShift, "bnec", "STB" },
334
335 { kITypeMask | (0x1f << 21), 25 << kOpcodeShift | (0 << 21), "dli", "Ti" },
336 { kITypeMask, 25 << kOpcodeShift, "daddiu", "TSi", },
337 { kITypeMask, 29 << kOpcodeShift, "daui", "TSi", },
338
339 { kITypeMask, 32u << kOpcodeShift, "lb", "TO", },
340 { kITypeMask, 33u << kOpcodeShift, "lh", "TO", },
341 { kITypeMask, 34u << kOpcodeShift, "lwl", "TO", },
342 { kITypeMask, 35u << kOpcodeShift, "lw", "TO", },
343 { kITypeMask, 36u << kOpcodeShift, "lbu", "TO", },
344 { kITypeMask, 37u << kOpcodeShift, "lhu", "TO", },
345 { kITypeMask, 38u << kOpcodeShift, "lwr", "TO", },
346 { kITypeMask, 39u << kOpcodeShift, "lwu", "TO", },
347 { kITypeMask, 40u << kOpcodeShift, "sb", "TO", },
348 { kITypeMask, 41u << kOpcodeShift, "sh", "TO", },
349 { kITypeMask, 42u << kOpcodeShift, "swl", "TO", },
350 { kITypeMask, 43u << kOpcodeShift, "sw", "TO", },
351 { kITypeMask, 46u << kOpcodeShift, "swr", "TO", },
352 { kITypeMask, 48u << kOpcodeShift, "ll", "TO", },
353 { kITypeMask, 49u << kOpcodeShift, "lwc1", "tO", },
354 { kJTypeMask, 50u << kOpcodeShift, "bc", "P" },
355 { kITypeMask, 53u << kOpcodeShift, "ldc1", "tO", },
356 { kITypeMask | (0x1f << 21), 54u << kOpcodeShift, "jic", "Ti" },
357 { kITypeMask | (1 << 21), (54u << kOpcodeShift) | (1 << 21), "beqzc", "Sb" }, // TODO: de-dup?
358 { kITypeMask | (1 << 22), (54u << kOpcodeShift) | (1 << 22), "beqzc", "Sb" },
359 { kITypeMask | (1 << 23), (54u << kOpcodeShift) | (1 << 23), "beqzc", "Sb" },
360 { kITypeMask | (1 << 24), (54u << kOpcodeShift) | (1 << 24), "beqzc", "Sb" },
361 { kITypeMask | (1 << 25), (54u << kOpcodeShift) | (1 << 25), "beqzc", "Sb" },
362 { kITypeMask, 55u << kOpcodeShift, "ld", "TO", },
363 { kITypeMask, 56u << kOpcodeShift, "sc", "TO", },
364 { kITypeMask, 57u << kOpcodeShift, "swc1", "tO", },
365 { kJTypeMask, 58u << kOpcodeShift, "balc", "P" },
366 { kITypeMask | (0x1f << 16), (59u << kOpcodeShift) | (30 << 16), "auipc", "Si" },
367 { kITypeMask | (0x3 << 19), (59u << kOpcodeShift) | (0 << 19), "addiupc", "Sp" },
368 { kITypeMask | (0x3 << 19), (59u << kOpcodeShift) | (1 << 19), "lwpc", "So" },
369 { kITypeMask | (0x3 << 19), (59u << kOpcodeShift) | (2 << 19), "lwupc", "So" },
370 { kITypeMask | (0x7 << 18), (59u << kOpcodeShift) | (6 << 18), "ldpc", "S0" },
371 { kITypeMask, 61u << kOpcodeShift, "sdc1", "tO", },
372 { kITypeMask | (0x1f << 21), 62u << kOpcodeShift, "jialc", "Ti" },
373 { kITypeMask | (1 << 21), (62u << kOpcodeShift) | (1 << 21), "bnezc", "Sb" }, // TODO: de-dup?
374 { kITypeMask | (1 << 22), (62u << kOpcodeShift) | (1 << 22), "bnezc", "Sb" },
375 { kITypeMask | (1 << 23), (62u << kOpcodeShift) | (1 << 23), "bnezc", "Sb" },
376 { kITypeMask | (1 << 24), (62u << kOpcodeShift) | (1 << 24), "bnezc", "Sb" },
377 { kITypeMask | (1 << 25), (62u << kOpcodeShift) | (1 << 25), "bnezc", "Sb" },
378 { kITypeMask, 63u << kOpcodeShift, "sd", "TO", },
379
380 // Floating point.
381 { kFpMask | (0x1f << 21), kCop1 | (0x00 << 21), "mfc1", "Td" },
382 { kFpMask | (0x1f << 21), kCop1 | (0x01 << 21), "dmfc1", "Td" },
383 { kFpMask | (0x1f << 21), kCop1 | (0x03 << 21), "mfhc1", "Td" },
384 { kFpMask | (0x1f << 21), kCop1 | (0x04 << 21), "mtc1", "Td" },
385 { kFpMask | (0x1f << 21), kCop1 | (0x05 << 21), "dmtc1", "Td" },
386 { kFpMask | (0x1f << 21), kCop1 | (0x07 << 21), "mthc1", "Td" },
387 { kFpMask | (0x1f << 21), kCop1 | (0x14 << 21) | 1, "cmp.un.s", "adt" },
388 { kFpMask | (0x1f << 21), kCop1 | (0x14 << 21) | 2, "cmp.eq.s", "adt" },
389 { kFpMask | (0x1f << 21), kCop1 | (0x14 << 21) | 3, "cmp.ueq.s", "adt" },
390 { kFpMask | (0x1f << 21), kCop1 | (0x14 << 21) | 4, "cmp.lt.s", "adt" },
391 { kFpMask | (0x1f << 21), kCop1 | (0x14 << 21) | 5, "cmp.ult.s", "adt" },
392 { kFpMask | (0x1f << 21), kCop1 | (0x14 << 21) | 6, "cmp.le.s", "adt" },
393 { kFpMask | (0x1f << 21), kCop1 | (0x14 << 21) | 7, "cmp.ule.s", "adt" },
394 { kFpMask | (0x1f << 21), kCop1 | (0x14 << 21) | 17, "cmp.or.s", "adt" },
395 { kFpMask | (0x1f << 21), kCop1 | (0x14 << 21) | 18, "cmp.une.s", "adt" },
396 { kFpMask | (0x1f << 21), kCop1 | (0x14 << 21) | 19, "cmp.ne.s", "adt" },
397 { kFpMask | (0x1f << 21), kCop1 | (0x15 << 21) | 1, "cmp.un.d", "adt" },
398 { kFpMask | (0x1f << 21), kCop1 | (0x15 << 21) | 2, "cmp.eq.d", "adt" },
399 { kFpMask | (0x1f << 21), kCop1 | (0x15 << 21) | 3, "cmp.ueq.d", "adt" },
400 { kFpMask | (0x1f << 21), kCop1 | (0x15 << 21) | 4, "cmp.lt.d", "adt" },
401 { kFpMask | (0x1f << 21), kCop1 | (0x15 << 21) | 5, "cmp.ult.d", "adt" },
402 { kFpMask | (0x1f << 21), kCop1 | (0x15 << 21) | 6, "cmp.le.d", "adt" },
403 { kFpMask | (0x1f << 21), kCop1 | (0x15 << 21) | 7, "cmp.ule.d", "adt" },
404 { kFpMask | (0x1f << 21), kCop1 | (0x15 << 21) | 17, "cmp.or.d", "adt" },
405 { kFpMask | (0x1f << 21), kCop1 | (0x15 << 21) | 18, "cmp.une.d", "adt" },
406 { kFpMask | (0x1f << 21), kCop1 | (0x15 << 21) | 19, "cmp.ne.d", "adt" },
407 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 0, "add", "fadt" },
408 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 1, "sub", "fadt" },
409 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 2, "mul", "fadt" },
410 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 3, "div", "fadt" },
411 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 4, "sqrt", "fad" },
412 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 5, "abs", "fad" },
413 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 6, "mov", "fad" },
414 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 7, "neg", "fad" },
415 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 8, "round.l", "fad" },
416 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 9, "trunc.l", "fad" },
417 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 10, "ceil.l", "fad" },
418 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 11, "floor.l", "fad" },
419 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 12, "round.w", "fad" },
420 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 13, "trunc.w", "fad" },
421 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 14, "ceil.w", "fad" },
422 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 15, "floor.w", "fad" },
423 { kFpMask | (0x201 << 16), kCop1 | (0x200 << 16) | 17, "movf", "fadc" },
424 { kFpMask | (0x201 << 16), kCop1 | (0x201 << 16) | 17, "movt", "fadc" },
425 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 18, "movz", "fadT" },
426 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 19, "movn", "fadT" },
427 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 20, "seleqz", "fadt" },
428 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 23, "selnez", "fadt" },
429 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 26, "rint", "fad" },
430 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 27, "class", "fad" },
431 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 32, "cvt.s", "fad" },
432 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 33, "cvt.d", "fad" },
433 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 36, "cvt.w", "fad" },
434 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 37, "cvt.l", "fad" },
435 { kFpMask | (0x21f << 16), kCop1 | (0x200 << 16) | 38, "cvt.ps", "fad" },
436 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 49, "c.un", "fCdt" },
437 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 50, "c.eq", "fCdt" },
438 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 51, "c.ueq", "fCdt" },
439 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 52, "c.olt", "fCdt" },
440 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 53, "c.ult", "fCdt" },
441 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 54, "c.ole", "fCdt" },
442 { kFpMask | (0x10 << 21), kCop1 | (0x10 << 21) | 55, "c.ule", "fCdt" },
443 { kFpMask, kCop1 | 0x10, "sel", "fadt" },
444 { kFpMask, kCop1 | 0x1e, "max", "fadt" },
445 { kFpMask, kCop1 | 0x1c, "min", "fadt" },
446
447 // MSA instructions.
448 { kMsaMask | (0x1f << 21), kMsa | (0x0 << 21) | 0x1e, "and.v", "kmn" },
449 { kMsaMask | (0x1f << 21), kMsa | (0x1 << 21) | 0x1e, "or.v", "kmn" },
450 { kMsaMask | (0x1f << 21), kMsa | (0x2 << 21) | 0x1e, "nor.v", "kmn" },
451 { kMsaMask | (0x1f << 21), kMsa | (0x3 << 21) | 0x1e, "xor.v", "kmn" },
452 { kMsaMask | (0x7 << 23), kMsa | (0x0 << 23) | 0xe, "addv", "Vkmn" },
453 { kMsaMask | (0x7 << 23), kMsa | (0x1 << 23) | 0xe, "subv", "Vkmn" },
454 { kMsaMask | (0x7 << 23), kMsa | (0x4 << 23) | 0x11, "asub_s", "Vkmn" },
455 { kMsaMask | (0x7 << 23), kMsa | (0x5 << 23) | 0x11, "asub_u", "Vkmn" },
456 { kMsaMask | (0x7 << 23), kMsa | (0x0 << 23) | 0x12, "mulv", "Vkmn" },
457 { kMsaMask | (0x7 << 23), kMsa | (0x4 << 23) | 0x12, "div_s", "Vkmn" },
458 { kMsaMask | (0x7 << 23), kMsa | (0x5 << 23) | 0x12, "div_u", "Vkmn" },
459 { kMsaMask | (0x7 << 23), kMsa | (0x6 << 23) | 0x12, "mod_s", "Vkmn" },
460 { kMsaMask | (0x7 << 23), kMsa | (0x7 << 23) | 0x12, "mod_u", "Vkmn" },
461 { kMsaMask | (0x7 << 23), kMsa | (0x0 << 23) | 0x10, "add_a", "Vkmn" },
462 { kMsaMask | (0x7 << 23), kMsa | (0x4 << 23) | 0x10, "ave_s", "Vkmn" },
463 { kMsaMask | (0x7 << 23), kMsa | (0x5 << 23) | 0x10, "ave_u", "Vkmn" },
464 { kMsaMask | (0x7 << 23), kMsa | (0x6 << 23) | 0x10, "aver_s", "Vkmn" },
465 { kMsaMask | (0x7 << 23), kMsa | (0x7 << 23) | 0x10, "aver_u", "Vkmn" },
466 { kMsaMask | (0x7 << 23), kMsa | (0x2 << 23) | 0xe, "max_s", "Vkmn" },
467 { kMsaMask | (0x7 << 23), kMsa | (0x3 << 23) | 0xe, "max_u", "Vkmn" },
468 { kMsaMask | (0x7 << 23), kMsa | (0x4 << 23) | 0xe, "min_s", "Vkmn" },
469 { kMsaMask | (0x7 << 23), kMsa | (0x5 << 23) | 0xe, "min_u", "Vkmn" },
470 { kMsaMask | (0xf << 22), kMsa | (0x0 << 22) | 0x1b, "fadd", "Ukmn" },
471 { kMsaMask | (0xf << 22), kMsa | (0x1 << 22) | 0x1b, "fsub", "Ukmn" },
472 { kMsaMask | (0xf << 22), kMsa | (0x2 << 22) | 0x1b, "fmul", "Ukmn" },
473 { kMsaMask | (0xf << 22), kMsa | (0x3 << 22) | 0x1b, "fdiv", "Ukmn" },
474 { kMsaMask | (0xf << 22), kMsa | (0xe << 22) | 0x1b, "fmax", "Ukmn" },
475 { kMsaMask | (0xf << 22), kMsa | (0xc << 22) | 0x1b, "fmin", "Ukmn" },
476 { kMsaMask | (0x1ff << 17), kMsa | (0x19e << 17) | 0x1e, "ffint_s", "ukm" },
477 { kMsaMask | (0x1ff << 17), kMsa | (0x19c << 17) | 0x1e, "ftint_s", "ukm" },
478 { kMsaMask | (0x7 << 23), kMsa | (0x0 << 23) | 0xd, "sll", "Vkmn" },
479 { kMsaMask | (0x7 << 23), kMsa | (0x1 << 23) | 0xd, "sra", "Vkmn" },
480 { kMsaMask | (0x7 << 23), kMsa | (0x2 << 23) | 0xd, "srl", "Vkmn" },
481 { kMsaMask | (0x7 << 23), kMsa | (0x0 << 23) | 0x9, "slli", "kmW" },
482 { kMsaMask | (0x7 << 23), kMsa | (0x1 << 23) | 0x9, "srai", "kmW" },
483 { kMsaMask | (0x7 << 23), kMsa | (0x2 << 23) | 0x9, "srli", "kmW" },
484 { kMsaMask | (0x3ff << 16), kMsa | (0xbe << 16) | 0x19, "move.v", "km" },
485 { kMsaMask | (0xf << 22), kMsa | (0x1 << 22) | 0x19, "splati", "kX" },
486 { kMsaMask | (0xf << 22), kMsa | (0x2 << 22) | 0x19, "copy_s", "yX" },
487 { kMsaMask | (0xf << 22), kMsa | (0x3 << 22) | 0x19, "copy_u", "yX" },
488 { kMsaMask | (0xf << 22), kMsa | (0x4 << 22) | 0x19, "insert", "YD" },
489 { kMsaMask | (0xff << 18), kMsa | (0xc0 << 18) | 0x1e, "fill", "vkD" },
490 { kMsaMask | (0xff << 18), kMsa | (0xc1 << 18) | 0x1e, "pcnt", "vkm" },
491 { kMsaMask | (0x7 << 23), kMsa | (0x6 << 23) | 0x7, "ldi", "kx" },
492 { kMsaSpecialMask | (0xf << 2), kMsa | (0x8 << 2), "ld", "kw" },
493 { kMsaSpecialMask | (0xf << 2), kMsa | (0x9 << 2), "st", "kw" },
494 { kMsaMask | (0x7 << 23), kMsa | (0x4 << 23) | 0x14, "ilvl", "Vkmn" },
495 { kMsaMask | (0x7 << 23), kMsa | (0x5 << 23) | 0x14, "ilvr", "Vkmn" },
496 { kMsaMask | (0x7 << 23), kMsa | (0x6 << 23) | 0x14, "ilvev", "Vkmn" },
497 { kMsaMask | (0x7 << 23), kMsa | (0x7 << 23) | 0x14, "ilvod", "Vkmn" },
498 { kMsaMask | (0x7 << 23), kMsa | (0x1 << 23) | 0x12, "maddv", "Vkmn" },
499 { kMsaMask | (0x7 << 23), kMsa | (0x2 << 23) | 0x12, "msubv", "Vkmn" },
500 { kMsaMask | (0xf << 22), kMsa | (0x4 << 22) | 0x1b, "fmadd", "Ukmn" },
501 { kMsaMask | (0xf << 22), kMsa | (0x5 << 22) | 0x1b, "fmsub", "Ukmn" },
502 { kMsaMask | (0x7 << 23), kMsa | (0x4 << 23) | 0x15, "hadd_s", "Vkmn" },
503 { kMsaMask | (0x7 << 23), kMsa | (0x5 << 23) | 0x15, "hadd_u", "Vkmn" },
504 };
505
ReadU32(const uint8_t * ptr)506 static uint32_t ReadU32(const uint8_t* ptr) {
507 // We only support little-endian MIPS.
508 return ptr[0] | (ptr[1] << 8) | (ptr[2] << 16) | (ptr[3] << 24);
509 }
510
RegName(uint32_t reg)511 const char* DisassemblerMips::RegName(uint32_t reg) {
512 if (is_o32_abi_) {
513 return gO32AbiRegNames[reg];
514 } else {
515 return gN64AbiRegNames[reg];
516 }
517 }
518
Dump(std::ostream & os,const uint8_t * instr_ptr)519 size_t DisassemblerMips::Dump(std::ostream& os, const uint8_t* instr_ptr) {
520 uint32_t instruction = ReadU32(instr_ptr);
521
522 uint32_t rs = (instruction >> 21) & 0x1f; // I-type, R-type.
523 uint32_t rt = (instruction >> 16) & 0x1f; // I-type, R-type.
524 uint32_t rd = (instruction >> 11) & 0x1f; // R-type.
525 uint32_t sa = (instruction >> 6) & 0x1f; // R-type.
526
527 std::string opcode;
528 std::ostringstream args;
529
530 // TODO: remove this!
531 uint32_t op = (instruction >> 26) & 0x3f;
532 uint32_t function = (instruction & 0x3f); // R-type.
533 opcode = StringPrintf("op=%d fn=%d", op, function);
534
535 for (size_t i = 0; i < arraysize(gMipsInstructions); ++i) {
536 if (gMipsInstructions[i].Matches(instruction)) {
537 opcode = gMipsInstructions[i].name;
538 for (const char* args_fmt = gMipsInstructions[i].args_fmt; *args_fmt; ++args_fmt) {
539 switch (*args_fmt) {
540 case 'A': // sa (shift amount or [d]ins/[d]ext position).
541 args << sa;
542 break;
543 case 'B': // Branch offset.
544 {
545 int32_t offset = static_cast<int16_t>(instruction & 0xffff);
546 offset <<= 2;
547 offset += 4; // Delay slot.
548 args << FormatInstructionPointer(instr_ptr + offset)
549 << StringPrintf(" ; %+d", offset);
550 }
551 break;
552 case 'b': // 21-bit branch offset.
553 {
554 int32_t offset = (instruction & 0x1fffff) - ((instruction & 0x100000) << 1);
555 offset <<= 2;
556 offset += 4; // Delay slot.
557 args << FormatInstructionPointer(instr_ptr + offset)
558 << StringPrintf(" ; %+d", offset);
559 }
560 break;
561 case 'C': // Floating-point condition code flag in c.<cond>.fmt.
562 args << "cc" << (sa >> 2);
563 break;
564 case 'c': // Floating-point condition code flag in bc1f/bc1t and movf/movt.
565 args << "cc" << (rt >> 2);
566 break;
567 case 'D': args << RegName(rd); break;
568 case 'd': args << 'f' << rd; break;
569 case 'a': args << 'f' << sa; break;
570 case 'F': args << (sa + 32); break; // dinsu position.
571 case 'f': // Floating point "fmt".
572 {
573 size_t fmt = (instruction >> 21) & 0x7; // TODO: other fmts?
574 switch (fmt) {
575 case 0: opcode += ".s"; break;
576 case 1: opcode += ".d"; break;
577 case 4: opcode += ".w"; break;
578 case 5: opcode += ".l"; break;
579 case 6: opcode += ".ps"; break;
580 default: opcode += ".?"; break;
581 }
582 continue; // No ", ".
583 }
584 case 'I': // Unsigned lower 16-bit immediate.
585 args << (instruction & 0xffff);
586 break;
587 case 'i': // Sign-extended lower 16-bit immediate.
588 args << static_cast<int16_t>(instruction & 0xffff);
589 break;
590 case 'J': // sz (dinsm size).
591 args << (rd - sa + 33);
592 break;
593 case 'j': // sa value for lsa/dlsa.
594 args << (sa + 1);
595 break;
596 case 'L': // Jump label.
597 {
598 // TODO: is this right?
599 uint32_t instr_index = (instruction & 0x1ffffff);
600 uint32_t target = (instr_index << 2);
601 target |= (reinterpret_cast<uintptr_t>(instr_ptr + 4) & 0xf0000000);
602 args << reinterpret_cast<void*>(target);
603 }
604 break;
605 case 'l': // 9-bit signed offset
606 {
607 int32_t offset = static_cast<int16_t>(instruction) >> 7;
608 args << StringPrintf("%+d(%s)", offset, RegName(rs));
609 }
610 break;
611 case 'O': // +x(rs)
612 {
613 int32_t offset = static_cast<int16_t>(instruction & 0xffff);
614 args << StringPrintf("%+d(%s)", offset, RegName(rs));
615 if (rs == 17) {
616 args << " ; ";
617 GetDisassemblerOptions()->thread_offset_name_function_(args, offset);
618 }
619 }
620 break;
621 case 'o': // 19-bit offset in lwpc and lwupc.
622 {
623 int32_t offset = (instruction & 0x7ffff) - ((instruction & 0x40000) << 1);
624 offset <<= 2;
625 args << FormatInstructionPointer(instr_ptr + offset);
626 args << StringPrintf(" ; %+d", offset);
627 }
628 break;
629 case '0': // 18-bit offset in ldpc.
630 {
631 int32_t offset = (instruction & 0x3ffff) - ((instruction & 0x20000) << 1);
632 offset <<= 3;
633 uintptr_t ptr = RoundDown(reinterpret_cast<uintptr_t>(instr_ptr), 8);
634 args << FormatInstructionPointer(reinterpret_cast<const uint8_t*>(ptr + offset));
635 args << StringPrintf(" ; %+d", offset);
636 }
637 break;
638 case 'P': // 26-bit offset in bc and balc.
639 {
640 int32_t offset = (instruction & 0x3ffffff) - ((instruction & 0x2000000) << 1);
641 offset <<= 2;
642 offset += 4;
643 args << FormatInstructionPointer(instr_ptr + offset);
644 args << StringPrintf(" ; %+d", offset);
645 }
646 break;
647 case 'p': // 19-bit offset in addiupc.
648 {
649 int32_t offset = (instruction & 0x7ffff) - ((instruction & 0x40000) << 1);
650 args << offset << " ; move " << RegName(rs) << ", ";
651 args << FormatInstructionPointer(instr_ptr + (offset << 2));
652 }
653 break;
654 case 'S': args << RegName(rs); break;
655 case 's': args << 'f' << rs; break;
656 case 'T': args << RegName(rt); break;
657 case 't': args << 'f' << rt; break;
658 case 'Z': args << (rd + 1); break; // sz ([d]ext size).
659 case 'z': args << (rd - sa + 1); break; // sz ([d]ins, dinsu size).
660 case 'k': args << 'w' << sa; break;
661 case 'm': args << 'w' << rd; break;
662 case 'n': args << 'w' << rt; break;
663 case 'U': // MSA 1-bit df (word/doubleword), position 21.
664 {
665 int32_t df = (instruction >> 21) & 0x1;
666 switch (df) {
667 case 0: opcode += ".w"; break;
668 case 1: opcode += ".d"; break;
669 }
670 continue; // No ", ".
671 }
672 case 'u': // MSA 1-bit df (word/doubleword), position 16.
673 {
674 int32_t df = (instruction >> 16) & 0x1;
675 switch (df) {
676 case 0: opcode += ".w"; break;
677 case 1: opcode += ".d"; break;
678 }
679 continue; // No ", ".
680 }
681 case 'V': // MSA 2-bit df, position 21.
682 {
683 int32_t df = (instruction >> 21) & 0x3;
684 switch (df) {
685 case 0: opcode += ".b"; break;
686 case 1: opcode += ".h"; break;
687 case 2: opcode += ".w"; break;
688 case 3: opcode += ".d"; break;
689 }
690 continue; // No ", ".
691 }
692 case 'v': // MSA 2-bit df, position 16.
693 {
694 int32_t df = (instruction >> 16) & 0x3;
695 switch (df) {
696 case 0: opcode += ".b"; break;
697 case 1: opcode += ".h"; break;
698 case 2: opcode += ".w"; break;
699 case 3: opcode += ".d"; break;
700 }
701 continue; // No ", ".
702 }
703 case 'W': // MSA df/m.
704 {
705 int32_t df_m = (instruction >> 16) & 0x7f;
706 if ((df_m & (0x1 << 6)) == 0) {
707 opcode += ".d";
708 args << (df_m & 0x3f);
709 break;
710 }
711 if ((df_m & (0x1 << 5)) == 0) {
712 opcode += ".w";
713 args << (df_m & 0x1f);
714 break;
715 }
716 if ((df_m & (0x1 << 4)) == 0) {
717 opcode += ".h";
718 args << (df_m & 0xf);
719 break;
720 }
721 if ((df_m & (0x1 << 3)) == 0) {
722 opcode += ".b";
723 args << (df_m & 0x7);
724 }
725 break;
726 }
727 case 'w': // MSA +x(rs).
728 {
729 int32_t df = instruction & 0x3;
730 int32_t s10 = (instruction >> 16) & 0x3ff;
731 s10 -= (s10 & 0x200) << 1; // Sign-extend s10.
732 switch (df) {
733 case 0: opcode += ".b"; break;
734 case 1: opcode += ".h"; break;
735 case 2: opcode += ".w"; break;
736 case 3: opcode += ".d"; break;
737 }
738 args << StringPrintf("%+d(%s)", s10 << df, RegName(rd));
739 break;
740 }
741 case 'X': // MSA df/n - ws[x].
742 {
743 int32_t df_n = (instruction >> 16) & 0x3f;
744 if ((df_n & (0x3 << 4)) == 0) {
745 opcode += ".b";
746 args << 'w' << rd << '[' << (df_n & 0xf) << ']';
747 break;
748 }
749 if ((df_n & (0x3 << 3)) == 0) {
750 opcode += ".h";
751 args << 'w' << rd << '[' << (df_n & 0x7) << ']';
752 break;
753 }
754 if ((df_n & (0x3 << 2)) == 0) {
755 opcode += ".w";
756 args << 'w' << rd << '[' << (df_n & 0x3) << ']';
757 break;
758 }
759 if ((df_n & (0x3 << 1)) == 0) {
760 opcode += ".d";
761 args << 'w' << rd << '[' << (df_n & 0x1) << ']';
762 }
763 break;
764 }
765 case 'x': // MSA i10.
766 {
767 int32_t df = (instruction >> 21) & 0x3;
768 int32_t i10 = (instruction >> 11) & 0x3ff;
769 i10 -= (i10 & 0x200) << 1; // Sign-extend i10.
770 switch (df) {
771 case 0: opcode += ".b"; break;
772 case 1: opcode += ".h"; break;
773 case 2: opcode += ".w"; break;
774 case 3: opcode += ".d"; break;
775 }
776 args << i10;
777 break;
778 }
779 case 'Y': // MSA df/n - wd[x].
780 {
781 int32_t df_n = (instruction >> 16) & 0x3f;
782 if ((df_n & (0x3 << 4)) == 0) {
783 opcode += ".b";
784 args << 'w' << sa << '[' << (df_n & 0xf) << ']';
785 break;
786 }
787 if ((df_n & (0x3 << 3)) == 0) {
788 opcode += ".h";
789 args << 'w' << sa << '[' << (df_n & 0x7) << ']';
790 break;
791 }
792 if ((df_n & (0x3 << 2)) == 0) {
793 opcode += ".w";
794 args << 'w' << sa << '[' << (df_n & 0x3) << ']';
795 break;
796 }
797 if ((df_n & (0x3 << 1)) == 0) {
798 opcode += ".d";
799 args << 'w' << sa << '[' << (df_n & 0x1) << ']';
800 }
801 break;
802 }
803 case 'y': args << RegName(sa); break;
804 }
805 if (*(args_fmt + 1)) {
806 args << ", ";
807 }
808 }
809 break;
810 }
811 }
812
813 // Special cases for sequences of:
814 // pc-relative +/- 2GB branch:
815 // auipc reg, imm
816 // jic reg, imm
817 // pc-relative +/- 2GB branch and link:
818 // auipc reg, imm
819 // jialc reg, imm
820 if (((op == 0x36 || op == 0x3E) && rs == 0 && rt != 0) && // ji[al]c
821 last_ptr_ && (intptr_t)instr_ptr - (intptr_t)last_ptr_ == 4 &&
822 (last_instr_ & 0xFC1F0000) == 0xEC1E0000 && // auipc
823 ((last_instr_ >> 21) & 0x1F) == rt) {
824 uint32_t offset = (last_instr_ << 16) | (instruction & 0xFFFF);
825 offset -= (offset & 0x8000) << 1;
826 offset -= 4;
827 if (op == 0x36) {
828 args << " ; bc ";
829 } else {
830 args << " ; balc ";
831 }
832 args << FormatInstructionPointer(instr_ptr + (int32_t)offset);
833 args << StringPrintf(" ; %+d", (int32_t)offset);
834 }
835
836 os << FormatInstructionPointer(instr_ptr)
837 << StringPrintf(": %08x\t%-7s ", instruction, opcode.c_str())
838 << args.str() << '\n';
839 last_ptr_ = instr_ptr;
840 last_instr_ = instruction;
841 return 4;
842 }
843
Dump(std::ostream & os,const uint8_t * begin,const uint8_t * end)844 void DisassemblerMips::Dump(std::ostream& os, const uint8_t* begin, const uint8_t* end) {
845 for (const uint8_t* cur = begin; cur < end; cur += 4) {
846 Dump(os, cur);
847 }
848 }
849
850 } // namespace mips
851 } // namespace art
852