| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86InstrFoldTables.cpp | 5273 lookupFoldTableImpl(ArrayRef<X86MemoryFoldTableEntry> Table, unsigned RegOp) { in lookupFoldTableImpl()
5328 llvm::lookupTwoAddrFoldTable(unsigned RegOp) { in lookupTwoAddrFoldTable()
5333 llvm::lookupFoldTable(unsigned RegOp, unsigned OpNum) { in lookupFoldTable()
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| /external/llvm/lib/Target/Lanai/InstPrinter/ |
| D | LanaiInstPrinter.cpp | 211 const MCOperand &RegOp) { in printMemoryBaseRegister()
237 const MCOperand &RegOp = MI->getOperand(OpNo); in printMemRiOperand() local
252 const MCOperand &RegOp = MI->getOperand(OpNo); in printMemRrOperand() local
273 const MCOperand &RegOp = MI->getOperand(OpNo); in printMemSplsOperand() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/InstPrinter/ |
| D | LanaiInstPrinter.cpp | 211 const MCOperand &RegOp) { in printMemoryBaseRegister()
237 const MCOperand &RegOp = MI->getOperand(OpNo); in printMemRiOperand() local
252 const MCOperand &RegOp = MI->getOperand(OpNo); in printMemRrOperand() local
273 const MCOperand &RegOp = MI->getOperand(OpNo); in printMemSplsOperand() local
|
| /external/llvm/lib/Target/BPF/InstPrinter/ |
| D | BPFInstPrinter.cpp | 68 const MCOperand &RegOp = MI->getOperand(OpNo); in printMemOperand() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/BPF/InstPrinter/ |
| D | BPFInstPrinter.cpp | 67 const MCOperand &RegOp = MI->getOperand(OpNo); in printMemOperand() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/AsmParser/ |
| D | WebAssemblyAsmParser.cpp | 65 struct RegOp { struct
67 unsigned RegNo;
75 MVT::SimpleValueType Type;
|
| /external/llvm/lib/Target/Lanai/ |
| D | LanaiAsmPrinter.cpp | 132 unsigned RegOp = OpNo + 1; in PrintAsmOperand() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/ |
| D | AVRAsmPrinter.cpp | 100 const MachineOperand &RegOp = MI->getOperand(OpNum); in PrintAsmOperand() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/ |
| D | LanaiAsmPrinter.cpp | 131 unsigned RegOp = OpNo + 1; in PrintAsmOperand() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/BPF/AsmParser/ |
| D | BPFAsmParser.cpp | 87 struct RegOp { struct
88 unsigned RegNum;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/AsmParser/ |
| D | SparcAsmParser.cpp | 228 struct RegOp { struct in __anonf38cb3b50211::SparcOperand
229 unsigned RegNum;
230 RegisterKind Kind;
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| /external/llvm/lib/Target/Sparc/AsmParser/ |
| D | SparcAsmParser.cpp | 201 struct RegOp { struct in __anonb718c15d0111::SparcOperand
202 unsigned RegNum;
203 RegisterKind Kind;
|
| /external/llvm/lib/Target/AMDGPU/AsmParser/ |
| D | AMDGPUAsmParser.cpp | 145 struct RegOp { struct in __anonbb0be1270111::AMDGPUOperand
146 unsigned RegNo;
147 Modifiers Mods;
148 const MCRegisterInfo *TRI;
149 const MCSubtargetInfo *STI;
150 bool IsForcedVOP3;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/MCTargetDesc/ |
| D | AVRMCCodeEmitter.cpp | 137 auto RegOp = MI.getOperand(OpNo); in encodeMemri() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIFoldOperands.cpp | 893 const MachineOperand *RegOp = nullptr; in isOMod() local
944 const MachineOperand *RegOp; in tryFoldOMod() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstructionSelector.cpp | 337 MachineOperand &RegOp = I.getOperand(1); in selectFP16CopyFromGPR32() local
408 MachineOperand &RegOp = I.getOperand(1); in selectCopy() local
861 MachineOperand &RegOp = I.getOperand(0); in select() local
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86InstrInfo.cpp | 263 unsigned RegOp = OpTbl2Addr[i][0]; in X86InstrInfo() local
373 unsigned RegOp = OpTbl0[i][0]; in X86InstrInfo() local
533 unsigned RegOp = OpTbl1[i][0]; in X86InstrInfo() local
894 unsigned RegOp = OpTbl2[i][0]; in X86InstrInfo() local
907 unsigned RegOp, unsigned MemOp, unsigned Flags) { in AddTableEntry()
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| D | X86MCInstLower.cpp | 260 unsigned RegOp = IsStore ? 0 : 5; in SimplifyShortMoveForm() local
|
| /external/llvm/lib/Target/SystemZ/AsmParser/ |
| D | SystemZAsmParser.cpp | 86 struct RegOp { struct in __anon8217a0e90111::SystemZOperand
87 RegisterKind Kind;
88 unsigned Num;
|
| /external/llvm/lib/Target/X86/AsmParser/ |
| D | X86Operand.h | 44 struct RegOp { struct
45 unsigned RegNo;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/AsmParser/ |
| D | X86Operand.h | 46 struct RegOp { struct
47 unsigned RegNo;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/AsmParser/ |
| D | SystemZAsmParser.cpp | 104 struct RegOp { struct in __anone16cff410111::SystemZOperand
105 RegisterKind Kind;
106 unsigned Num;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/AsmParser/ |
| D | LanaiAsmParser.cpp | 120 struct RegOp { struct
121 unsigned RegNum;
|
| /external/llvm/lib/Target/Lanai/AsmParser/ |
| D | LanaiAsmParser.cpp | 105 struct RegOp { struct
106 unsigned RegNum;
|
| /external/llvm/include/llvm/CodeGen/ |
| D | MachineInstrBuilder.h | 395 inline unsigned getRegState(const MachineOperand &RegOp) { in getRegState()
|