1 //===----------------------- HWEventListener.h ------------------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 /// \file 10 /// 11 /// This file defines the main interface for hardware event listeners. 12 /// 13 //===----------------------------------------------------------------------===// 14 15 #ifndef LLVM_TOOLS_LLVM_MCA_HWEVENTLISTENER_H 16 #define LLVM_TOOLS_LLVM_MCA_HWEVENTLISTENER_H 17 18 #include "Instruction.h" 19 #include "llvm/ADT/ArrayRef.h" 20 #include <utility> 21 22 namespace mca { 23 24 // An HWInstructionEvent represents state changes of instructions that 25 // listeners might be interested in. Listeners can choose to ignore any event 26 // they are not interested in. 27 class HWInstructionEvent { 28 public: 29 // This is the list of event types that are shared by all targets, that 30 // generic subtarget-agnostic classes (e.g., Pipeline, HWInstructionEvent, 31 // ...) and generic Views can manipulate. 32 // Subtargets are free to define additional event types, that are goin to be 33 // handled by generic components as opaque values, but can still be 34 // emitted by subtarget-specific pipeline stages (e.g., ExecuteStage, 35 // DispatchStage, ...) and interpreted by subtarget-specific EventListener 36 // implementations. 37 enum GenericEventType { 38 Invalid = 0, 39 // Events generated by the Retire Control Unit. 40 Retired, 41 // Events generated by the Scheduler. 42 Ready, 43 Issued, 44 Executed, 45 // Events generated by the Dispatch logic. 46 Dispatched, 47 48 LastGenericEventType, 49 }; 50 HWInstructionEvent(unsigned type,const InstRef & Inst)51 HWInstructionEvent(unsigned type, const InstRef &Inst) 52 : Type(type), IR(Inst) {} 53 54 // The event type. The exact meaning depends on the subtarget. 55 const unsigned Type; 56 57 // The instruction this event was generated for. 58 const InstRef &IR; 59 }; 60 61 class HWInstructionIssuedEvent : public HWInstructionEvent { 62 public: 63 using ResourceRef = std::pair<uint64_t, uint64_t>; HWInstructionIssuedEvent(const InstRef & IR,llvm::ArrayRef<std::pair<ResourceRef,double>> UR)64 HWInstructionIssuedEvent(const InstRef &IR, 65 llvm::ArrayRef<std::pair<ResourceRef, double>> UR) 66 : HWInstructionEvent(HWInstructionEvent::Issued, IR), UsedResources(UR) {} 67 68 llvm::ArrayRef<std::pair<ResourceRef, double>> UsedResources; 69 }; 70 71 class HWInstructionDispatchedEvent : public HWInstructionEvent { 72 public: HWInstructionDispatchedEvent(const InstRef & IR,llvm::ArrayRef<unsigned> Regs)73 HWInstructionDispatchedEvent(const InstRef &IR, llvm::ArrayRef<unsigned> Regs) 74 : HWInstructionEvent(HWInstructionEvent::Dispatched, IR), 75 UsedPhysRegs(Regs) {} 76 // Number of physical register allocated for this instruction. There is one 77 // entry per register file. 78 llvm::ArrayRef<unsigned> UsedPhysRegs; 79 }; 80 81 class HWInstructionRetiredEvent : public HWInstructionEvent { 82 public: HWInstructionRetiredEvent(const InstRef & IR,llvm::ArrayRef<unsigned> Regs)83 HWInstructionRetiredEvent(const InstRef &IR, llvm::ArrayRef<unsigned> Regs) 84 : HWInstructionEvent(HWInstructionEvent::Retired, IR), 85 FreedPhysRegs(Regs) {} 86 // Number of register writes that have been architecturally committed. There 87 // is one entry per register file. 88 llvm::ArrayRef<unsigned> FreedPhysRegs; 89 }; 90 91 // A HWStallEvent represents a pipeline stall caused by the lack of hardware 92 // resources. 93 class HWStallEvent { 94 public: 95 enum GenericEventType { 96 Invalid = 0, 97 // Generic stall events generated by the DispatchStage. 98 RegisterFileStall, 99 RetireControlUnitStall, 100 // Generic stall events generated by the Scheduler. 101 DispatchGroupStall, 102 SchedulerQueueFull, 103 LoadQueueFull, 104 StoreQueueFull, 105 LastGenericEvent 106 }; 107 HWStallEvent(unsigned type,const InstRef & Inst)108 HWStallEvent(unsigned type, const InstRef &Inst) : Type(type), IR(Inst) {} 109 110 // The exact meaning of the stall event type depends on the subtarget. 111 const unsigned Type; 112 113 // The instruction this event was generated for. 114 const InstRef &IR; 115 }; 116 117 class HWEventListener { 118 public: 119 // Generic events generated by the pipeline. onCycleBegin()120 virtual void onCycleBegin() {} onCycleEnd()121 virtual void onCycleEnd() {} 122 onEvent(const HWInstructionEvent & Event)123 virtual void onEvent(const HWInstructionEvent &Event) {} onEvent(const HWStallEvent & Event)124 virtual void onEvent(const HWStallEvent &Event) {} 125 126 using ResourceRef = std::pair<uint64_t, uint64_t>; onResourceAvailable(const ResourceRef & RRef)127 virtual void onResourceAvailable(const ResourceRef &RRef) {} 128 129 // Events generated by the Scheduler when buffered resources are 130 // consumed/freed. onReservedBuffers(llvm::ArrayRef<unsigned> Buffers)131 virtual void onReservedBuffers(llvm::ArrayRef<unsigned> Buffers) {} onReleasedBuffers(llvm::ArrayRef<unsigned> Buffers)132 virtual void onReleasedBuffers(llvm::ArrayRef<unsigned> Buffers) {} 133 ~HWEventListener()134 virtual ~HWEventListener() {} 135 136 private: 137 virtual void anchor(); 138 }; 139 } // namespace mca 140 141 #endif 142