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Searched defs:Rt (Results 1 – 25 of 43) sorted by relevance

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/external/llvm/lib/Target/Hexagon/
DHexagonAsmPrinter.cpp330 MCOperand &Rt = Inst.getOperand(3); in HexagonProcessInstruction() local
341 MCOperand &Rt = Inst.getOperand(2); in HexagonProcessInstruction() local
353 MCOperand &Rt = Inst.getOperand(2); in HexagonProcessInstruction() local
554 MCOperand &Rt = Inst.getOperand(1); in HexagonProcessInstruction() local
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/Disassembler/
DMipsDisassembler.cpp674 InsnType Rt = fieldFromInstruction(insn, 16, 5); in DecodeAddiGroupBranch() local
702 InsnType Rt = fieldFromInstruction(insn, 21, 5); in DecodePOP35GroupBranchMMR6() local
747 InsnType Rt = fieldFromInstruction(insn, 16, 5); in DecodeDaddiGroupBranch() local
775 InsnType Rt = fieldFromInstruction(insn, 21, 5); in DecodePOP37GroupBranchMMR6() local
816 InsnType Rt = fieldFromInstruction(insn, 21, 5); in DecodePOP65GroupBranchMMR6() local
855 InsnType Rt = fieldFromInstruction(insn, 21, 5); in DecodePOP75GroupBranchMMR6() local
899 InsnType Rt = fieldFromInstruction(insn, 16, 5); in DecodeBlezlGroupBranch() local
944 InsnType Rt = fieldFromInstruction(insn, 16, 5); in DecodeBgtzlGroupBranch() local
986 InsnType Rt = fieldFromInstruction(insn, 16, 5); in DecodeBgtzGroupBranch() local
1035 InsnType Rt = fieldFromInstruction(insn, 16, 5); in DecodeBlezGroupBranch() local
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonAsmPrinter.cpp382 MCOperand &Rt = Inst.getOperand(3); in HexagonProcessInstruction() local
393 MCOperand &Rt = Inst.getOperand(2); in HexagonProcessInstruction() local
405 MCOperand &Rt = Inst.getOperand(2); in HexagonProcessInstruction() local
602 MCOperand &Rt = Inst.getOperand(1); in HexagonProcessInstruction() local
/external/eigen/Eigen/src/Geometry/
DUmeyama.h134 TransformationMatrixType Rt = TransformationMatrixType::Identity(m+1,m+1); variable
/external/swiftshader/third_party/subzero/src/
DIceAssemblerMIPS32.cpp210 const IValueT Rt = encodeGPRegister(OpRt, "Rt", InsnName); in emitRsRt() local
221 const IValueT Rt = encodeGPRegister(OpRt, "Rt", InsnName); in emitRtRsImm16() local
236 const IValueT Rt = encodeGPRegister(OpRt, "Rt", InsnName); in emitRtRsImm16Rel() local
272 const IValueT Rt = encodeGPRegister(OpRt, "Rt", InsnName); in emitRdRtSa() local
286 const IValueT Rt = encodeGPRegister(OpRt, "Rt", InsnName); in emitRdRsRt() local
346 const IValueT Rt = encodeGPRegister(OpRt, "Rt", InsnName); in emitCOP1FmtRtFsFd() local
359 const IValueT Rt = encodeGPRegister(OpRt, "Rt", InsnName); in emitCOP1MovRtFs() local
668 const IValueT Rt = encodeGPRegister(OpRt, "Rt", "lui"); in lui() local
687 const IValueT Rt = encodeFPRegister(OpRt, "Ft", "ldc1"); in ldc1() local
747 const IValueT Rt = encodeFPRegister(OpRt, "Ft", "lwc1"); in lwc1() local
[all …]
DIceAssemblerARM32.cpp934 bool IsLoad, bool IsByte, IValueT Rt, in emitMemOp()
945 IValueT Rt, const Operand *OpAddress, in emitMemOp()
1002 IValueT Rt, const Operand *OpAddress, in emitMemOpEnc3()
1077 const IValueT Rt = encodeGPRegister(OpRt, "Rt", InstName); in emitInsertExtractInt() local
1550 IValueT Rt = encodeGPRegister(OpRt, "Rt", LdrName); in ldr() local
1619 const Operand *OpRd, IValueT Rt, in emitMemExOp()
1895 IValueT Rt = encodeGPRegister(OpRt, "Rt", StrName); in str() local
1979 IValueT Rt = encodeGPRegister(OpRt, "Rt", StrexName); in strex() local
2011 IValueT Rt = encodeGPRegister(OpRt, "Rt", Pop); in pop() local
2040 IValueT Rt = encodeGPRegister(OpRt, "Rt", Push); in push() local
[all …]
/external/capstone/arch/ARM/
DARMDisassembler.c1519 unsigned Rt = fieldFromInstruction_4(Insn, 12, 4); in DecodeAddrMode2IdxInstruction() local
1668 unsigned Rt = fieldFromInstruction_4(Insn, 12, 4); in DecodeAddrMode3Instruction() local
3338 unsigned Rt = fieldFromInstruction_4(Insn, 12, 4); in DecodeT2LoadShift() local
3411 unsigned Rt = fieldFromInstruction_4(Insn, 12, 4); in DecodeT2LoadImm8() local
3476 unsigned Rt = fieldFromInstruction_4(Insn, 12, 4); in DecodeT2LoadImm12() local
3542 unsigned Rt = fieldFromInstruction_4(Insn, 12, 4); in DecodeT2LoadT() local
3581 unsigned Rt = fieldFromInstruction_4(Insn, 12, 4); in DecodeT2LoadLabel() local
3734 unsigned Rt = fieldFromInstruction_4(Insn, 12, 4); in DecodeT2LdStPre() local
4112 unsigned Rt = fieldFromInstruction_4(Insn, 12, 4); in DecodeDoubleRegLoad() local
4135 unsigned Rt = fieldFromInstruction_4(Insn, 0, 4); in DecodeDoubleRegStore() local
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/Disassembler/
DARMDisassembler.cpp1475 unsigned Rt = fieldFromInstruction(Insn, 12, 4); in DecodeAddrMode2IdxInstruction() local
1623 unsigned Rt = fieldFromInstruction(Insn, 12, 4); in DecodeAddrMode3Instruction() local
3360 unsigned Rt = fieldFromInstruction(Insn, 12, 4); in DecodeT2LoadShift() local
3444 unsigned Rt = fieldFromInstruction(Insn, 12, 4); in DecodeT2LoadImm8() local
3528 unsigned Rt = fieldFromInstruction(Insn, 12, 4); in DecodeT2LoadImm12() local
3608 unsigned Rt = fieldFromInstruction(Insn, 12, 4); in DecodeT2LoadT() local
3646 unsigned Rt = fieldFromInstruction(Insn, 12, 4); in DecodeT2LoadLabel() local
3801 unsigned Rt = fieldFromInstruction(Insn, 12, 4); in DecodeT2LdStPre() local
4225 unsigned Rt = fieldFromInstruction(Insn, 12, 4); in DecodeDoubleRegLoad() local
4248 unsigned Rt = fieldFromInstruction(Insn, 0, 4); in DecodeDoubleRegStore() local
[all …]
/external/llvm/lib/Target/Mips/Disassembler/
DMipsDisassembler.cpp603 InsnType Rt = fieldFromInstruction(insn, 16, 5); in DecodeAddiGroupBranch() local
631 InsnType Rt = fieldFromInstruction(insn, 21, 5); in DecodePOP35GroupBranchMMR6() local
673 InsnType Rt = fieldFromInstruction(insn, 16, 5); in DecodeDaddiGroupBranch() local
701 InsnType Rt = fieldFromInstruction(insn, 21, 5); in DecodePOP37GroupBranchMMR6() local
744 InsnType Rt = fieldFromInstruction(insn, 16, 5); in DecodeBlezlGroupBranch() local
789 InsnType Rt = fieldFromInstruction(insn, 16, 5); in DecodeBgtzlGroupBranch() local
831 InsnType Rt = fieldFromInstruction(insn, 16, 5); in DecodeBgtzGroupBranch() local
880 InsnType Rt = fieldFromInstruction(insn, 16, 5); in DecodeBlezGroupBranch() local
1808 unsigned Rt = fieldFromInstruction(Insn, 16, 5); in DecodeSpecial3LlSc() local
2286 InsnType Rt = fieldFromInstruction(insn, 21, 5); in DecodeBgtzGroupBranchMMR6() local
[all …]
/external/capstone/arch/Mips/
DMipsDisassembler.c537 uint32_t Rt = fieldFromInstruction(insn, 16, 5); in DecodeAddiGroupBranch_4() local
573 uint32_t Rt = fieldFromInstruction(insn, 16, 5); in DecodeDaddiGroupBranch_4() local
610 uint32_t Rt = fieldFromInstruction(insn, 16, 5); in DecodeBlezlGroupBranch_4() local
652 uint32_t Rt = fieldFromInstruction(insn, 16, 5); in DecodeBgtzlGroupBranch_4() local
690 uint32_t Rt = fieldFromInstruction(insn, 16, 5); in DecodeBgtzGroupBranch_4() local
736 uint32_t Rt = fieldFromInstruction(insn, 16, 5); in DecodeBlezGroupBranch_4() local
1062 unsigned Rt = fieldFromInstruction(Insn, 16, 5); in DecodeSpecial3LlSc() local
/external/llvm/lib/Target/ARM/Disassembler/
DARMDisassembler.cpp1476 unsigned Rt = fieldFromInstruction(Insn, 12, 4); in DecodeAddrMode2IdxInstruction() local
1624 unsigned Rt = fieldFromInstruction(Insn, 12, 4); in DecodeAddrMode3Instruction() local
3360 unsigned Rt = fieldFromInstruction(Insn, 12, 4); in DecodeT2LoadShift() local
3443 unsigned Rt = fieldFromInstruction(Insn, 12, 4); in DecodeT2LoadImm8() local
3527 unsigned Rt = fieldFromInstruction(Insn, 12, 4); in DecodeT2LoadImm12() local
3607 unsigned Rt = fieldFromInstruction(Insn, 12, 4); in DecodeT2LoadT() local
3645 unsigned Rt = fieldFromInstruction(Insn, 12, 4); in DecodeT2LoadLabel() local
3801 unsigned Rt = fieldFromInstruction(Insn, 12, 4); in DecodeT2LdStPre() local
4231 unsigned Rt = fieldFromInstruction(Insn, 12, 4); in DecodeDoubleRegLoad() local
4253 unsigned Rt = fieldFromInstruction(Insn, 0, 4); in DecodeDoubleRegStore() local
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/ARM/Disassembler/
DARMDisassembler.cpp1341 unsigned Rt = fieldFromInstruction32(Insn, 12, 4); in DecodeAddrMode2IdxInstruction() local
1484 unsigned Rt = fieldFromInstruction32(Insn, 12, 4); in DecodeAddrMode3Instruction() local
2852 unsigned Rt = fieldFromInstruction32(Insn, 12, 4); in DecodeT2LoadShift() local
2984 unsigned Rt = fieldFromInstruction32(Insn, 12, 4); in DecodeT2LdStPre() local
3237 unsigned Rt = fieldFromInstruction32(Insn, 12, 4); in DecodeDoubleRegLoad() local
3261 unsigned Rt = fieldFromInstruction32(Insn, 0, 4); in DecodeDoubleRegStore() local
3288 unsigned Rt = fieldFromInstruction32(Insn, 12, 4); in DecodeLDRPreImm() local
3313 unsigned Rt = fieldFromInstruction32(Insn, 12, 4); in DecodeLDRPreReg() local
3341 unsigned Rt = fieldFromInstruction32(Insn, 12, 4); in DecodeSTRPreImm() local
3366 unsigned Rt = fieldFromInstruction32(Insn, 12, 4); in DecodeSTRPreReg() local
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/
DRISCVMergeBaseOffset.cpp140 unsigned Rt = TailAdd.getOperand(2).getReg(); in matchLargeOffset() local
/external/capstone/arch/AArch64/
DAArch64Disassembler.c943 unsigned Rt = fieldFromInstruction(insn, 0, 5); in DecodeUnsignedLdStInstruction() local
1007 unsigned Rt = fieldFromInstruction(insn, 0, 5); in DecodeSignedLdStInstruction() local
1193 unsigned Rt = fieldFromInstruction(insn, 0, 5); in DecodeExclusiveLdStInstruction() local
1269 unsigned Rt = fieldFromInstruction(insn, 0, 5); in DecodePairLdStInstruction() local
1636 uint64_t Rt = fieldFromInstruction(insn, 0, 5); in DecodeTestAndBranch() local
/external/llvm/lib/Target/AArch64/Disassembler/
DAArch64Disassembler.cpp838 unsigned Rt = fieldFromInstruction(insn, 0, 5); in DecodeUnsignedLdStInstruction() local
899 unsigned Rt = fieldFromInstruction(insn, 0, 5); in DecodeSignedLdStInstruction() local
1084 unsigned Rt = fieldFromInstruction(insn, 0, 5); in DecodeExclusiveLdStInstruction() local
1167 unsigned Rt = fieldFromInstruction(insn, 0, 5); in DecodePairLdStInstruction() local
1536 uint64_t Rt = fieldFromInstruction(insn, 0, 5); in DecodeTestAndBranch() local
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonMCCompound.cpp202 MCOperand Rs, Rt; in getCompoundInsn() local
/external/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonMCCompound.cpp207 MCOperand Rs, Rt; in getCompoundInsn() local
/external/llvm/lib/Target/ARM/
DARMBaseInstrInfo.cpp2820 unsigned Rt = MI.getOperand(0).getReg(); in getNumMicroOpsSwiftLdSt() local
2827 unsigned Rt = MI.getOperand(0).getReg(); in getNumMicroOpsSwiftLdSt() local
2857 unsigned Rt = MI.getOperand(0).getReg(); in getNumMicroOpsSwiftLdSt() local
2869 unsigned Rt = MI.getOperand(0).getReg(); in getNumMicroOpsSwiftLdSt() local
2892 unsigned Rt = MI.getOperand(0).getReg(); in getNumMicroOpsSwiftLdSt() local
2907 unsigned Rt = MI.getOperand(0).getReg(); in getNumMicroOpsSwiftLdSt() local
2933 unsigned Rt = MI.getOperand(0).getReg(); in getNumMicroOpsSwiftLdSt() local
2943 unsigned Rt = MI.getOperand(0).getReg(); in getNumMicroOpsSwiftLdSt() local
2980 unsigned Rt = MI.getOperand(0).getReg(); in getNumMicroOpsSwiftLdSt() local
DThumb2SizeReduction.cpp437 unsigned Rt = MI->getOperand(IsStore ? 1 : 0).getReg(); in ReduceLoadStore() local
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/Disassembler/
DAArch64Disassembler.cpp1023 unsigned Rt = fieldFromInstruction(insn, 0, 5); in DecodeUnsignedLdStInstruction() local
1084 unsigned Rt = fieldFromInstruction(insn, 0, 5); in DecodeSignedLdStInstruction() local
1282 unsigned Rt = fieldFromInstruction(insn, 0, 5); in DecodeExclusiveLdStInstruction() local
1365 unsigned Rt = fieldFromInstruction(insn, 0, 5); in DecodePairLdStInstruction() local
1734 uint64_t Rt = fieldFromInstruction(insn, 0, 5); in DecodeTestAndBranch() local
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMBaseInstrInfo.cpp3150 unsigned Rt = MI.getOperand(0).getReg(); in getNumMicroOpsSwiftLdSt() local
3157 unsigned Rt = MI.getOperand(0).getReg(); in getNumMicroOpsSwiftLdSt() local
3187 unsigned Rt = MI.getOperand(0).getReg(); in getNumMicroOpsSwiftLdSt() local
3199 unsigned Rt = MI.getOperand(0).getReg(); in getNumMicroOpsSwiftLdSt() local
3222 unsigned Rt = MI.getOperand(0).getReg(); in getNumMicroOpsSwiftLdSt() local
3237 unsigned Rt = MI.getOperand(0).getReg(); in getNumMicroOpsSwiftLdSt() local
3263 unsigned Rt = MI.getOperand(0).getReg(); in getNumMicroOpsSwiftLdSt() local
3273 unsigned Rt = MI.getOperand(0).getReg(); in getNumMicroOpsSwiftLdSt() local
3310 unsigned Rt = MI.getOperand(0).getReg(); in getNumMicroOpsSwiftLdSt() local
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/AsmParser/
DHexagonAsmParser.cpp1363 MCOperand &Rt = Inst.getOperand(1); in processInstruction() local
1802 MCOperand &Rt = Inst.getOperand(2); in processInstruction() local
1822 MCOperand &Rt = Inst.getOperand(3); in processInstruction() local
1845 MCOperand &Rt = Inst.getOperand(2); in processInstruction() local
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/AsmParser/
DAArch64AsmParser.cpp3823 unsigned Rt = Inst.getOperand(1).getReg(); in validateInstruction() local
3840 unsigned Rt = Inst.getOperand(0).getReg(); in validateInstruction() local
3853 unsigned Rt = Inst.getOperand(1).getReg(); in validateInstruction() local
3869 unsigned Rt = Inst.getOperand(1).getReg(); in validateInstruction() local
3902 unsigned Rt = Inst.getOperand(1).getReg(); in validateInstruction() local
3921 unsigned Rt = Inst.getOperand(1).getReg(); in validateInstruction() local
3937 unsigned Rt = Inst.getOperand(1).getReg(); in validateInstruction() local
/external/llvm/lib/Target/AArch64/AsmParser/
DAArch64AsmParser.cpp3449 unsigned Rt = Inst.getOperand(1).getReg(); in validateInstruction() local
3466 unsigned Rt = Inst.getOperand(0).getReg(); in validateInstruction() local
3479 unsigned Rt = Inst.getOperand(1).getReg(); in validateInstruction() local
3495 unsigned Rt = Inst.getOperand(1).getReg(); in validateInstruction() local
3528 unsigned Rt = Inst.getOperand(1).getReg(); in validateInstruction() local
3547 unsigned Rt = Inst.getOperand(1).getReg(); in validateInstruction() local
/external/llvm/lib/Target/Hexagon/AsmParser/
DHexagonAsmParser.cpp1584 MCOperand &Rt = Inst.getOperand(1); in processInstruction() local
2033 MCOperand &Rt = Inst.getOperand(2); in processInstruction() local
2055 MCOperand &Rt = Inst.getOperand(3); in processInstruction() local
2080 MCOperand &Rt = Inst.getOperand(2); in processInstruction() local

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