| /external/capstone/arch/ARM/ |
| D | ARMDisassembler.c | 1677 unsigned Rt2 = Rt + 1; in DecodeAddrMode3Instruction() local
4800 unsigned Rt2 = fieldFromInstruction_4(Insn, 16, 4); in DecodeVMOVSRR() local
4827 unsigned Rt2 = fieldFromInstruction_4(Insn, 16, 4); in DecodeVMOVRRS() local
4875 unsigned Rt2 = fieldFromInstruction_4(Insn, 8, 4); in DecodeT2LDRDPreInstruction() local
4912 unsigned Rt2 = fieldFromInstruction_4(Insn, 8, 4); in DecodeT2STRDPreInstruction() local
4975 unsigned Rt2 = fieldFromInstruction_4(Insn, 0, 4); in DecodeSwap() local
5099 unsigned Rt2 = fieldFromInstruction_4(Val, 16, 4); in DecodeMRRC2() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 1632 unsigned Rt2 = Rt + 1; in DecodeAddrMode3Instruction() local
4922 unsigned Rt2 = fieldFromInstruction(Insn, 16, 4); in DecodeVMOVSRR() local
4948 unsigned Rt2 = fieldFromInstruction(Insn, 16, 4); in DecodeVMOVRRS() local
4995 unsigned Rt2 = fieldFromInstruction(Insn, 8, 4); in DecodeT2LDRDPreInstruction() local
5032 unsigned Rt2 = fieldFromInstruction(Insn, 8, 4); in DecodeT2STRDPreInstruction() local
5090 unsigned Rt2 = fieldFromInstruction(Insn, 0, 4); in DecodeSwap() local
5300 unsigned Rt2 = fieldFromInstruction(Val, 16, 4); in DecoderForMRRC2AndMCRR2() local
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| /external/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 1633 unsigned Rt2 = Rt + 1; in DecodeAddrMode3Instruction() local
4931 unsigned Rt2 = fieldFromInstruction(Insn, 16, 4); in DecodeVMOVSRR() local
4957 unsigned Rt2 = fieldFromInstruction(Insn, 16, 4); in DecodeVMOVRRS() local
5004 unsigned Rt2 = fieldFromInstruction(Insn, 8, 4); in DecodeT2LDRDPreInstruction() local
5041 unsigned Rt2 = fieldFromInstruction(Insn, 8, 4); in DecodeT2STRDPreInstruction() local
5099 unsigned Rt2 = fieldFromInstruction(Insn, 0, 4); in DecodeSwap() local
5277 unsigned Rt2 = fieldFromInstruction(Val, 16, 4); in DecoderForMRRC2AndMCRR2() local
|
| /external/capstone/arch/AArch64/ |
| D | AArch64Disassembler.c | 1195 unsigned Rt2 = fieldFromInstruction(insn, 10, 5); in DecodeExclusiveLdStInstruction() local
1271 unsigned Rt2 = fieldFromInstruction(insn, 10, 5); in DecodePairLdStInstruction() local
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| /external/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 1086 unsigned Rt2 = fieldFromInstruction(insn, 10, 5); in DecodeExclusiveLdStInstruction() local
1169 unsigned Rt2 = fieldFromInstruction(insn, 10, 5); in DecodePairLdStInstruction() local
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 3911 unsigned Rt2 = fieldFromInstruction32(Insn, 16, 4); in DecodeVMOVSRR() local
3937 unsigned Rt2 = fieldFromInstruction32(Insn, 16, 4); in DecodeVMOVRRS() local
3991 unsigned Rt2 = fieldFromInstruction32(Insn, 8, 4); in DecodeT2LDRDPreInstruction() local
4028 unsigned Rt2 = fieldFromInstruction32(Insn, 8, 4); in DecodeT2STRDPreInstruction() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 3824 unsigned Rt2 = Inst.getOperand(2).getReg(); in validateInstruction() local
3841 unsigned Rt2 = Inst.getOperand(1).getReg(); in validateInstruction() local
3854 unsigned Rt2 = Inst.getOperand(2).getReg(); in validateInstruction() local
3870 unsigned Rt2 = Inst.getOperand(2).getReg(); in validateInstruction() local
3951 unsigned Rt2 = Inst.getOperand(2).getReg(); in validateInstruction() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 1284 unsigned Rt2 = fieldFromInstruction(insn, 10, 5); in DecodeExclusiveLdStInstruction() local
1367 unsigned Rt2 = fieldFromInstruction(insn, 10, 5); in DecodePairLdStInstruction() local
|
| /external/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 3450 unsigned Rt2 = Inst.getOperand(2).getReg(); in validateInstruction() local
3467 unsigned Rt2 = Inst.getOperand(1).getReg(); in validateInstruction() local
3480 unsigned Rt2 = Inst.getOperand(2).getReg(); in validateInstruction() local
3496 unsigned Rt2 = Inst.getOperand(2).getReg(); in validateInstruction() local
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 4046 unsigned Rt2 = getARMRegisterNumbering(Inst.getOperand(1).getReg()); in validateInstruction() local
4055 unsigned Rt2 = getARMRegisterNumbering(Inst.getOperand(1).getReg()); in validateInstruction() local
4066 unsigned Rt2 = getARMRegisterNumbering(Inst.getOperand(2).getReg()); in validateInstruction() local
|
| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.h | 3560 static Instr Rt2(CPURegister rt2) { in Rt2() function
|
| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 6042 unsigned Rt2 = MRI->getEncodingValue(Reg2); in ParseInstruction() local
6239 const unsigned Rt2 = MRI->getEncodingValue(Inst.getOperand(1).getReg()); in validateInstruction() local
6261 unsigned Rt2 = MRI->getEncodingValue(Inst.getOperand(1).getReg()); in validateInstruction() local
6278 unsigned Rt2 = MRI->getEncodingValue(Inst.getOperand(1).getReg()); in validateInstruction() local
6288 unsigned Rt2 = MRI->getEncodingValue(Inst.getOperand(2).getReg()); in validateInstruction() local
|
| /external/v8/src/arm64/ |
| D | assembler-arm64.h | 2908 static Instr Rt2(CPURegister rt2) { in Rt2() function
|
| /external/swiftshader/third_party/subzero/src/ |
| D | IceAssemblerARM32.cpp | 3096 IValueT Rt2 = encodeGPRegister(OpRt2, "Rt", Vmovdrr); in vmovdrr() local
3147 IValueT Rt2 = encodeGPRegister(OpRt2, "Rt", Vmovrrd); in vmovrrd() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 6245 unsigned Rt2 = MRI->getEncodingValue(Reg2); in ParseInstruction() local
6366 unsigned Rt2 = MRI->getEncodingValue(Inst.getOperand(RtIndex + 1).getReg()); in validateLDRDSTRD() local
|
| /external/clang/lib/CodeGen/ |
| D | CGBuiltin.cpp | 4042 Value *Rt2 = Builder.CreateLShr(RtAndRt2, C1); in EmitARMBuiltinExpr() local
|