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1 // Copyright 2015, VIXL authors
2 // All rights reserved.
3 //
4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are met:
6 //
7 //   * Redistributions of source code must retain the above copyright notice,
8 //     this list of conditions and the following disclaimer.
9 //   * Redistributions in binary form must reproduce the above copyright notice,
10 //     this list of conditions and the following disclaimer in the documentation
11 //     and/or other materials provided with the distribution.
12 //   * Neither the name of ARM Limited nor the names of its contributors may be
13 //     used to endorse or promote products derived from this software without
14 //     specific prior written permission.
15 //
16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
17 // ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18 // WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19 // DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
20 // FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 // DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22 // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
23 // CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 // OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 
27 #ifndef VIXL_AARCH64_SIMULATOR_CONSTANTS_AARCH64_H_
28 #define VIXL_AARCH64_SIMULATOR_CONSTANTS_AARCH64_H_
29 
30 #include "instructions-aarch64.h"
31 
32 namespace vixl {
33 namespace aarch64 {
34 
35 // Debug instructions.
36 //
37 // VIXL's macro-assembler and simulator support a few pseudo instructions to
38 // make debugging easier. These pseudo instructions do not exist on real
39 // hardware.
40 //
41 // TODO: Also consider allowing these pseudo-instructions to be disabled in the
42 // simulator, so that users can check that the input is a valid native code.
43 // (This isn't possible in all cases. Printf won't work, for example.)
44 //
45 // Each debug pseudo instruction is represented by a HLT instruction. The HLT
46 // immediate field is used to identify the type of debug pseudo instruction.
47 
48 enum DebugHltOpcode {
49   kUnreachableOpcode = 0xdeb0,
50   kPrintfOpcode,
51   kTraceOpcode,
52   kLogOpcode,
53   kRuntimeCallOpcode,
54   kSetCPUFeaturesOpcode,
55   kEnableCPUFeaturesOpcode,
56   kDisableCPUFeaturesOpcode,
57   kSaveCPUFeaturesOpcode,
58   kRestoreCPUFeaturesOpcode,
59   // Aliases.
60   kDebugHltFirstOpcode = kUnreachableOpcode,
61   kDebugHltLastOpcode = kLogOpcode
62 };
63 VIXL_DEPRECATED("DebugHltOpcode", typedef DebugHltOpcode DebugHltOpcodes);
64 
65 // Each pseudo instruction uses a custom encoding for additional arguments, as
66 // described below.
67 
68 // Unreachable - kUnreachableOpcode
69 //
70 // Instruction which should never be executed. This is used as a guard in parts
71 // of the code that should not be reachable, such as in data encoded inline in
72 // the instructions.
73 
74 // Printf - kPrintfOpcode
75 //  - arg_count: The number of arguments.
76 //  - arg_pattern: A set of PrintfArgPattern values, packed into two-bit fields.
77 //
78 // Simulate a call to printf.
79 //
80 // Floating-point and integer arguments are passed in separate sets of registers
81 // in AAPCS64 (even for varargs functions), so it is not possible to determine
82 // the type of each argument without some information about the values that were
83 // passed in. This information could be retrieved from the printf format string,
84 // but the format string is not trivial to parse so we encode the relevant
85 // information with the HLT instruction.
86 //
87 // Also, the following registers are populated (as if for a native Aarch64
88 // call):
89 //    x0: The format string
90 // x1-x7: Optional arguments, if type == CPURegister::kRegister
91 // d0-d7: Optional arguments, if type == CPURegister::kFPRegister
92 const unsigned kPrintfArgCountOffset = 1 * kInstructionSize;
93 const unsigned kPrintfArgPatternListOffset = 2 * kInstructionSize;
94 const unsigned kPrintfLength = 3 * kInstructionSize;
95 
96 const unsigned kPrintfMaxArgCount = 4;
97 
98 // The argument pattern is a set of two-bit-fields, each with one of the
99 // following values:
100 enum PrintfArgPattern {
101   kPrintfArgW = 1,
102   kPrintfArgX = 2,
103   // There is no kPrintfArgS because floats are always converted to doubles in C
104   // varargs calls.
105   kPrintfArgD = 3
106 };
107 static const unsigned kPrintfArgPatternBits = 2;
108 
109 // Trace - kTraceOpcode
110 //  - parameter: TraceParameter stored as a uint32_t
111 //  - command: TraceCommand stored as a uint32_t
112 //
113 // Allow for trace management in the generated code. This enables or disables
114 // automatic tracing of the specified information for every simulated
115 // instruction.
116 const unsigned kTraceParamsOffset = 1 * kInstructionSize;
117 const unsigned kTraceCommandOffset = 2 * kInstructionSize;
118 const unsigned kTraceLength = 3 * kInstructionSize;
119 
120 // Trace parameters.
121 enum TraceParameters {
122   LOG_DISASM = 1 << 0,   // Log disassembly.
123   LOG_REGS = 1 << 1,     // Log general purpose registers.
124   LOG_VREGS = 1 << 2,    // Log NEON and floating-point registers.
125   LOG_SYSREGS = 1 << 3,  // Log the flags and system registers.
126   LOG_WRITE = 1 << 4,    // Log writes to memory.
127   LOG_BRANCH = 1 << 5,   // Log taken branches.
128 
129   LOG_NONE = 0,
130   LOG_STATE = LOG_REGS | LOG_VREGS | LOG_SYSREGS,
131   LOG_ALL = LOG_DISASM | LOG_STATE | LOG_WRITE | LOG_BRANCH
132 };
133 
134 // Trace commands.
135 enum TraceCommand { TRACE_ENABLE = 1, TRACE_DISABLE = 2 };
136 
137 // Log - kLogOpcode
138 //  - parameter: TraceParameter stored as a uint32_t
139 //
140 // Print the specified information once. This mechanism is separate from Trace.
141 // In particular, _all_ of the specified registers are printed, rather than just
142 // the registers that the instruction writes.
143 //
144 // Any combination of the TraceParameters values can be used, except that
145 // LOG_DISASM is not supported for Log.
146 const unsigned kLogParamsOffset = 1 * kInstructionSize;
147 const unsigned kLogLength = 2 * kInstructionSize;
148 
149 // Runtime call simulation - kRuntimeCallOpcode
150 enum RuntimeCallType { kCallRuntime, kTailCallRuntime };
151 
152 const unsigned kRuntimeCallWrapperOffset = 1 * kInstructionSize;
153 // The size of a pointer on host.
154 const unsigned kRuntimeCallAddressSize = sizeof(uintptr_t);
155 const unsigned kRuntimeCallFunctionOffset =
156     kRuntimeCallWrapperOffset + kRuntimeCallAddressSize;
157 const unsigned kRuntimeCallTypeOffset =
158     kRuntimeCallFunctionOffset + kRuntimeCallAddressSize;
159 const unsigned kRuntimeCallLength = kRuntimeCallTypeOffset + sizeof(uint32_t);
160 
161 // Enable or disable CPU features - kSetCPUFeaturesOpcode
162 //                                - kEnableCPUFeaturesOpcode
163 //                                - kDisableCPUFeaturesOpcode
164 //  - parameter[...]: A list of `CPUFeatures::Feature`s, encoded as
165 //    ConfigureCPUFeaturesElementType and terminated with CPUFeatures::kNone.
166 //  - [Padding to align to kInstructionSize.]
167 //
168 // 'Set' completely overwrites the existing CPU features.
169 // 'Enable' and 'Disable' update the existing CPU features.
170 //
171 // These mechanisms allows users to strictly check the use of CPU features in
172 // different regions of code.
173 //
174 // These have no effect on the set of 'seen' features (as reported by
175 // CPUFeaturesAuditor::HasSeen(...)).
176 typedef uint8_t ConfigureCPUFeaturesElementType;
177 const unsigned kConfigureCPUFeaturesListOffset = 1 * kInstructionSize;
178 
179 // Save or restore CPU features - kSaveCPUFeaturesOpcode
180 //                              - kRestoreCPUFeaturesOpcode
181 //
182 // These mechanisms provide a stack-like mechanism for preserving the CPU
183 // features, or restoring the last-preserved features. These pseudo-instructions
184 // take no arguments.
185 //
186 // These have no effect on the set of 'seen' features (as reported by
187 // CPUFeaturesAuditor::HasSeen(...)).
188 
189 }  // namespace aarch64
190 }  // namespace vixl
191 
192 #endif  // VIXL_AARCH64_SIMULATOR_CONSTANTS_AARCH64_H_
193