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1 /******************************************************************************
2  *                                                                            *
3  * Copyright (C) 2018 The Android Open Source Project
4  *
5  * Licensed under the Apache License, Version 2.0 (the "License");
6  * you may not use this file except in compliance with the License.
7  * You may obtain a copy of the License at:
8  *
9  * http://www.apache.org/licenses/LICENSE-2.0
10  *
11  * Unless required by applicable law or agreed to in writing, software
12  * distributed under the License is distributed on an "AS IS" BASIS,
13  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14  * See the License for the specific language governing permissions and
15  * limitations under the License.
16  *
17  *****************************************************************************
18  * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19 */
20 #ifndef IXHEAACD_SBR_CONST_H
21 #define IXHEAACD_SBR_CONST_H
22 
23 #define SBR_AMPLITUDE_RESOLUTION_1_5 0
24 #define SBR_AMPLITUDE_RESOLUTION_3_0 1
25 #define NOISE_FLOOR_OFFSET_INT 6
26 
27 #define LOW 0
28 #define HIGH 1
29 
30 #define DTDF_DIR_TIME 1
31 #define DTDF_DIR_FREQ 0
32 
33 #define SBR_CYC_REDCY_CHK_BITS 10
34 
35 #define SBR_SAMP_FEQ_LVL_DEF 2
36 #define SBR_CHANGE_LVL_DEF 1
37 #define SBR_NOISE_BND_DEF 2
38 
39 #define SBR_BND_LIMIT_DEF 2
40 #define SBR_GAIN_LIMIT_DEF 2
41 #define SBR_INTERPOL_SAMP_FEQ_DEF 1
42 #define SBR_SMOOTH_LEN_DEF 1
43 
44 #define SBR_AMPLITUDE_RESOLUTION_BITS 1
45 #define SBR_BEGIN_SAMP_FREQ_BITS 4
46 #define SBR_END_SAMP_FREQ_BITS 4
47 #define SBR_CROSS_OVER_BND_BITS 3
48 
49 #define ESBR_CROSS_OVER_BND_BITS 4
50 #define ESBR_PRE_FLAT_BITS 1
51 #define ESBR_PVC_MODE_BITS 2
52 
53 #define ESBR_HEADER_EXTRA_3_BITS 1
54 #define PVC_MODE_BITS 2
55 
56 #define SBR_HDR_EXTR_1_BITS 1
57 #define SBR_HDR_EXTR_2_BITS 1
58 
59 #define SBR_SAMP_FREQ_LVL_BITS 2
60 #define SBR_CHANGE_LVL_BITS 1
61 #define SBR_NOISE_BND_BITS 2
62 
63 #define SBR_BND_LIMIT_BITS 2
64 #define SBR_GAIN_LIMIT_BITS 2
65 #define SBR_INTERPOL_SAMP_FREQ_BITS 1
66 #define SBR_SMOOTH_LEN_BITS 1
67 #define SBR_STOCK_HE2_BITS 1
68 #define SBR_HDR_RESERV_BITS 2
69 #define SBR_SCE_RESERV_BITS 4
70 
71 #define SBR_COUPLNG_MODE_BITS 1
72 
73 #define SBR_INVERSE_FILT_MODE_BITS 2
74 
75 #define SBR_ENLARGED_DATA_BITS 1
76 #define SBR_CONT_SIZE_BITS 4
77 #define SBR_CONT_ESC_CNT_BITS 8
78 #define SBR_CONT_ID_BITS 2
79 
80 #define SBR_DEL_COD_DIR_BITS 1
81 
82 #define SBR_ADD_SINE_FLAG_BITS 1
83 
84 #define SBR_BEGIN_ENVN_BITS_AMPLITUDE_RESOLUTION_3_0 6
85 #define SBR_BEGIN_ENVN_BITS_BALNCE_AMPLITUDE_RESOLUTION_3_0 5
86 #define SBR_BEGIN_NOISE_BITS_AMPLITUDE_RESOLUTION_3_0 5
87 #define SBR_BEGIN_NOISE_BITS_BALNCE_AMPLITUDE_RESOLUTION_3_0 5
88 
89 #define SBR_BEGIN_ENVN_BITS_AMPLITUDE_RESOLUTION_1_5 7
90 #define SBR_BEGIN_ENVN_BITS_BALNCE_AMPLITUDE_RESOLUTION_1_5 6
91 
92 #define NOISE_FLOOR_OFFSET 6.0f
93 
94 #define QMF_BUFFER_SIZE 64
95 #define TIMESLOT_BUFFER_SIZE 78
96 
97 #define MAX_NUM_QMF_BANDS_ESBR 128
98 
99 #define SBR_HF_ADJ_OFFSET 2
100 
101 #define ESBR_HBE_DELAY_OFFSET 32
102 
103 #define HBE_OPER_WIN_LEN (13)
104 #define NO_QMF_SYNTH_CHANNELS 64
105 #define TWICE_QMF_SYNTH_CHANNELS_NUM 128
106 
107 #define MAX_NO_COLS_VALUE 64
108 #define MAX_NO_COLS_VALUE_BY_2 (MAX_NO_COLS_VALUE >> 1)
109 
110 #define MAX_QMF_X_INBUF_SIZE (MAX_NO_COLS_VALUE_BY_2 + HBE_OPER_WIN_LEN - 1)
111 #define MAX_QMF_X_OUTBUF_SIZE \
112   2 * (MAX_NO_COLS_VALUE_BY_2 + HBE_OPER_WIN_LEN - 1)
113 #define MAX_QMF_X_IN_REAL_BUF (NO_QMF_SYNTH_CHANNELS * MAX_QMF_X_INBUF_SIZE)
114 #define MAX_QMF_X_IN_IMAG_BUF (NO_QMF_SYNTH_CHANNELS * MAX_QMF_X_INBUF_SIZE)
115 
116 #define MAX_QMF_X_OUT_REAL_BUF (NO_QMF_SYNTH_CHANNELS * MAX_QMF_X_OUTBUF_SIZE)
117 #define MAX_QMF_X_OUT_IMAG_BUF (NO_QMF_SYNTH_CHANNELS * MAX_QMF_X_OUTBUF_SIZE)
118 
119 #define X_INBUF_SIZE (MAX_FRAME_SIZE + NO_QMF_SYNTH_CHANNELS)
120 #define X_OUTBUF_SIZE (X_INBUF_SIZE * 2)
121 
122 #define HBE_OPER_BLK_LEN_2 10
123 #define HBE_OPER_BLK_LEN_3 8
124 #define HBE_OPER_BLK_LEN_4 6
125 
126 #define MAX_HBE_PERSISTENT_SIZE                                                \
127   (MAX_QMF_X_INBUF_SIZE * sizeof(FLOAT32*) +                                   \
128    MAX_QMF_X_OUTBUF_SIZE * sizeof(FLOAT32*) +                                  \
129    MAX_QMF_X_IN_REAL_BUF * sizeof(FLOAT32) +                                   \
130    MAX_QMF_X_IN_IMAG_BUF * sizeof(FLOAT32) +                                   \
131    MAX_QMF_X_OUT_REAL_BUF * sizeof(FLOAT32) +                                  \
132    MAX_QMF_X_OUT_IMAG_BUF * sizeof(FLOAT32) + X_INBUF_SIZE * sizeof(FLOAT32) + \
133    X_OUTBUF_SIZE * sizeof(FLOAT32))
134 
135 #define MAX_QMF_BUF_LEN 78
136 
137 #define SBR_FRAME_CLASS_BITS 2
138 #define SBR_VAR_BORD_BITS 2
139 #define SBR_FRQ_RES_BITS 1
140 #define SBR_REL_BITS 2
141 #define SBR_ENV_BITS 2
142 #define SBR_NUM_BITS 2
143 
144 #define FIXFIX 0
145 #define FIXVAR 1
146 #define VARFIX 2
147 #define VARVAR 3
148 
149 #define LEN_NIBBLE (4)
150 
151 #define PI 3.14159265358979323846264338327950288
152 #define EPS 1e-12f
153 #define LOG2 0.69314718056f
154 
155 #define MAX_STRETCH 4
156 #define MAXDEG 3
157 
158 #define EXP_FOR_SQRT 0.5f
159 
160 #define SBR_HF_RELAXATION_PARAM 0.999999f
161 
162 #define ESBR_PATCHING_MODE_BITS 1
163 #define ESBR_OVERSAMPLING_FLAG_BITS 1
164 #define ESBR_PITCHIN_FLAG_BITS 1
165 #define ESBR_PITCHIN_BINS_BITS 7
166 #define ESBR_RESERVED_PRESENT 1
167 #define ESBR_RESERVED_BITS_DATA 4
168 #define ESBR_INVF_MODE_BITS 2
169 #define ESBR_NOISE_MODE_BITS 1
170 #define ESBR_DOMAIN_BITS 1
171 
172 #define SBR_NUM_QMF_BANDS 64
173 #define SBR_NUM_QMF_BANDS_2 32
174 
175 #define PVC_NUM_TIME_SLOTS 16
176 #define PVC_ESG_MIN_VAL 0.1f
177 
178 #define PVC_10LOG10_ESG_MIN_VAL -10.0f
179 
180 #define PVC_DIV_MODE_BITS 3
181 #define PVC_NS_MODE_BITS 1
182 #define PVC_GRID_INFO_BITS 1
183 #define PVC_REUSE_PVC_ID_BITS 1
184 #define PVC_ID_BITS 7
185 #define PVC_NB_HIGH_MODE1 8
186 #define PVC_NB_HIGH_MODE2 6
187 
188 #define PVC_NB_LOW 3
189 #define PVC_ID_NUM_GROUPS 3
190 #define PVC_NB_HIGH 128
191 #define PVC_ID_NBIT 7
192 
193 #define ESC_SIN_POS 31
194 #define MAX_OCTAVE 29
195 #define MAX_SECOND_REGION 50
196 
197 #define SBR_ENERGY_PAN_OFFSET 12
198 #define SBR_ENV_SF_MAX_VAL_1_5 70
199 #define MAX_NOISE_FLOOR_FAC_VAL 35
200 #define MIN_NOISE_FLOOR_FAC_VAL 0
201 
202 #define HBE_ZERO_BAND_IDX 6
203 
204 #define MAX_OV_DELAY 12
205 
206 #define LD_TRAN 1
207 #define LD_ENV_TIME_SLOT 7
208 #define LD_ENV_TBL_512 16
209 #define LD_ENV_TBL_480 15
210 #define LD_ENV_TBL_SIZE 4
211 #define SBR_TRAN_BITS 4
212 #define SBRLD_CLA_BITS 1
213 #define SBR_ENVT_NUMENV 0
214 #define SBR_ENVT_TRANIDX 3
215 
216 static const int ixheaacd_ld_env_table_512[LD_ENV_TBL_512][LD_ENV_TBL_SIZE] = {
217     {2, 4, -1, 0},  {2, 5, -1, 0},  {3, 2, 6, 1},   {3, 3, 7, 1},
218     {3, 4, 8, 1},   {3, 5, 9, 1},   {3, 6, 10, 1},  {3, 7, 11, 1},
219     {3, 8, 12, 1},  {3, 9, 13, 1},  {3, 10, 14, 1}, {2, 11, -1, 1},
220     {2, 12, -1, 1}, {2, 13, -1, 1}, {2, 14, -1, 1}, {2, 15, -1, 1},
221 };
222 
223 static const int ixheaacd_ld_env_table_480[LD_ENV_TBL_480][LD_ENV_TBL_SIZE] = {
224     {2, 4, -1, 0},  {2, 5, -1, 0},  {3, 2, 6, 1},   {3, 3, 7, 1},
225     {3, 4, 8, 1},   {3, 5, 9, 1},   {3, 6, 10, 1},  {3, 7, 11, 1},
226     {3, 8, 12, 1},  {3, 9, 13, 1},  {2, 10, -1, 1}, {2, 11, -1, 1},
227     {2, 12, -1, 1}, {2, 13, -1, 1}, {2, 14, -1, 1},
228 };
229 
230 static const int ixheaacd_ld_env_table_time_slot[LD_ENV_TIME_SLOT] = {
231     8, 5, 0, 0, 0, 0, 0};
232 
233 #define SBR_CLA_BITS 2
234 #define SBR_ABS_BITS 2
235 #define SBR_RES_BITS 1
236 #define SBR_REL_BITS 2
237 #define SBR_ENV_BITS 2
238 #define SBR_NUM_BITS 2
239 
240 #define FIXFIX 0
241 #define FIXVAR 1
242 #define VARFIX 2
243 #define VARVAR 3
244 
245 #define LEN_NIBBLE (4)
246 
247 #endif
248