1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2010 Samsung Electronics 4 * Minkyu Kang <mk7.kang@samsung.com> 5 */ 6 7 #ifndef __ASM_ARM_ARCH_CLK_H_ 8 #define __ASM_ARM_ARCH_CLK_H_ 9 10 #define APLL 0 11 #define MPLL 1 12 #define EPLL 2 13 #define HPLL 3 14 #define VPLL 4 15 #define BPLL 5 16 #define RPLL 6 17 #define SPLL 7 18 #define CPLL 8 19 #define DPLL 9 20 #define IPLL 10 21 22 #define MASK_PRE_RATIO(x) (0xff << ((x << 4) + 8)) 23 #define MASK_RATIO(x) (0xf << (x << 4)) 24 #define SET_PRE_RATIO(x, y) ((y & 0xff) << ((x << 4) + 8)) 25 #define SET_RATIO(x, y) ((y & 0xf) << (x << 4)) 26 27 enum pll_src_bit { 28 EXYNOS_SRC_MPLL = 6, 29 EXYNOS_SRC_EPLL, 30 EXYNOS_SRC_VPLL, 31 EXYNOS542X_SRC_MPLL = 3, 32 EXYNOS542X_SRC_SPLL, 33 EXYNOS542X_SRC_EPLL = 6, 34 EXYNOS542X_SRC_RPLL, 35 }; 36 37 unsigned long get_pll_clk(int pllreg); 38 unsigned long get_arm_clk(void); 39 unsigned long get_i2c_clk(void); 40 unsigned long get_pwm_clk(void); 41 unsigned long get_uart_clk(int dev_index); 42 unsigned long get_mmc_clk(int dev_index); 43 void set_mmc_clk(int dev_index, unsigned int div); 44 unsigned long get_lcd_clk(void); 45 void set_lcd_clk(void); 46 void set_mipi_clk(void); 47 int set_i2s_clk_source(unsigned int i2s_id); 48 int set_i2s_clk_prescaler(unsigned int src_frq, unsigned int dst_frq, 49 unsigned int i2s_id); 50 int set_epll_clk(unsigned long rate); 51 int set_spi_clk(int periph_id, unsigned int rate); 52 53 /** 54 * get the clk frequency of the required peripheral 55 * 56 * @param peripheral Peripheral id 57 * 58 * @return frequency of the peripheral clk 59 */ 60 unsigned long clock_get_periph_rate(int peripheral); 61 62 #endif 63