/external/fec/ |
D | fec.h | 261 extern enum cpu_mode {UNKNOWN=0,PORT,MMX,SSE,SSE2,ALTIVEC} Cpu_mode; enumerator
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D | encode_rs_8.c | 12 static enum {UNKNOWN=0,MMX,SSE,SSE2,ALTIVEC,PORT} cpu_mode; enumerator
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/external/swiftshader/src/Reactor/ |
D | CPUID.hpp | 52 static bool SSE2; member in rr::CPUID
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D | CPUID.cpp | 35 bool CPUID::SSE2 = detectSSE2(); member in rr::CPUID
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/external/swiftshader/src/System/ |
D | CPUID.hpp | 57 static bool SSE2; member in sw::CPUID
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D | CPUID.cpp | 35 bool CPUID::SSE2 = detectSSE2(); member in sw::CPUID
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/external/swiftshader/src/Common/ |
D | CPUID.hpp | 57 static bool SSE2; member in sw::CPUID
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D | CPUID.cpp | 35 bool CPUID::SSE2 = detectSSE2(); member in sw::CPUID
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/external/skia/src/core/ |
D | SkCpu.h | 16 SSE2 = 1 << 1, enumerator
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/external/skqp/src/core/ |
D | SkCpu.h | 16 SSE2 = 1 << 1, enumerator
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/external/tensorflow/tensorflow/core/platform/ |
D | cpu_info.h | 60 SSE2 = 2, enumerator
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/external/libchrome/base/ |
D | cpu.h | 22 SSE2, enumerator
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86Subtarget.h | 45 NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42 enumerator
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/external/mesa3d/src/gallium/drivers/swr/rasterizer/common/ |
D | isa.hpp | 76 bool SSE2(void) { return CPU_Rep.f_1_EDX_[26]; } in SSE2() function in InstructionSet
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/external/llvm/lib/Target/X86/ |
D | X86Subtarget.h | 49 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512F enumerator
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/external/swiftshader/third_party/subzero/src/ |
D | IceTargetLoweringX8632Traits.h | 271 SSE2 = Begin, enumerator
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D | IceTargetLoweringX8664Traits.h | 296 SSE2 = Begin, enumerator
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86Subtarget.h | 74 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512F enumerator
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/external/clang/lib/CodeGen/ |
D | CGBuiltin.cpp | 6767 SSE2, in EmitX86BuiltinExpr() enumerator
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/external/clang/lib/Basic/ |
D | Targets.cpp | 2302 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512F enumerator
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