1 /**********************************************************
2 * Copyright 2008-2013 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 /**
27 * @file svga_cmd_vgpu10.c
28 *
29 * Command construction utility for the vgpu10 SVGA3D protocol.
30 *
31 * \author Mingcheng Chen
32 * \author Brian Paul
33 */
34
35
36 #include "svga_winsys.h"
37 #include "svga_resource_buffer.h"
38 #include "svga_resource_texture.h"
39 #include "svga_surface.h"
40 #include "svga_cmd.h"
41
42
43 /**
44 * Emit a surface relocation for RenderTargetViewId
45 */
46 static void
view_relocation(struct svga_winsys_context * swc,struct pipe_surface * surface,SVGA3dRenderTargetViewId * id,unsigned flags)47 view_relocation(struct svga_winsys_context *swc, // IN
48 struct pipe_surface *surface, // IN
49 SVGA3dRenderTargetViewId *id, // OUT
50 unsigned flags)
51 {
52 if (surface) {
53 struct svga_surface *s = svga_surface(surface);
54 assert(s->handle);
55 swc->surface_relocation(swc, id, NULL, s->handle, flags);
56 }
57 else {
58 swc->surface_relocation(swc, id, NULL, NULL, flags);
59 }
60 }
61
62
63 /**
64 * Emit a surface relocation for a ResourceId.
65 */
66 static void
surface_to_resourceid(struct svga_winsys_context * swc,struct svga_winsys_surface * surface,SVGA3dSurfaceId * sid,unsigned flags)67 surface_to_resourceid(struct svga_winsys_context *swc, // IN
68 struct svga_winsys_surface *surface, // IN
69 SVGA3dSurfaceId *sid, // OUT
70 unsigned flags) // IN
71 {
72 if (surface) {
73 swc->surface_relocation(swc, sid, NULL, surface, flags);
74 }
75 else {
76 swc->surface_relocation(swc, sid, NULL, NULL, flags);
77 }
78 }
79
80
81 #define SVGA3D_CREATE_COMMAND(CommandName, CommandCode) \
82 SVGA3dCmdDX##CommandName *cmd; \
83 { \
84 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_##CommandCode, \
85 sizeof(SVGA3dCmdDX##CommandName), 0); \
86 if (!cmd) \
87 return PIPE_ERROR_OUT_OF_MEMORY; \
88 }
89
90 #define SVGA3D_CREATE_CMD_COUNT(CommandName, CommandCode, ElementClassName) \
91 SVGA3dCmdDX##CommandName *cmd; \
92 { \
93 assert(count > 0); \
94 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_##CommandCode, \
95 sizeof(SVGA3dCmdDX##CommandName) + \
96 count * sizeof(ElementClassName), 0); \
97 if (!cmd) \
98 return PIPE_ERROR_OUT_OF_MEMORY; \
99 }
100
101 #define SVGA3D_COPY_BASIC(VariableName) \
102 { \
103 cmd->VariableName = VariableName; \
104 }
105
106 #define SVGA3D_COPY_BASIC_2(VariableName1, VariableName2) \
107 { \
108 SVGA3D_COPY_BASIC(VariableName1); \
109 SVGA3D_COPY_BASIC(VariableName2); \
110 }
111
112 #define SVGA3D_COPY_BASIC_3(VariableName1, VariableName2, VariableName3) \
113 { \
114 SVGA3D_COPY_BASIC_2(VariableName1, VariableName2); \
115 SVGA3D_COPY_BASIC(VariableName3); \
116 }
117
118 #define SVGA3D_COPY_BASIC_4(VariableName1, VariableName2, VariableName3, \
119 VariableName4) \
120 { \
121 SVGA3D_COPY_BASIC_2(VariableName1, VariableName2); \
122 SVGA3D_COPY_BASIC_2(VariableName3, VariableName4); \
123 }
124
125 #define SVGA3D_COPY_BASIC_5(VariableName1, VariableName2, VariableName3, \
126 VariableName4, VariableName5) \
127 {\
128 SVGA3D_COPY_BASIC_3(VariableName1, VariableName2, VariableName3); \
129 SVGA3D_COPY_BASIC_2(VariableName4, VariableName5); \
130 }
131
132 #define SVGA3D_COPY_BASIC_6(VariableName1, VariableName2, VariableName3, \
133 VariableName4, VariableName5, VariableName6) \
134 {\
135 SVGA3D_COPY_BASIC_3(VariableName1, VariableName2, VariableName3); \
136 SVGA3D_COPY_BASIC_3(VariableName4, VariableName5, VariableName6); \
137 }
138
139 #define SVGA3D_COPY_BASIC_7(VariableName1, VariableName2, VariableName3, \
140 VariableName4, VariableName5, VariableName6, \
141 VariableName7) \
142 {\
143 SVGA3D_COPY_BASIC_4(VariableName1, VariableName2, VariableName3, \
144 VariableName4); \
145 SVGA3D_COPY_BASIC_3(VariableName5, VariableName6, VariableName7); \
146 }
147
148 #define SVGA3D_COPY_BASIC_8(VariableName1, VariableName2, VariableName3, \
149 VariableName4, VariableName5, VariableName6, \
150 VariableName7, VariableName8) \
151 {\
152 SVGA3D_COPY_BASIC_4(VariableName1, VariableName2, VariableName3, \
153 VariableName4); \
154 SVGA3D_COPY_BASIC_4(VariableName5, VariableName6, VariableName7, \
155 VariableName8); \
156 }
157
158 #define SVGA3D_COPY_BASIC_9(VariableName1, VariableName2, VariableName3, \
159 VariableName4, VariableName5, VariableName6, \
160 VariableName7, VariableName8, VariableName9) \
161 {\
162 SVGA3D_COPY_BASIC_5(VariableName1, VariableName2, VariableName3, \
163 VariableName4, VariableName5); \
164 SVGA3D_COPY_BASIC_4(VariableName6, VariableName7, VariableName8, \
165 VariableName9); \
166 }
167
168
169 enum pipe_error
SVGA3D_vgpu10_PredCopyRegion(struct svga_winsys_context * swc,struct svga_winsys_surface * dstSurf,uint32 dstSubResource,struct svga_winsys_surface * srcSurf,uint32 srcSubResource,const SVGA3dCopyBox * box)170 SVGA3D_vgpu10_PredCopyRegion(struct svga_winsys_context *swc,
171 struct svga_winsys_surface *dstSurf,
172 uint32 dstSubResource,
173 struct svga_winsys_surface *srcSurf,
174 uint32 srcSubResource,
175 const SVGA3dCopyBox *box)
176 {
177 SVGA3dCmdDXPredCopyRegion *cmd =
178 SVGA3D_FIFOReserve(swc,
179 SVGA_3D_CMD_DX_PRED_COPY_REGION,
180 sizeof(SVGA3dCmdDXPredCopyRegion),
181 2); /* two relocations */
182 if (!cmd)
183 return PIPE_ERROR_OUT_OF_MEMORY;
184
185 swc->surface_relocation(swc, &cmd->dstSid, NULL, dstSurf, SVGA_RELOC_WRITE);
186 swc->surface_relocation(swc, &cmd->srcSid, NULL, srcSurf, SVGA_RELOC_READ);
187 cmd->dstSubResource = dstSubResource;
188 cmd->srcSubResource = srcSubResource;
189 cmd->box = *box;
190
191 swc->commit(swc);
192
193 return PIPE_OK;
194 }
195
196
197 enum pipe_error
SVGA3D_vgpu10_PredCopy(struct svga_winsys_context * swc,struct svga_winsys_surface * dstSurf,struct svga_winsys_surface * srcSurf)198 SVGA3D_vgpu10_PredCopy(struct svga_winsys_context *swc,
199 struct svga_winsys_surface *dstSurf,
200 struct svga_winsys_surface *srcSurf)
201 {
202 SVGA3dCmdDXPredCopy *cmd =
203 SVGA3D_FIFOReserve(swc,
204 SVGA_3D_CMD_DX_PRED_COPY,
205 sizeof(SVGA3dCmdDXPredCopy),
206 2); /* two relocations */
207 if (!cmd)
208 return PIPE_ERROR_OUT_OF_MEMORY;
209
210 swc->surface_relocation(swc, &cmd->dstSid, NULL, dstSurf, SVGA_RELOC_WRITE);
211 swc->surface_relocation(swc, &cmd->srcSid, NULL, srcSurf, SVGA_RELOC_READ);
212
213 swc->commit(swc);
214
215 return PIPE_OK;
216 }
217
218 enum pipe_error
SVGA3D_vgpu10_SetViewports(struct svga_winsys_context * swc,unsigned count,const SVGA3dViewport * viewports)219 SVGA3D_vgpu10_SetViewports(struct svga_winsys_context *swc,
220 unsigned count,
221 const SVGA3dViewport *viewports)
222 {
223 SVGA3D_CREATE_CMD_COUNT(SetViewports, SET_VIEWPORTS, SVGA3dViewport);
224
225 memcpy(cmd + 1, viewports, count * sizeof(SVGA3dViewport));
226
227 swc->commit(swc);
228 return PIPE_OK;
229 }
230
231
232 enum pipe_error
SVGA3D_vgpu10_SetShader(struct svga_winsys_context * swc,SVGA3dShaderType type,struct svga_winsys_gb_shader * gbshader,SVGA3dShaderId shaderId)233 SVGA3D_vgpu10_SetShader(struct svga_winsys_context *swc,
234 SVGA3dShaderType type,
235 struct svga_winsys_gb_shader *gbshader,
236 SVGA3dShaderId shaderId)
237 {
238 SVGA3dCmdDXSetShader *cmd = SVGA3D_FIFOReserve(swc,
239 SVGA_3D_CMD_DX_SET_SHADER,
240 sizeof *cmd,
241 1); /* one relocation */
242 if (!cmd)
243 return PIPE_ERROR_OUT_OF_MEMORY;
244
245 swc->shader_relocation(swc, &cmd->shaderId, NULL, NULL, gbshader, 0);
246
247 cmd->type = type;
248 cmd->shaderId = shaderId;
249 swc->commit(swc);
250
251 return PIPE_OK;
252 }
253
254
255 enum pipe_error
SVGA3D_vgpu10_SetShaderResources(struct svga_winsys_context * swc,SVGA3dShaderType type,uint32 startView,unsigned count,const SVGA3dShaderResourceViewId ids[],struct svga_winsys_surface ** views)256 SVGA3D_vgpu10_SetShaderResources(struct svga_winsys_context *swc,
257 SVGA3dShaderType type,
258 uint32 startView,
259 unsigned count,
260 const SVGA3dShaderResourceViewId ids[],
261 struct svga_winsys_surface **views)
262 {
263 SVGA3dCmdDXSetShaderResources *cmd;
264 SVGA3dShaderResourceViewId *cmd_ids;
265 unsigned i;
266
267 cmd = SVGA3D_FIFOReserve(swc,
268 SVGA_3D_CMD_DX_SET_SHADER_RESOURCES,
269 sizeof(SVGA3dCmdDXSetShaderResources) +
270 count * sizeof(SVGA3dShaderResourceViewId),
271 count); /* 'count' relocations */
272 if (!cmd)
273 return PIPE_ERROR_OUT_OF_MEMORY;
274
275
276 cmd->type = type;
277 cmd->startView = startView;
278
279 cmd_ids = (SVGA3dShaderResourceViewId *) (cmd + 1);
280 for (i = 0; i < count; i++) {
281 swc->surface_relocation(swc, cmd_ids + i, NULL, views[i],
282 SVGA_RELOC_READ);
283 cmd_ids[i] = ids[i];
284 }
285
286 swc->commit(swc);
287 return PIPE_OK;
288 }
289
290
291 enum pipe_error
SVGA3D_vgpu10_SetSamplers(struct svga_winsys_context * swc,unsigned count,uint32 startSampler,SVGA3dShaderType type,const SVGA3dSamplerId * samplerIds)292 SVGA3D_vgpu10_SetSamplers(struct svga_winsys_context *swc,
293 unsigned count,
294 uint32 startSampler,
295 SVGA3dShaderType type,
296 const SVGA3dSamplerId *samplerIds)
297 {
298 SVGA3D_CREATE_CMD_COUNT(SetSamplers, SET_SAMPLERS, SVGA3dSamplerId);
299
300 SVGA3D_COPY_BASIC_2(startSampler, type);
301 memcpy(cmd + 1, samplerIds, count * sizeof(SVGA3dSamplerId));
302
303 swc->commit(swc);
304 return PIPE_OK;
305 }
306
307
308 enum pipe_error
SVGA3D_vgpu10_ClearRenderTargetView(struct svga_winsys_context * swc,struct pipe_surface * color_surf,const float * rgba)309 SVGA3D_vgpu10_ClearRenderTargetView(struct svga_winsys_context *swc,
310 struct pipe_surface *color_surf,
311 const float *rgba)
312 {
313 SVGA3dCmdDXClearRenderTargetView *cmd;
314 struct svga_surface *ss = svga_surface(color_surf);
315
316 cmd = SVGA3D_FIFOReserve(swc,
317 SVGA_3D_CMD_DX_CLEAR_RENDERTARGET_VIEW,
318 sizeof(SVGA3dCmdDXClearRenderTargetView),
319 1); /* one relocation */
320 if (!cmd)
321 return PIPE_ERROR_OUT_OF_MEMORY;
322
323
324 /* NOTE: The following is pretty tricky. We need to emit a view/surface
325 * relocation and we have to provide a pointer to an ID which lies in
326 * the bounds of the command space which we just allocated. However,
327 * we then need to overwrite it with the original RenderTargetViewId.
328 */
329 view_relocation(swc, color_surf, &cmd->renderTargetViewId,
330 SVGA_RELOC_WRITE);
331 cmd->renderTargetViewId = ss->view_id;
332
333 COPY_4V(cmd->rgba.value, rgba);
334
335 swc->commit(swc);
336 return PIPE_OK;
337 }
338
339
340 enum pipe_error
SVGA3D_vgpu10_SetRenderTargets(struct svga_winsys_context * swc,unsigned color_count,struct pipe_surface ** color_surfs,struct pipe_surface * depth_stencil_surf)341 SVGA3D_vgpu10_SetRenderTargets(struct svga_winsys_context *swc,
342 unsigned color_count,
343 struct pipe_surface **color_surfs,
344 struct pipe_surface *depth_stencil_surf)
345 {
346 const unsigned surf_count = color_count + 1;
347 SVGA3dCmdDXSetRenderTargets *cmd;
348 SVGA3dRenderTargetViewId *ctarget;
349 struct svga_surface *ss;
350 unsigned i;
351
352 assert(surf_count > 0);
353
354 cmd = SVGA3D_FIFOReserve(swc,
355 SVGA_3D_CMD_DX_SET_RENDERTARGETS,
356 sizeof(SVGA3dCmdDXSetRenderTargets) +
357 color_count * sizeof(SVGA3dRenderTargetViewId),
358 surf_count); /* 'surf_count' relocations */
359 if (!cmd)
360 return PIPE_ERROR_OUT_OF_MEMORY;
361
362 /* NOTE: See earlier comment about the tricky handling of the ViewIds.
363 */
364
365 /* Depth / Stencil buffer */
366 if (depth_stencil_surf) {
367 ss = svga_surface(depth_stencil_surf);
368 view_relocation(swc, depth_stencil_surf, &cmd->depthStencilViewId,
369 SVGA_RELOC_WRITE);
370 cmd->depthStencilViewId = ss->view_id;
371 }
372 else {
373 /* no depth/stencil buffer - still need a relocation */
374 view_relocation(swc, NULL, &cmd->depthStencilViewId,
375 SVGA_RELOC_WRITE);
376 cmd->depthStencilViewId = SVGA3D_INVALID_ID;
377 }
378
379 /* Color buffers */
380 ctarget = (SVGA3dRenderTargetViewId *) &cmd[1];
381 for (i = 0; i < color_count; i++) {
382 if (color_surfs[i]) {
383 ss = svga_surface(color_surfs[i]);
384 view_relocation(swc, color_surfs[i], ctarget + i, SVGA_RELOC_WRITE);
385 ctarget[i] = ss->view_id;
386 }
387 else {
388 view_relocation(swc, NULL, ctarget + i, SVGA_RELOC_WRITE);
389 ctarget[i] = SVGA3D_INVALID_ID;
390 }
391 }
392
393 swc->commit(swc);
394 return PIPE_OK;
395 }
396
397
398 enum pipe_error
SVGA3D_vgpu10_SetBlendState(struct svga_winsys_context * swc,SVGA3dBlendStateId blendId,const float * blendFactor,uint32 sampleMask)399 SVGA3D_vgpu10_SetBlendState(struct svga_winsys_context *swc,
400 SVGA3dBlendStateId blendId,
401 const float *blendFactor,
402 uint32 sampleMask)
403 {
404 SVGA3D_CREATE_COMMAND(SetBlendState, SET_BLEND_STATE);
405
406 SVGA3D_COPY_BASIC_2(blendId, sampleMask);
407 memcpy(cmd->blendFactor, blendFactor, sizeof(float) * 4);
408
409 swc->commit(swc);
410 return PIPE_OK;
411 }
412
413 enum pipe_error
SVGA3D_vgpu10_SetDepthStencilState(struct svga_winsys_context * swc,SVGA3dDepthStencilStateId depthStencilId,uint32 stencilRef)414 SVGA3D_vgpu10_SetDepthStencilState(struct svga_winsys_context *swc,
415 SVGA3dDepthStencilStateId depthStencilId,
416 uint32 stencilRef)
417 {
418 SVGA3D_CREATE_COMMAND(SetDepthStencilState, SET_DEPTHSTENCIL_STATE);
419
420 SVGA3D_COPY_BASIC_2(depthStencilId, stencilRef);
421
422 swc->commit(swc);
423 return PIPE_OK;
424 }
425
426 enum pipe_error
SVGA3D_vgpu10_SetRasterizerState(struct svga_winsys_context * swc,SVGA3dRasterizerStateId rasterizerId)427 SVGA3D_vgpu10_SetRasterizerState(struct svga_winsys_context *swc,
428 SVGA3dRasterizerStateId rasterizerId)
429 {
430 SVGA3D_CREATE_COMMAND(SetRasterizerState, SET_RASTERIZER_STATE);
431
432 cmd->rasterizerId = rasterizerId;
433
434 swc->commit(swc);
435 return PIPE_OK;
436 }
437
438 enum pipe_error
SVGA3D_vgpu10_SetPredication(struct svga_winsys_context * swc,SVGA3dQueryId queryId,uint32 predicateValue)439 SVGA3D_vgpu10_SetPredication(struct svga_winsys_context *swc,
440 SVGA3dQueryId queryId,
441 uint32 predicateValue)
442 {
443 SVGA3dCmdDXSetPredication *cmd;
444
445 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_PREDICATION,
446 sizeof *cmd, 0);
447
448 if (!cmd)
449 return PIPE_ERROR_OUT_OF_MEMORY;
450
451 cmd->queryId = queryId;
452 cmd->predicateValue = predicateValue;
453 swc->commit(swc);
454 return PIPE_OK;
455 }
456
457 enum pipe_error
SVGA3D_vgpu10_SetSOTargets(struct svga_winsys_context * swc,unsigned count,const SVGA3dSoTarget * targets,struct svga_winsys_surface ** surfaces)458 SVGA3D_vgpu10_SetSOTargets(struct svga_winsys_context *swc,
459 unsigned count,
460 const SVGA3dSoTarget *targets,
461 struct svga_winsys_surface **surfaces)
462 {
463 SVGA3dCmdDXSetSOTargets *cmd;
464 SVGA3dSoTarget *sot;
465 unsigned i;
466
467 cmd = SVGA3D_FIFOReserve(swc,
468 SVGA_3D_CMD_DX_SET_SOTARGETS,
469 sizeof(SVGA3dCmdDXSetSOTargets) +
470 count * sizeof(SVGA3dSoTarget),
471 count);
472
473 if (!cmd)
474 return PIPE_ERROR_OUT_OF_MEMORY;
475
476 cmd->pad0 = 0;
477 sot = (SVGA3dSoTarget *)(cmd + 1);
478 for (i = 0; i < count; i++, sot++) {
479 if (surfaces[i]) {
480 sot->offset = targets[i].offset;
481 sot->sizeInBytes = targets[i].sizeInBytes;
482 swc->surface_relocation(swc, &sot->sid, NULL, surfaces[i],
483 SVGA_RELOC_WRITE);
484 }
485 else {
486 sot->offset = 0;
487 sot->sizeInBytes = ~0u;
488 swc->surface_relocation(swc, &sot->sid, NULL, NULL,
489 SVGA_RELOC_WRITE);
490 }
491 }
492 swc->commit(swc);
493 return PIPE_OK;
494 }
495
496 enum pipe_error
SVGA3D_vgpu10_SetScissorRects(struct svga_winsys_context * swc,unsigned count,const SVGASignedRect * rects)497 SVGA3D_vgpu10_SetScissorRects(struct svga_winsys_context *swc,
498 unsigned count,
499 const SVGASignedRect *rects)
500 {
501 SVGA3dCmdDXSetScissorRects *cmd;
502
503 assert(count > 0);
504 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_SCISSORRECTS,
505 sizeof(SVGA3dCmdDXSetScissorRects) +
506 count * sizeof(SVGASignedRect),
507 0);
508 if (!cmd)
509 return PIPE_ERROR_OUT_OF_MEMORY;
510
511 memcpy(cmd + 1, rects, count * sizeof(SVGASignedRect));
512
513 swc->commit(swc);
514 return PIPE_OK;
515 }
516
517 enum pipe_error
SVGA3D_vgpu10_SetStreamOutput(struct svga_winsys_context * swc,SVGA3dStreamOutputId soid)518 SVGA3D_vgpu10_SetStreamOutput(struct svga_winsys_context *swc,
519 SVGA3dStreamOutputId soid)
520 {
521 SVGA3D_CREATE_COMMAND(SetStreamOutput, SET_STREAMOUTPUT);
522
523 cmd->soid = soid;
524
525 swc->commit(swc);
526 return PIPE_OK;
527 }
528
529 enum pipe_error
SVGA3D_vgpu10_Draw(struct svga_winsys_context * swc,uint32 vertexCount,uint32 startVertexLocation)530 SVGA3D_vgpu10_Draw(struct svga_winsys_context *swc,
531 uint32 vertexCount,
532 uint32 startVertexLocation)
533 {
534 SVGA3D_CREATE_COMMAND(Draw, DRAW);
535
536 SVGA3D_COPY_BASIC_2(vertexCount, startVertexLocation);
537
538 swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
539 swc->commit(swc);
540 swc->num_draw_commands++;
541 return PIPE_OK;
542 }
543
544 enum pipe_error
SVGA3D_vgpu10_DrawIndexed(struct svga_winsys_context * swc,uint32 indexCount,uint32 startIndexLocation,int32 baseVertexLocation)545 SVGA3D_vgpu10_DrawIndexed(struct svga_winsys_context *swc,
546 uint32 indexCount,
547 uint32 startIndexLocation,
548 int32 baseVertexLocation)
549 {
550 SVGA3D_CREATE_COMMAND(DrawIndexed, DRAW_INDEXED);
551
552 SVGA3D_COPY_BASIC_3(indexCount, startIndexLocation,
553 baseVertexLocation);
554
555 swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
556 swc->commit(swc);
557 swc->num_draw_commands++;
558 return PIPE_OK;
559 }
560
561 enum pipe_error
SVGA3D_vgpu10_DrawInstanced(struct svga_winsys_context * swc,uint32 vertexCountPerInstance,uint32 instanceCount,uint32 startVertexLocation,uint32 startInstanceLocation)562 SVGA3D_vgpu10_DrawInstanced(struct svga_winsys_context *swc,
563 uint32 vertexCountPerInstance,
564 uint32 instanceCount,
565 uint32 startVertexLocation,
566 uint32 startInstanceLocation)
567 {
568 SVGA3D_CREATE_COMMAND(DrawInstanced, DRAW_INSTANCED);
569
570 SVGA3D_COPY_BASIC_4(vertexCountPerInstance, instanceCount,
571 startVertexLocation, startInstanceLocation);
572
573 swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
574 swc->commit(swc);
575 swc->num_draw_commands++;
576 return PIPE_OK;
577 }
578
579 enum pipe_error
SVGA3D_vgpu10_DrawIndexedInstanced(struct svga_winsys_context * swc,uint32 indexCountPerInstance,uint32 instanceCount,uint32 startIndexLocation,int32 baseVertexLocation,uint32 startInstanceLocation)580 SVGA3D_vgpu10_DrawIndexedInstanced(struct svga_winsys_context *swc,
581 uint32 indexCountPerInstance,
582 uint32 instanceCount,
583 uint32 startIndexLocation,
584 int32 baseVertexLocation,
585 uint32 startInstanceLocation)
586 {
587 SVGA3D_CREATE_COMMAND(DrawIndexedInstanced, DRAW_INDEXED_INSTANCED);
588
589 SVGA3D_COPY_BASIC_5(indexCountPerInstance, instanceCount,
590 startIndexLocation, baseVertexLocation,
591 startInstanceLocation);
592
593
594 swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
595 swc->commit(swc);
596 swc->num_draw_commands++;
597 return PIPE_OK;
598 }
599
600 enum pipe_error
SVGA3D_vgpu10_DrawAuto(struct svga_winsys_context * swc)601 SVGA3D_vgpu10_DrawAuto(struct svga_winsys_context *swc)
602 {
603 SVGA3D_CREATE_COMMAND(DrawAuto, DRAW_AUTO);
604
605 swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
606 swc->commit(swc);
607 swc->num_draw_commands++;
608 return PIPE_OK;
609 }
610
611 enum pipe_error
SVGA3D_vgpu10_DefineQuery(struct svga_winsys_context * swc,SVGA3dQueryId queryId,SVGA3dQueryType type,SVGA3dDXQueryFlags flags)612 SVGA3D_vgpu10_DefineQuery(struct svga_winsys_context *swc,
613 SVGA3dQueryId queryId,
614 SVGA3dQueryType type,
615 SVGA3dDXQueryFlags flags)
616 {
617 SVGA3D_CREATE_COMMAND(DefineQuery, DEFINE_QUERY);
618
619 SVGA3D_COPY_BASIC_3(queryId, type, flags);
620
621 swc->commit(swc);
622 return PIPE_OK;
623 }
624
625 enum pipe_error
SVGA3D_vgpu10_DestroyQuery(struct svga_winsys_context * swc,SVGA3dQueryId queryId)626 SVGA3D_vgpu10_DestroyQuery(struct svga_winsys_context *swc,
627 SVGA3dQueryId queryId)
628 {
629 SVGA3D_CREATE_COMMAND(DestroyQuery, DESTROY_QUERY);
630
631 cmd->queryId = queryId;
632
633 swc->commit(swc);
634 return PIPE_OK;
635 }
636
637 enum pipe_error
SVGA3D_vgpu10_BindQuery(struct svga_winsys_context * swc,struct svga_winsys_gb_query * gbQuery,SVGA3dQueryId queryId)638 SVGA3D_vgpu10_BindQuery(struct svga_winsys_context *swc,
639 struct svga_winsys_gb_query *gbQuery,
640 SVGA3dQueryId queryId)
641 {
642 SVGA3dCmdDXBindQuery *cmd = SVGA3D_FIFOReserve(swc,
643 SVGA_3D_CMD_DX_BIND_QUERY,
644 sizeof *cmd,
645 1);
646 if (!cmd)
647 return PIPE_ERROR_OUT_OF_MEMORY;
648
649 cmd->queryId = queryId;
650 swc->query_relocation(swc, &cmd->mobid, gbQuery);
651
652 swc->commit(swc);
653 return PIPE_OK;
654 }
655
656 enum pipe_error
SVGA3D_vgpu10_SetQueryOffset(struct svga_winsys_context * swc,SVGA3dQueryId queryId,uint32 mobOffset)657 SVGA3D_vgpu10_SetQueryOffset(struct svga_winsys_context *swc,
658 SVGA3dQueryId queryId,
659 uint32 mobOffset)
660 {
661 SVGA3D_CREATE_COMMAND(SetQueryOffset, SET_QUERY_OFFSET);
662 SVGA3D_COPY_BASIC_2(queryId, mobOffset);
663 swc->commit(swc);
664 return PIPE_OK;
665 }
666
667 enum pipe_error
SVGA3D_vgpu10_BeginQuery(struct svga_winsys_context * swc,SVGA3dQueryId queryId)668 SVGA3D_vgpu10_BeginQuery(struct svga_winsys_context *swc,
669 SVGA3dQueryId queryId)
670 {
671 SVGA3D_CREATE_COMMAND(BeginQuery, BEGIN_QUERY);
672 cmd->queryId = queryId;
673 swc->commit(swc);
674 return PIPE_OK;
675 }
676
677 enum pipe_error
SVGA3D_vgpu10_EndQuery(struct svga_winsys_context * swc,SVGA3dQueryId queryId)678 SVGA3D_vgpu10_EndQuery(struct svga_winsys_context *swc,
679 SVGA3dQueryId queryId)
680 {
681 SVGA3D_CREATE_COMMAND(EndQuery, END_QUERY);
682 cmd->queryId = queryId;
683 swc->commit(swc);
684 return PIPE_OK;
685 }
686
687
688 enum pipe_error
SVGA3D_vgpu10_ClearDepthStencilView(struct svga_winsys_context * swc,struct pipe_surface * ds_surf,uint16 flags,uint16 stencil,float depth)689 SVGA3D_vgpu10_ClearDepthStencilView(struct svga_winsys_context *swc,
690 struct pipe_surface *ds_surf,
691 uint16 flags,
692 uint16 stencil,
693 float depth)
694 {
695 SVGA3dCmdDXClearDepthStencilView *cmd;
696 struct svga_surface *ss = svga_surface(ds_surf);
697
698 cmd = SVGA3D_FIFOReserve(swc,
699 SVGA_3D_CMD_DX_CLEAR_DEPTHSTENCIL_VIEW,
700 sizeof(SVGA3dCmdDXClearDepthStencilView),
701 1); /* one relocation */
702 if (!cmd)
703 return PIPE_ERROR_OUT_OF_MEMORY;
704
705 /* NOTE: The following is pretty tricky. We need to emit a view/surface
706 * relocation and we have to provide a pointer to an ID which lies in
707 * the bounds of the command space which we just allocated. However,
708 * we then need to overwrite it with the original DepthStencilViewId.
709 */
710 view_relocation(swc, ds_surf, &cmd->depthStencilViewId,
711 SVGA_RELOC_WRITE);
712 cmd->depthStencilViewId = ss->view_id;
713 cmd->flags = flags;
714 cmd->stencil = stencil;
715 cmd->depth = depth;
716
717 swc->commit(swc);
718 return PIPE_OK;
719 }
720
721 enum pipe_error
SVGA3D_vgpu10_DefineShaderResourceView(struct svga_winsys_context * swc,SVGA3dShaderResourceViewId shaderResourceViewId,struct svga_winsys_surface * surface,SVGA3dSurfaceFormat format,SVGA3dResourceType resourceDimension,const SVGA3dShaderResourceViewDesc * desc)722 SVGA3D_vgpu10_DefineShaderResourceView(struct svga_winsys_context *swc,
723 SVGA3dShaderResourceViewId shaderResourceViewId,
724 struct svga_winsys_surface *surface,
725 SVGA3dSurfaceFormat format,
726 SVGA3dResourceType resourceDimension,
727 const SVGA3dShaderResourceViewDesc *desc)
728 {
729 SVGA3dCmdDXDefineShaderResourceView *cmd;
730
731 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_DEFINE_SHADERRESOURCE_VIEW,
732 sizeof(SVGA3dCmdDXDefineShaderResourceView),
733 1); /* one relocation */
734 if (!cmd)
735 return PIPE_ERROR_OUT_OF_MEMORY;
736
737 SVGA3D_COPY_BASIC_3(shaderResourceViewId, format, resourceDimension);
738
739 swc->surface_relocation(swc, &cmd->sid, NULL, surface,
740 SVGA_RELOC_READ);
741
742 cmd->desc = *desc;
743
744 swc->commit(swc);
745 return PIPE_OK;
746 }
747
748 enum pipe_error
SVGA3D_vgpu10_DestroyShaderResourceView(struct svga_winsys_context * swc,SVGA3dShaderResourceViewId shaderResourceViewId)749 SVGA3D_vgpu10_DestroyShaderResourceView(struct svga_winsys_context *swc,
750 SVGA3dShaderResourceViewId shaderResourceViewId)
751 {
752 SVGA3D_CREATE_COMMAND(DestroyShaderResourceView,
753 DESTROY_SHADERRESOURCE_VIEW);
754
755 cmd->shaderResourceViewId = shaderResourceViewId;
756
757 swc->commit(swc);
758 return PIPE_OK;
759 }
760
761
762 enum pipe_error
SVGA3D_vgpu10_DefineRenderTargetView(struct svga_winsys_context * swc,SVGA3dRenderTargetViewId renderTargetViewId,struct svga_winsys_surface * surface,SVGA3dSurfaceFormat format,SVGA3dResourceType resourceDimension,const SVGA3dRenderTargetViewDesc * desc)763 SVGA3D_vgpu10_DefineRenderTargetView(struct svga_winsys_context *swc,
764 SVGA3dRenderTargetViewId renderTargetViewId,
765 struct svga_winsys_surface *surface,
766 SVGA3dSurfaceFormat format,
767 SVGA3dResourceType resourceDimension,
768 const SVGA3dRenderTargetViewDesc *desc)
769 {
770 SVGA3dCmdDXDefineRenderTargetView *cmd;
771
772 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_DEFINE_RENDERTARGET_VIEW,
773 sizeof(SVGA3dCmdDXDefineRenderTargetView),
774 1); /* one relocation */
775 if (!cmd)
776 return PIPE_ERROR_OUT_OF_MEMORY;
777
778 SVGA3D_COPY_BASIC_3(renderTargetViewId, format, resourceDimension);
779 cmd->desc = *desc;
780
781 surface_to_resourceid(swc, surface,
782 &cmd->sid,
783 SVGA_RELOC_READ | SVGA_RELOC_WRITE);
784
785 swc->commit(swc);
786 return PIPE_OK;
787 }
788
789 enum pipe_error
SVGA3D_vgpu10_DestroyRenderTargetView(struct svga_winsys_context * swc,SVGA3dRenderTargetViewId renderTargetViewId)790 SVGA3D_vgpu10_DestroyRenderTargetView(struct svga_winsys_context *swc,
791 SVGA3dRenderTargetViewId renderTargetViewId)
792 {
793 SVGA3D_CREATE_COMMAND(DestroyRenderTargetView, DESTROY_RENDERTARGET_VIEW);
794
795 cmd->renderTargetViewId = renderTargetViewId;
796
797 swc->commit(swc);
798 return PIPE_OK;
799 }
800
801
802 enum pipe_error
SVGA3D_vgpu10_DefineDepthStencilView(struct svga_winsys_context * swc,SVGA3dDepthStencilViewId depthStencilViewId,struct svga_winsys_surface * surface,SVGA3dSurfaceFormat format,SVGA3dResourceType resourceDimension,const SVGA3dRenderTargetViewDesc * desc)803 SVGA3D_vgpu10_DefineDepthStencilView(struct svga_winsys_context *swc,
804 SVGA3dDepthStencilViewId depthStencilViewId,
805 struct svga_winsys_surface *surface,
806 SVGA3dSurfaceFormat format,
807 SVGA3dResourceType resourceDimension,
808 const SVGA3dRenderTargetViewDesc *desc)
809 {
810 SVGA3dCmdDXDefineDepthStencilView *cmd;
811
812 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW,
813 sizeof(SVGA3dCmdDXDefineDepthStencilView),
814 1); /* one relocation */
815 if (!cmd)
816 return PIPE_ERROR_OUT_OF_MEMORY;
817
818 SVGA3D_COPY_BASIC_3(depthStencilViewId, format, resourceDimension);
819 cmd->mipSlice = desc->tex.mipSlice;
820 cmd->firstArraySlice = desc->tex.firstArraySlice;
821 cmd->arraySize = desc->tex.arraySize;
822
823 surface_to_resourceid(swc, surface,
824 &cmd->sid,
825 SVGA_RELOC_READ | SVGA_RELOC_WRITE);
826
827 swc->commit(swc);
828 return PIPE_OK;
829 }
830
831 enum pipe_error
SVGA3D_vgpu10_DestroyDepthStencilView(struct svga_winsys_context * swc,SVGA3dDepthStencilViewId depthStencilViewId)832 SVGA3D_vgpu10_DestroyDepthStencilView(struct svga_winsys_context *swc,
833 SVGA3dDepthStencilViewId depthStencilViewId)
834 {
835 SVGA3D_CREATE_COMMAND(DestroyDepthStencilView, DESTROY_DEPTHSTENCIL_VIEW);
836
837 cmd->depthStencilViewId = depthStencilViewId;
838
839 swc->commit(swc);
840 return PIPE_OK;
841 }
842
843 enum pipe_error
SVGA3D_vgpu10_DefineElementLayout(struct svga_winsys_context * swc,unsigned count,SVGA3dElementLayoutId elementLayoutId,const SVGA3dInputElementDesc * elements)844 SVGA3D_vgpu10_DefineElementLayout(struct svga_winsys_context *swc,
845 unsigned count,
846 SVGA3dElementLayoutId elementLayoutId,
847 const SVGA3dInputElementDesc *elements)
848 {
849 SVGA3dCmdDXDefineElementLayout *cmd;
850 unsigned i;
851
852 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_DEFINE_ELEMENTLAYOUT,
853 sizeof(SVGA3dCmdDXDefineElementLayout) +
854 count * sizeof(SVGA3dInputElementDesc), 0);
855 if (!cmd)
856 return PIPE_ERROR_OUT_OF_MEMORY;
857
858 /* check that all offsets are multiples of four */
859 for (i = 0; i < count; i++) {
860 assert(elements[i].alignedByteOffset % 4 == 0);
861 }
862 (void) i; /* silence unused var in release build */
863
864 cmd->elementLayoutId = elementLayoutId;
865 memcpy(cmd + 1, elements, count * sizeof(SVGA3dInputElementDesc));
866
867 swc->commit(swc);
868 return PIPE_OK;
869 }
870
871 enum pipe_error
SVGA3D_vgpu10_DestroyElementLayout(struct svga_winsys_context * swc,SVGA3dElementLayoutId elementLayoutId)872 SVGA3D_vgpu10_DestroyElementLayout(struct svga_winsys_context *swc,
873 SVGA3dElementLayoutId elementLayoutId)
874 {
875 SVGA3D_CREATE_COMMAND(DestroyElementLayout, DESTROY_ELEMENTLAYOUT);
876
877 cmd->elementLayoutId = elementLayoutId;
878
879 swc->commit(swc);
880 return PIPE_OK;
881 }
882
883 enum pipe_error
SVGA3D_vgpu10_DefineBlendState(struct svga_winsys_context * swc,SVGA3dBlendStateId blendId,uint8 alphaToCoverageEnable,uint8 independentBlendEnable,const SVGA3dDXBlendStatePerRT * perRT)884 SVGA3D_vgpu10_DefineBlendState(struct svga_winsys_context *swc,
885 SVGA3dBlendStateId blendId,
886 uint8 alphaToCoverageEnable,
887 uint8 independentBlendEnable,
888 const SVGA3dDXBlendStatePerRT *perRT)
889 {
890 SVGA3D_CREATE_COMMAND(DefineBlendState, DEFINE_BLEND_STATE);
891
892 cmd->blendId = blendId;
893 cmd->alphaToCoverageEnable = alphaToCoverageEnable;
894 cmd->independentBlendEnable = independentBlendEnable;
895 memcpy(cmd->perRT, perRT, sizeof(cmd->perRT));
896 cmd->pad0 = 0;
897
898 swc->commit(swc);
899 return PIPE_OK;
900 }
901
902 enum pipe_error
SVGA3D_vgpu10_DestroyBlendState(struct svga_winsys_context * swc,SVGA3dBlendStateId blendId)903 SVGA3D_vgpu10_DestroyBlendState(struct svga_winsys_context *swc,
904 SVGA3dBlendStateId blendId)
905 {
906 SVGA3D_CREATE_COMMAND(DestroyBlendState, DESTROY_BLEND_STATE);
907
908 cmd->blendId = blendId;
909
910 swc->commit(swc);
911 return PIPE_OK;
912 }
913
914 enum pipe_error
SVGA3D_vgpu10_DefineDepthStencilState(struct svga_winsys_context * swc,SVGA3dDepthStencilStateId depthStencilId,uint8 depthEnable,SVGA3dDepthWriteMask depthWriteMask,SVGA3dComparisonFunc depthFunc,uint8 stencilEnable,uint8 frontEnable,uint8 backEnable,uint8 stencilReadMask,uint8 stencilWriteMask,uint8 frontStencilFailOp,uint8 frontStencilDepthFailOp,uint8 frontStencilPassOp,SVGA3dComparisonFunc frontStencilFunc,uint8 backStencilFailOp,uint8 backStencilDepthFailOp,uint8 backStencilPassOp,SVGA3dComparisonFunc backStencilFunc)915 SVGA3D_vgpu10_DefineDepthStencilState(struct svga_winsys_context *swc,
916 SVGA3dDepthStencilStateId depthStencilId,
917 uint8 depthEnable,
918 SVGA3dDepthWriteMask depthWriteMask,
919 SVGA3dComparisonFunc depthFunc,
920 uint8 stencilEnable,
921 uint8 frontEnable,
922 uint8 backEnable,
923 uint8 stencilReadMask,
924 uint8 stencilWriteMask,
925 uint8 frontStencilFailOp,
926 uint8 frontStencilDepthFailOp,
927 uint8 frontStencilPassOp,
928 SVGA3dComparisonFunc frontStencilFunc,
929 uint8 backStencilFailOp,
930 uint8 backStencilDepthFailOp,
931 uint8 backStencilPassOp,
932 SVGA3dComparisonFunc backStencilFunc)
933 {
934 SVGA3D_CREATE_COMMAND(DefineDepthStencilState, DEFINE_DEPTHSTENCIL_STATE);
935
936 SVGA3D_COPY_BASIC_9(depthStencilId, depthEnable,
937 depthWriteMask, depthFunc,
938 stencilEnable, frontEnable,
939 backEnable, stencilReadMask,
940 stencilWriteMask);
941 SVGA3D_COPY_BASIC_8(frontStencilFailOp, frontStencilDepthFailOp,
942 frontStencilPassOp, frontStencilFunc,
943 backStencilFailOp, backStencilDepthFailOp,
944 backStencilPassOp, backStencilFunc);
945
946 swc->commit(swc);
947 return PIPE_OK;
948 }
949
950 enum pipe_error
SVGA3D_vgpu10_DestroyDepthStencilState(struct svga_winsys_context * swc,SVGA3dDepthStencilStateId depthStencilId)951 SVGA3D_vgpu10_DestroyDepthStencilState(struct svga_winsys_context *swc,
952 SVGA3dDepthStencilStateId depthStencilId)
953 {
954 SVGA3D_CREATE_COMMAND(DestroyDepthStencilState,
955 DESTROY_DEPTHSTENCIL_STATE);
956
957 cmd->depthStencilId = depthStencilId;
958
959 swc->commit(swc);
960 return PIPE_OK;
961 }
962
963 enum pipe_error
SVGA3D_vgpu10_DefineRasterizerState(struct svga_winsys_context * swc,SVGA3dRasterizerStateId rasterizerId,uint8 fillMode,SVGA3dCullMode cullMode,uint8 frontCounterClockwise,int32 depthBias,float depthBiasClamp,float slopeScaledDepthBias,uint8 depthClipEnable,uint8 scissorEnable,uint8 multisampleEnable,uint8 antialiasedLineEnable,float lineWidth,uint8 lineStippleEnable,uint8 lineStippleFactor,uint16 lineStipplePattern,uint8 provokingVertexLast)964 SVGA3D_vgpu10_DefineRasterizerState(struct svga_winsys_context *swc,
965 SVGA3dRasterizerStateId rasterizerId,
966 uint8 fillMode,
967 SVGA3dCullMode cullMode,
968 uint8 frontCounterClockwise,
969 int32 depthBias,
970 float depthBiasClamp,
971 float slopeScaledDepthBias,
972 uint8 depthClipEnable,
973 uint8 scissorEnable,
974 uint8 multisampleEnable,
975 uint8 antialiasedLineEnable,
976 float lineWidth,
977 uint8 lineStippleEnable,
978 uint8 lineStippleFactor,
979 uint16 lineStipplePattern,
980 uint8 provokingVertexLast)
981 {
982 SVGA3D_CREATE_COMMAND(DefineRasterizerState, DEFINE_RASTERIZER_STATE);
983
984 SVGA3D_COPY_BASIC_5(rasterizerId, fillMode,
985 cullMode, frontCounterClockwise,
986 depthBias);
987 SVGA3D_COPY_BASIC_6(depthBiasClamp, slopeScaledDepthBias,
988 depthClipEnable, scissorEnable,
989 multisampleEnable, antialiasedLineEnable);
990 cmd->lineWidth = lineWidth;
991 cmd->lineStippleEnable = lineStippleEnable;
992 cmd->lineStippleFactor = lineStippleFactor;
993 cmd->lineStipplePattern = lineStipplePattern;
994 cmd->provokingVertexLast = provokingVertexLast;
995
996 swc->commit(swc);
997 return PIPE_OK;
998 }
999
1000 enum pipe_error
SVGA3D_vgpu10_DestroyRasterizerState(struct svga_winsys_context * swc,SVGA3dRasterizerStateId rasterizerId)1001 SVGA3D_vgpu10_DestroyRasterizerState(struct svga_winsys_context *swc,
1002 SVGA3dRasterizerStateId rasterizerId)
1003 {
1004 SVGA3D_CREATE_COMMAND(DestroyRasterizerState, DESTROY_RASTERIZER_STATE);
1005
1006 cmd->rasterizerId = rasterizerId;
1007
1008 swc->commit(swc);
1009 return PIPE_OK;
1010 }
1011
1012 enum pipe_error
SVGA3D_vgpu10_DefineSamplerState(struct svga_winsys_context * swc,SVGA3dSamplerId samplerId,SVGA3dFilter filter,uint8 addressU,uint8 addressV,uint8 addressW,float mipLODBias,uint8 maxAnisotropy,uint8 comparisonFunc,SVGA3dRGBAFloat borderColor,float minLOD,float maxLOD)1013 SVGA3D_vgpu10_DefineSamplerState(struct svga_winsys_context *swc,
1014 SVGA3dSamplerId samplerId,
1015 SVGA3dFilter filter,
1016 uint8 addressU,
1017 uint8 addressV,
1018 uint8 addressW,
1019 float mipLODBias,
1020 uint8 maxAnisotropy,
1021 uint8 comparisonFunc,
1022 SVGA3dRGBAFloat borderColor,
1023 float minLOD,
1024 float maxLOD)
1025 {
1026 SVGA3D_CREATE_COMMAND(DefineSamplerState, DEFINE_SAMPLER_STATE);
1027
1028 SVGA3D_COPY_BASIC_6(samplerId, filter,
1029 addressU, addressV,
1030 addressW, mipLODBias);
1031 SVGA3D_COPY_BASIC_5(maxAnisotropy, comparisonFunc,
1032 borderColor, minLOD,
1033 maxLOD);
1034
1035 swc->commit(swc);
1036 return PIPE_OK;
1037 }
1038
1039 enum pipe_error
SVGA3D_vgpu10_DestroySamplerState(struct svga_winsys_context * swc,SVGA3dSamplerId samplerId)1040 SVGA3D_vgpu10_DestroySamplerState(struct svga_winsys_context *swc,
1041 SVGA3dSamplerId samplerId)
1042 {
1043 SVGA3D_CREATE_COMMAND(DestroySamplerState, DESTROY_SAMPLER_STATE);
1044
1045 cmd->samplerId = samplerId;
1046
1047 swc->commit(swc);
1048 return PIPE_OK;
1049 }
1050
1051
1052 enum pipe_error
SVGA3D_vgpu10_DefineAndBindShader(struct svga_winsys_context * swc,struct svga_winsys_gb_shader * gbshader,SVGA3dShaderId shaderId,SVGA3dShaderType type,uint32 sizeInBytes)1053 SVGA3D_vgpu10_DefineAndBindShader(struct svga_winsys_context *swc,
1054 struct svga_winsys_gb_shader *gbshader,
1055 SVGA3dShaderId shaderId,
1056 SVGA3dShaderType type,
1057 uint32 sizeInBytes)
1058 {
1059 SVGA3dCmdHeader *header;
1060 SVGA3dCmdDXDefineShader *dcmd;
1061 SVGA3dCmdDXBindShader *bcmd;
1062 unsigned totalSize = 2 * sizeof(*header) +
1063 sizeof(*dcmd) + sizeof(*bcmd);
1064
1065 /* Make sure there is room for both commands */
1066 header = swc->reserve(swc, totalSize, 2);
1067 if (!header)
1068 return PIPE_ERROR_OUT_OF_MEMORY;
1069
1070 /* DXDefineShader command */
1071 header->id = SVGA_3D_CMD_DX_DEFINE_SHADER;
1072 header->size = sizeof(*dcmd);
1073 dcmd = (SVGA3dCmdDXDefineShader *)(header + 1);
1074 dcmd->shaderId = shaderId;
1075 dcmd->type = type;
1076 dcmd->sizeInBytes = sizeInBytes;
1077
1078 /* DXBindShader command */
1079 header = (SVGA3dCmdHeader *)(dcmd + 1);
1080
1081 header->id = SVGA_3D_CMD_DX_BIND_SHADER;
1082 header->size = sizeof(*bcmd);
1083 bcmd = (SVGA3dCmdDXBindShader *)(header + 1);
1084
1085 bcmd->cid = swc->cid;
1086 swc->shader_relocation(swc, NULL, &bcmd->mobid,
1087 &bcmd->offsetInBytes, gbshader, 0);
1088
1089 bcmd->shid = shaderId;
1090
1091 swc->commit(swc);
1092 return PIPE_OK;
1093 }
1094
1095 enum pipe_error
SVGA3D_vgpu10_DestroyShader(struct svga_winsys_context * swc,SVGA3dShaderId shaderId)1096 SVGA3D_vgpu10_DestroyShader(struct svga_winsys_context *swc,
1097 SVGA3dShaderId shaderId)
1098 {
1099 SVGA3D_CREATE_COMMAND(DestroyShader, DESTROY_SHADER);
1100
1101 cmd->shaderId = shaderId;
1102
1103 swc->commit(swc);
1104 return PIPE_OK;
1105 }
1106
1107 enum pipe_error
SVGA3D_vgpu10_DefineStreamOutput(struct svga_winsys_context * swc,SVGA3dStreamOutputId soid,uint32 numOutputStreamEntries,uint32 streamOutputStrideInBytes[SVGA3D_DX_MAX_SOTARGETS],const SVGA3dStreamOutputDeclarationEntry decl[SVGA3D_MAX_STREAMOUT_DECLS])1108 SVGA3D_vgpu10_DefineStreamOutput(struct svga_winsys_context *swc,
1109 SVGA3dStreamOutputId soid,
1110 uint32 numOutputStreamEntries,
1111 uint32 streamOutputStrideInBytes[SVGA3D_DX_MAX_SOTARGETS],
1112 const SVGA3dStreamOutputDeclarationEntry decl[SVGA3D_MAX_STREAMOUT_DECLS])
1113 {
1114 unsigned i;
1115 SVGA3D_CREATE_COMMAND(DefineStreamOutput, DEFINE_STREAMOUTPUT);
1116
1117 cmd->soid = soid;
1118 cmd->numOutputStreamEntries = numOutputStreamEntries;
1119
1120 for (i = 0; i < ARRAY_SIZE(cmd->streamOutputStrideInBytes); i++)
1121 cmd->streamOutputStrideInBytes[i] = streamOutputStrideInBytes[i];
1122
1123 memcpy(cmd->decl, decl,
1124 sizeof(SVGA3dStreamOutputDeclarationEntry)
1125 * SVGA3D_MAX_STREAMOUT_DECLS);
1126
1127 swc->commit(swc);
1128 return PIPE_OK;
1129 }
1130
1131 enum pipe_error
SVGA3D_vgpu10_DestroyStreamOutput(struct svga_winsys_context * swc,SVGA3dStreamOutputId soid)1132 SVGA3D_vgpu10_DestroyStreamOutput(struct svga_winsys_context *swc,
1133 SVGA3dStreamOutputId soid)
1134 {
1135 SVGA3D_CREATE_COMMAND(DestroyStreamOutput, DESTROY_STREAMOUTPUT);
1136
1137 cmd->soid = soid;
1138
1139 swc->commit(swc);
1140 return PIPE_OK;
1141 }
1142
1143 enum pipe_error
SVGA3D_vgpu10_SetInputLayout(struct svga_winsys_context * swc,SVGA3dElementLayoutId elementLayoutId)1144 SVGA3D_vgpu10_SetInputLayout(struct svga_winsys_context *swc,
1145 SVGA3dElementLayoutId elementLayoutId)
1146 {
1147 SVGA3D_CREATE_COMMAND(SetInputLayout, SET_INPUT_LAYOUT);
1148
1149 cmd->elementLayoutId = elementLayoutId;
1150
1151 swc->commit(swc);
1152 return PIPE_OK;
1153 }
1154
1155 enum pipe_error
SVGA3D_vgpu10_SetVertexBuffers(struct svga_winsys_context * swc,unsigned count,uint32 startBuffer,const SVGA3dVertexBuffer * bufferInfo,struct svga_winsys_surface ** surfaces)1156 SVGA3D_vgpu10_SetVertexBuffers(struct svga_winsys_context *swc,
1157 unsigned count,
1158 uint32 startBuffer,
1159 const SVGA3dVertexBuffer *bufferInfo,
1160 struct svga_winsys_surface **surfaces)
1161 {
1162 SVGA3dCmdDXSetVertexBuffers *cmd;
1163 SVGA3dVertexBuffer *bufs;
1164 unsigned i;
1165
1166 assert(count > 0);
1167
1168 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS,
1169 sizeof(SVGA3dCmdDXSetVertexBuffers) +
1170 count * sizeof(SVGA3dVertexBuffer),
1171 count); /* 'count' relocations */
1172 if (!cmd)
1173 return PIPE_ERROR_OUT_OF_MEMORY;
1174
1175 cmd->startBuffer = startBuffer;
1176
1177 bufs = (SVGA3dVertexBuffer *) &cmd[1];
1178 for (i = 0; i < count; i++) {
1179 bufs[i].stride = bufferInfo[i].stride;
1180 bufs[i].offset = bufferInfo[i].offset;
1181 assert(bufs[i].stride % 4 == 0);
1182 assert(bufs[i].offset % 4 == 0);
1183 swc->surface_relocation(swc, &bufs[i].sid, NULL, surfaces[i],
1184 SVGA_RELOC_READ);
1185 }
1186
1187 swc->commit(swc);
1188 return PIPE_OK;
1189 }
1190
1191 enum pipe_error
SVGA3D_vgpu10_SetTopology(struct svga_winsys_context * swc,SVGA3dPrimitiveType topology)1192 SVGA3D_vgpu10_SetTopology(struct svga_winsys_context *swc,
1193 SVGA3dPrimitiveType topology)
1194 {
1195 SVGA3D_CREATE_COMMAND(SetTopology, SET_TOPOLOGY);
1196
1197 cmd->topology = topology;
1198
1199 swc->commit(swc);
1200 return PIPE_OK;
1201 }
1202
1203 enum pipe_error
SVGA3D_vgpu10_SetIndexBuffer(struct svga_winsys_context * swc,struct svga_winsys_surface * indexes,SVGA3dSurfaceFormat format,uint32 offset)1204 SVGA3D_vgpu10_SetIndexBuffer(struct svga_winsys_context *swc,
1205 struct svga_winsys_surface *indexes,
1206 SVGA3dSurfaceFormat format,
1207 uint32 offset)
1208 {
1209 SVGA3dCmdDXSetIndexBuffer *cmd;
1210
1211 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_INDEX_BUFFER,
1212 sizeof(SVGA3dCmdDXSetIndexBuffer),
1213 1); /* one relocations */
1214 if (!cmd)
1215 return PIPE_ERROR_OUT_OF_MEMORY;
1216
1217 swc->surface_relocation(swc, &cmd->sid, NULL, indexes, SVGA_RELOC_READ);
1218 SVGA3D_COPY_BASIC_2(format, offset);
1219
1220 swc->commit(swc);
1221 return PIPE_OK;
1222 }
1223
1224 enum pipe_error
SVGA3D_vgpu10_SetSingleConstantBuffer(struct svga_winsys_context * swc,unsigned slot,SVGA3dShaderType type,struct svga_winsys_surface * surface,uint32 offsetInBytes,uint32 sizeInBytes)1225 SVGA3D_vgpu10_SetSingleConstantBuffer(struct svga_winsys_context *swc,
1226 unsigned slot,
1227 SVGA3dShaderType type,
1228 struct svga_winsys_surface *surface,
1229 uint32 offsetInBytes,
1230 uint32 sizeInBytes)
1231 {
1232 SVGA3dCmdDXSetSingleConstantBuffer *cmd;
1233
1234 assert(offsetInBytes % 256 == 0);
1235 if (!surface)
1236 assert(sizeInBytes == 0);
1237 else
1238 assert(sizeInBytes > 0);
1239
1240 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER,
1241 sizeof(SVGA3dCmdDXSetSingleConstantBuffer),
1242 1); /* one relocation */
1243 if (!cmd)
1244 return PIPE_ERROR_OUT_OF_MEMORY;
1245
1246 cmd->slot = slot;
1247 cmd->type = type;
1248 swc->surface_relocation(swc, &cmd->sid, NULL, surface, SVGA_RELOC_READ);
1249 cmd->offsetInBytes = offsetInBytes;
1250 cmd->sizeInBytes = sizeInBytes;
1251
1252 swc->commit(swc);
1253
1254 return PIPE_OK;
1255 }
1256
1257
1258 enum pipe_error
SVGA3D_vgpu10_ReadbackSubResource(struct svga_winsys_context * swc,struct svga_winsys_surface * surface,unsigned subResource)1259 SVGA3D_vgpu10_ReadbackSubResource(struct svga_winsys_context *swc,
1260 struct svga_winsys_surface *surface,
1261 unsigned subResource)
1262 {
1263 SVGA3dCmdDXReadbackSubResource *cmd;
1264
1265 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_READBACK_SUBRESOURCE,
1266 sizeof(SVGA3dCmdDXReadbackSubResource),
1267 1);
1268 if (!cmd)
1269 return PIPE_ERROR_OUT_OF_MEMORY;
1270
1271 swc->surface_relocation(swc, &cmd->sid, NULL, surface,
1272 SVGA_RELOC_READ | SVGA_RELOC_INTERNAL);
1273 cmd->subResource = subResource;
1274
1275 swc->commit(swc);
1276 return PIPE_OK;
1277 }
1278
1279 enum pipe_error
SVGA3D_vgpu10_UpdateSubResource(struct svga_winsys_context * swc,struct svga_winsys_surface * surface,const SVGA3dBox * box,unsigned subResource)1280 SVGA3D_vgpu10_UpdateSubResource(struct svga_winsys_context *swc,
1281 struct svga_winsys_surface *surface,
1282 const SVGA3dBox *box,
1283 unsigned subResource)
1284 {
1285 SVGA3dCmdDXUpdateSubResource *cmd;
1286
1287 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_UPDATE_SUBRESOURCE,
1288 sizeof(SVGA3dCmdDXUpdateSubResource),
1289 1);
1290 if (!cmd)
1291 return PIPE_ERROR_OUT_OF_MEMORY;
1292
1293 swc->surface_relocation(swc, &cmd->sid, NULL, surface,
1294 SVGA_RELOC_WRITE | SVGA_RELOC_INTERNAL);
1295 cmd->subResource = subResource;
1296 cmd->box = *box;
1297
1298 swc->commit(swc);
1299 return PIPE_OK;
1300 }
1301
1302 enum pipe_error
SVGA3D_vgpu10_GenMips(struct svga_winsys_context * swc,SVGA3dShaderResourceViewId shaderResourceViewId,struct svga_winsys_surface * view)1303 SVGA3D_vgpu10_GenMips(struct svga_winsys_context *swc,
1304 SVGA3dShaderResourceViewId shaderResourceViewId,
1305 struct svga_winsys_surface *view)
1306 {
1307 SVGA3dCmdDXGenMips *cmd;
1308
1309 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_GENMIPS,
1310 sizeof(SVGA3dCmdDXGenMips), 1);
1311
1312 if (!cmd)
1313 return PIPE_ERROR_OUT_OF_MEMORY;
1314
1315 swc->surface_relocation(swc, &cmd->shaderResourceViewId, NULL, view,
1316 SVGA_RELOC_WRITE);
1317 cmd->shaderResourceViewId = shaderResourceViewId;
1318
1319 swc->commit(swc);
1320 return PIPE_OK;
1321 }
1322
1323
1324 enum pipe_error
SVGA3D_vgpu10_BufferCopy(struct svga_winsys_context * swc,struct svga_winsys_surface * src,struct svga_winsys_surface * dst,unsigned srcx,unsigned dstx,unsigned width)1325 SVGA3D_vgpu10_BufferCopy(struct svga_winsys_context *swc,
1326 struct svga_winsys_surface *src,
1327 struct svga_winsys_surface *dst,
1328 unsigned srcx, unsigned dstx, unsigned width)
1329 {
1330 SVGA3dCmdDXBufferCopy *cmd;
1331
1332 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_BUFFER_COPY, sizeof *cmd, 2);
1333
1334 if (!cmd)
1335 return PIPE_ERROR_OUT_OF_MEMORY;
1336
1337 swc->surface_relocation(swc, &cmd->dest, NULL, dst, SVGA_RELOC_WRITE);
1338 swc->surface_relocation(swc, &cmd->src, NULL, src, SVGA_RELOC_READ);
1339 cmd->destX = dstx;
1340 cmd->srcX = srcx;
1341 cmd->width = width;
1342
1343 swc->commit(swc);
1344 return PIPE_OK;
1345 }
1346
1347 enum pipe_error
SVGA3D_vgpu10_TransferFromBuffer(struct svga_winsys_context * swc,struct svga_winsys_surface * src,unsigned srcOffset,unsigned srcPitch,unsigned srcSlicePitch,struct svga_winsys_surface * dst,unsigned dstSubResource,SVGA3dBox * dstBox)1348 SVGA3D_vgpu10_TransferFromBuffer(struct svga_winsys_context *swc,
1349 struct svga_winsys_surface *src,
1350 unsigned srcOffset, unsigned srcPitch,
1351 unsigned srcSlicePitch,
1352 struct svga_winsys_surface *dst,
1353 unsigned dstSubResource,
1354 SVGA3dBox *dstBox)
1355 {
1356 SVGA3dCmdDXTransferFromBuffer *cmd;
1357
1358 cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER,
1359 sizeof(SVGA3dCmdDXTransferFromBuffer), 2);
1360
1361 if (!cmd)
1362 return PIPE_ERROR_OUT_OF_MEMORY;
1363
1364 swc->surface_relocation(swc, &cmd->srcSid, NULL, src, SVGA_RELOC_READ);
1365 swc->surface_relocation(swc, &cmd->destSid, NULL, dst, SVGA_RELOC_WRITE);
1366 cmd->srcOffset = srcOffset;
1367 cmd->srcPitch = srcPitch;
1368 cmd->srcSlicePitch = srcSlicePitch;
1369 cmd->destSubResource = dstSubResource;
1370 cmd->destBox = *dstBox;
1371
1372 swc->commit(swc);
1373 return PIPE_OK;
1374 }
1375