| /external/capstone/arch/ARM/ |
| D | ARMAddressingModes.h | 115 static inline unsigned getSORegOpc(ARM_AM_ShiftOpc ShOp, unsigned Imm) in getSORegOpc()
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| D | ARMDisassembler.c | 1623 ARM_AM_ShiftOpc ShOp; in DecodeSORegMemOperand() local
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
| D | ARMAddressingModes.h | 111 static inline unsigned getSORegOpc(ShiftOpc ShOp, unsigned Imm) { in getSORegOpc()
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| D | ARMMCCodeEmitter.cpp | 900 ARM_AM::ShiftOpc ShOp = ARM_AM::getAM2ShiftOpc(MO2.getImm()); in getLdStSORegOpValue() local
947 ARM_AM::ShiftOpc ShOp = ARM_AM::getAM2ShiftOpc(Imm); in getAddrMode2OffsetOpValue() local
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMAddressingModes.h | 112 static inline unsigned getSORegOpc(ShiftOpc ShOp, unsigned Imm) { in getSORegOpc()
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| D | ARMMCCodeEmitter.cpp | 1076 ARM_AM::ShiftOpc ShOp = ARM_AM::getAM2ShiftOpc(MO2.getImm()); in getLdStSORegOpValue() local
1114 ARM_AM::ShiftOpc ShOp = ARM_AM::getAM2ShiftOpc(Imm); in getAddrMode2OffsetOpValue() local
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| /external/swiftshader/third_party/LLVM/lib/Transforms/InstCombine/ |
| D | InstCombineMulDivRem.cpp | 117 if (Constant *ShOp = dyn_cast<Constant>(SI->getOperand(1))) in visitMul() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMAddressingModes.h | 110 inline unsigned getSORegOpc(ShiftOpc ShOp, unsigned Imm) { in getSORegOpc()
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| D | ARMMCCodeEmitter.cpp | 1087 ARM_AM::ShiftOpc ShOp = ARM_AM::getAM2ShiftOpc(MO2.getImm()); in getLdStSORegOpValue() local
1125 ARM_AM::ShiftOpc ShOp = ARM_AM::getAM2ShiftOpc(Imm); in getAddrMode2OffsetOpValue() local
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorTypes.cpp | 1539 SDValue ShOp = N->getOperand(1); in WidenVecRes_POWI() local
1546 SDValue ShOp = N->getOperand(1); in WidenVecRes_Shift() local
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| /external/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 1761 CreateShiftExtend(AArch64_AM::ShiftExtendType ShOp, unsigned Val, in CreateShiftExtend()
2382 AArch64_AM::ShiftExtendType ShOp = in tryParseOptionalShiftExtend() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorTypes.cpp | 2707 SDValue ShOp = N->getOperand(1); in WidenVecRes_POWI() local
2714 SDValue ShOp = N->getOperand(1); in WidenVecRes_Shift() local
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| D | DAGCombiner.cpp | 3772 SDValue ShOp = N0->getOperand(1); in SimplifyBinOpWithSameOpcodeHands() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 1954 CreateShiftExtend(AArch64_AM::ShiftExtendType ShOp, unsigned Val, in CreateShiftExtend()
2659 AArch64_AM::ShiftExtendType ShOp = in tryParseOptionalShiftExtend() local
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorTypes.cpp | 2490 SDValue ShOp = N->getOperand(1); in WidenVecRes_POWI() local
2497 SDValue ShOp = N->getOperand(1); in WidenVecRes_Shift() local
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| D | DAGCombiner.cpp | 2806 SDValue ShOp = N0->getOperand(1); in SimplifyBinOpWithSameOpcodeHands() local
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 1449 ARM_AM::ShiftOpc ShOp = ARM_AM::lsl; in DecodeSORegMemOperand() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 1585 ARM_AM::ShiftOpc ShOp = ARM_AM::lsl; in DecodeSORegMemOperand() local
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| /external/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 1586 ARM_AM::ShiftOpc ShOp = ARM_AM::lsl; in DecodeSORegMemOperand() local
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