| /external/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineSimplifyDemanded.cpp | 558 Instruction *Shr = cast<Instruction>(I->getOperand(0)); in SimplifyDemandedUseBits() local
831 Value *InstCombiner::SimplifyShrShlDemandedBits(Instruction *Shr, in SimplifyShrShlDemandedBits()
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| D | InstCombineCompares.cpp | 1342 Instruction *InstCombiner::FoldICmpShrCst(ICmpInst &ICI, BinaryOperator *Shr, in FoldICmpShrCst()
|
| /external/clang/test/FixIt/ |
| D | fixit.cpp | 276 struct Shr { struct
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineSimplifyDemanded.cpp | 450 if (Instruction *Shr = dyn_cast<Instruction>(I->getOperand(0))) in SimplifyDemandedUseBits() local
860 InstCombiner::simplifyShrShlDemandedBits(Instruction *Shr, const APInt &ShrOp1, in simplifyShrShlDemandedBits()
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| D | InstCombineCompares.cpp | 1986 BinaryOperator *Shr, in foldICmpShrConstant()
|
| /external/swiftshader/third_party/LLVM/include/llvm/MC/ |
| D | MCExpr.h | 304 Shr, ///< Shift right (arithmetic or logical, depending on target) enumerator
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Utils/ |
| D | SimplifyIndVar.cpp | 798 BinaryOperator *Shr = cast<BinaryOperator>(U); in strengthenRightShift() local
|
| /external/swiftshader/third_party/LLVM/lib/Transforms/InstCombine/ |
| D | InstCombineCompares.cpp | 902 Instruction *InstCombiner::FoldICmpShrCst(ICmpInst &ICI, BinaryOperator *Shr, in FoldICmpShrCst()
|
| /external/swiftshader/third_party/subzero/src/ |
| D | IceInstX86Base.h | 176 Shr, enumerator
3264 using Shr = typename InstImpl<TraitsType>::InstX86Shr; member
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 2552 SDValue Shr = DAG.getNode(ISD::SRL, dl, MVT::i64, Op0, ShiftConst); in ExpandLegalINT_TO_FP() local
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| D | DAGCombiner.cpp | 7586 SDValue Shr = DAG.getNode(ISD::SRA, N0.getDebugLoc(), VT, Shl, ShrAmt); in SimplifySelectCC() local
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 1674 SDValue Shr = DAG.getNode(ISD::SRA, SL, MVT::i64, FractMask, Exp); in LowerFTRUNC() local
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 2368 SDValue Shr = DAG.getNode(ISD::SRL, dl, MVT::i64, Op0, ShiftConst); in ExpandLegalINT_TO_FP() local
|
| D | DAGCombiner.cpp | 14320 SDValue Shr = DAG.getNode(ISD::SRA, SDLoc(N0), VT, Shl, ShrAmt); in SimplifySelectCC() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 2402 SDValue Shr = DAG.getNode(ISD::SRL, dl, MVT::i64, Op0, ShiftConst); in ExpandLegalINT_TO_FP() local
|
| D | DAGCombiner.cpp | 17923 SDValue Shr = DAG.getNode(ISD::SRA, SDLoc(N0), VT, Shl, ShrAmt); in SimplifySelectCC() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 2024 SDValue Shr = DAG.getNode(ISD::SRA, SL, MVT::i64, FractMask, Exp); in LowerFTRUNC() local
|