Home
last modified time | relevance | path

Searched defs:Src0 (Results 1 – 25 of 64) sorted by relevance

123

/external/swiftshader/third_party/subzero/src/
DIceTargetLoweringX86Base.h516 void _adc(Variable *Dest, Operand *Src0) { in _adc()
524 void _add(Variable *Dest, Operand *Src0) { in _add()
532 void _addps(Variable *Dest, Operand *Src0) { in _addps()
536 void _addss(Variable *Dest, Operand *Src0) { in _addss()
543 void _and(Variable *Dest, Operand *Src0) { in _and()
547 void _andnps(Variable *Dest, Operand *Src0) { in _andnps()
551 void _andps(Variable *Dest, Operand *Src0) { in _andps()
559 void _blendvps(Variable *Dest, Operand *Src0, Operand *Src1) { in _blendvps()
577 void _bsf(Variable *Dest, Operand *Src0) { in _bsf()
581 void _bsr(Variable *Dest, Operand *Src0) { in _bsr()
[all …]
DIceTargetLoweringMIPS32.h166 void _add(Variable *Dest, Variable *Src0, Variable *Src1) { in _add()
170 void _addu(Variable *Dest, Variable *Src0, Variable *Src1) { in _addu()
174 void _and(Variable *Dest, Variable *Src0, Variable *Src1) { in _and()
188 void _br(CfgNode *TargetTrue, CfgNode *TargetFalse, Operand *Src0, in _br()
194 void _br(CfgNode *TargetTrue, CfgNode *TargetFalse, Operand *Src0, in _br()
199 void _br(CfgNode *TargetTrue, CfgNode *TargetFalse, Operand *Src0, in _br()
222 void _add_d(Variable *Dest, Variable *Src0, Variable *Src1) { in _add_d()
226 void _add_s(Variable *Dest, Variable *Src0, Variable *Src1) { in _add_s()
234 void _addiu(Variable *Dest, Variable *Src0, Operand *Src1, RelocOp Reloc) { in _addiu()
238 void _c_eq_d(Variable *Src0, Variable *Src1) { in _c_eq_d()
[all …]
DIceTargetLoweringARM32.h855 void _vadd(Variable *Dest, Variable *Src0, Variable *Src1) { in _vadd()
858 void _vand(Variable *Dest, Variable *Src0, Variable *Src1) { in _vand()
861 InstARM32Vbsl *_vbsl(Variable *Dest, Variable *Src0, Variable *Src1) { in _vbsl()
864 void _vceq(Variable *Dest, Variable *Src0, Variable *Src1) { in _vceq()
867 InstARM32Vcge *_vcge(Variable *Dest, Variable *Src0, Variable *Src1) { in _vcge()
870 InstARM32Vcgt *_vcgt(Variable *Dest, Variable *Src0, Variable *Src1) { in _vcgt()
877 void _vdiv(Variable *Dest, Variable *Src0, Variable *Src1) { in _vdiv()
891 void _veor(Variable *Dest, Variable *Src0, Variable *Src1) { in _veor()
905 void _vmla(Variable *Dest, Variable *Src0, Variable *Src1) { in _vmla()
908 void _vmlap(Variable *Dest, Variable *Src0, Variable *Src1) { in _vmlap()
[all …]
DIceInstMIPS32.h409 Variable *Src0) { in create()
436 InstMIPS32TwoAddrFPR(Cfg *Func, Variable *Dest, Variable *Src0) in InstMIPS32TwoAddrFPR()
453 Variable *Src0) { in create()
480 InstMIPS32TwoAddrGPR(Cfg *Func, Variable *Dest, Variable *Src0) in InstMIPS32TwoAddrGPR()
500 Variable *Src0, Variable *Src1) { in create()
527 InstMIPS32ThreeAddrFPR(Cfg *Func, Variable *Dest, Variable *Src0, in InstMIPS32ThreeAddrFPR()
549 Variable *Src0, Variable *Src1) { in create()
576 InstMIPS32ThreeAddrGPR(Cfg *Func, Variable *Dest, Variable *Src0, in InstMIPS32ThreeAddrGPR()
820 CfgNode *TargetFalse, Operand *Src0, in create()
828 CfgNode *TargetFalse, Operand *Src0, in create()
[all …]
DIceInstARM32.h771 InstARM32ThreeAddrGPR(Cfg *Func, Variable *Dest, Variable *Src0, in InstARM32ThreeAddrGPR()
796 static InstARM32ThreeAddrFP *create(Cfg *Func, Variable *Dest, Variable *Src0, in create()
822 InstARM32ThreeAddrFP(Cfg *Func, Variable *Dest, Variable *Src0, Operand *Src1) in InstARM32ThreeAddrFP()
847 Variable *Src0, Variable *Src1) { in create()
853 create(Cfg *Func, Variable *Dest, Variable *Src0, ConstantInteger32 *Src1) { in create()
862 InstARM32ThreeAddrSignAwareFP(Cfg *Func, Variable *Dest, Variable *Src0, in InstARM32ThreeAddrSignAwareFP()
876 static InstARM32FourAddrGPR *create(Cfg *Func, Variable *Dest, Variable *Src0, in create()
901 InstARM32FourAddrGPR(Cfg *Func, Variable *Dest, Variable *Src0, in InstARM32FourAddrGPR()
926 static InstARM32FourAddrFP *create(Cfg *Func, Variable *Dest, Variable *Src0, in create()
951 InstARM32FourAddrFP(Cfg *Func, Variable *Dest, Variable *Src0, Variable *Src1) in InstARM32FourAddrFP()
[all …]
DIceTargetLowering.h567 auto *Src0 = thunk0(); in applyToThunkedArgs() local
576 auto *Src0 = thunk0(); in applyToThunkedArgs() local
586 auto *Src0 = thunk0(); in applyToThunkedArgs() local
DIceTargetLoweringARM32.cpp541 Operand *Src0 = Instr->getSrc(0); in genTargetHelperCallFor() local
602 Operand *Src0 = Instr->getSrc(0); in genTargetHelperCallFor() local
732 Operand *Src0 = IntrinsicCall->getArg(0); in genTargetHelperCallFor() local
2358 Variable *Src0 = Func->makeVariable(IceType_i1); in lowerInt1Arithmetic() local
2448 Operand *const Src0; member in Ice::ARM32::__anon5f1ef08b0b11::NumericOperandsBase
2588 Variable *Dest, Operand *Src0, in lowerInt64Arithmetic()
3089 Operand *Src0 = legalizeUndef(Instr->getSrc(0)); in lowerArithmetic() local
3529 Operand *Src0 = Instr->getSrc(0); in lowerAssign() local
3898 Operand *Src0 = legalizeUndef(Instr->getSrc(0)); in lowerCast() local
4147 Operand *Src0 = Instr->getSrc(0); in lowerCast() local
[all …]
DIceTargetLoweringMIPS32.cpp306 Operand *Src0 = Instr->getSrc(0); in genTargetHelperCallFor() local
333 Operand *Src0 = Instr->getSrc(0); in genTargetHelperCallFor() local
421 Operand *Src0 = Instr->getSrc(0); in genTargetHelperCallFor() local
587 Operand *Src0 = IntrinsicCall->getArg(0); in genTargetHelperCallFor() local
746 Operand *Src0 = IntrinsicCall->getArg(0); in genTargetHelperCallFor() local
2177 Operand *Src0 = NumSrcs < 1 ? nullptr : CurInstr->getSrc(0); in postLowerLegalization() local
2466 Variable *Dest, Operand *Src0, in lowerInt64Arithmetic()
2762 Operand *Src0 = legalizeUndef(Instr->getSrc(0)); in lowerArithmetic() local
3059 Operand *Src0 = legalizeUndef(Instr->getSrc(0)); in lowerAssign() local
3071 Operand *Src0 = Instr->getSrc(0); in lowerAssign() local
[all …]
DIceInstARM32.cpp1168 const Operand *Src0 = getSrc(0); in emitIAS() local
1207 const Operand *Src0 = getSrc(0); in emitIAS() local
1233 const Operand *Src0 = getSrc(0); in emitIAS() local
1249 const Operand *Src0 = getSrc(0); in emitIAS() local
1523 Variable *Src0, Variable *Src1, in InstARM32Umull()
1801 InstARM32Vcmp::InstARM32Vcmp(Cfg *Func, Variable *Src0, Operand *Src1, in InstARM32Vcmp()
1979 Operand *Src0 = getSrc(0); in emitSingleDestSingleSource() local
2030 Operand *Src0 = getSrc(0); in emitIAS() local
2514 auto *Src0 = llvm::cast<Constant>(getSrc(0)); in emit() local
2775 const Operand *Src0 = getSrc(0); in emitIAS() local
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/GlobalISel/
DConstantFoldingMIRBuilder.h83 unsigned Src0, unsigned Src1) { in buildBinaryOp()
101 MachineInstrBuilder buildInstr(unsigned Opc, unsigned Dst, unsigned Src0, in buildInstr()
DMachineIRBuilder.h979 MachineInstrBuilder buildAdd(unsigned Dst, unsigned Src0, unsigned Src1) { in buildAdd()
999 MachineInstrBuilder buildSub(unsigned Dst, unsigned Src0, unsigned Src1) { in buildSub()
1018 MachineInstrBuilder buildMul(unsigned Dst, unsigned Src0, unsigned Src1) { in buildMul()
1038 MachineInstrBuilder buildAnd(unsigned Dst, unsigned Src0, unsigned Src1) { in buildAnd()
1057 MachineInstrBuilder buildOr(unsigned Dst, unsigned Src0, unsigned Src1) { in buildOr()
1072 unsigned Src0, unsigned Src1) { in buildBinaryOp()
/external/swiftshader/third_party/subzero/unittest/AssemblerX8664/
DControlFlow.cpp17 #define TestJ(C, Near, Dest, Src0, Value0, Src1, Value1) \ in TEST_F() argument
39 #define TestImpl(Dst, Src0, Src1) \ in TEST_F() argument
DGPRArith.cpp33 #define TestSetCC(C, Dest, IsTrue, Src0, Value0, Src1, Value1) \ in TEST_F() argument
57 #define TestImpl(Dest, Src0, Src1) \ in TEST_F() argument
709 #define TestImplRegReg(Inst0, Inst1, Dst0, Dst1, Value0, Src0, Src1, Value1, \ in TEST_F() argument
803 #define TestImplAddrReg(Inst0, Inst1, Value0, Src0, Src1, Value1, Op, Size) \ in TEST_F() argument
867 #define TestImplOp(Inst0, Inst1, Dst0, Dst1, Value0, Src0, Src1, Value1, Op, \ in TEST_F() argument
878 #define TestImplValues(Dst0, Dst1, Value0, Src0, Src1, Value1, Size) \ in TEST_F() argument
884 #define TestImplSize(Dst0, Dst1, Src0, Src1, Size) \ in TEST_F() argument
890 #define TestImpl(Dst0, Dst1, Src0, Src1) \ in TEST_F() argument
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DR600ExpandSpecialInstrs.cpp159 unsigned Src0 = BMI->getOperand( in runOnMachineFunction() local
211 unsigned Src0 = MI.getOperand( in runOnMachineFunction() local
DSIFoldOperands.cpp547 MachineOperand *Src0 = getImmOrMaterializedImm(MRI, MI->getOperand(Src0Idx)); in tryConstantFoldOp() local
638 const MachineOperand *Src0 = TII->getNamedOperand(*MI, AMDGPU::OpName::src0); in tryFoldInst() local
780 const MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0); in isClamp() local
895 const MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0); in isOMod() local
924 const MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0); in isOMod() local
DSIPeepholeSDWA.cpp562 MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0); in matchSDWAOperand() local
603 MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0); in matchSDWAOperand() local
672 MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0); in matchSDWAOperand() local
689 MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0); in matchSDWAOperand() local
941 MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0); in convertToSDWA() local
DSIShrinkInstructions.cpp130 MachineOperand &Src0 = MI.getOperand(Src0Idx); in foldImmediates() local
357 MachineOperand *Src0 = &MI.getOperand(1); in runOnMachineFunction() local
DSIInstrInfo.cpp1327 MachineOperand &Src0, in swapSourceModifiers()
1386 MachineOperand &Src0 = MI.getOperand(Src0Idx); in commuteInstructionImpl() local
2010 MachineOperand *Src0 = getNamedOperand(UseMI, AMDGPU::OpName::src0); in FoldImmediate() local
2238 const MachineOperand *Src0 = &MI.getOperand(Src0Idx); in convertToThreeAddress() local
2250 const MachineOperand *Src0 = getNamedOperand(MI, AMDGPU::OpName::src0); in convertToThreeAddress() local
2856 const MachineOperand &Src0 = MI.getOperand(Src0Idx); in verifyInstruction() local
2917 const MachineOperand &Src0 = MI.getOperand(Src0Idx); in verifyInstruction() local
3263 MachineOperand &Src0 = MI.getOperand(Src0Idx); in legalizeOperandsVOP2() local
3274 MachineOperand &Src0 = MI.getOperand(Src0Idx); in legalizeOperandsVOP2() local
3320 MachineOperand &Src0 = MI.getOperand(Src0Idx); in legalizeOperandsVOP2() local
[all …]
/external/llvm/lib/Target/AMDGPU/
DSIShrinkInstructions.cpp139 MachineOperand &Src0 = MI.getOperand(Src0Idx); in foldImmediates() local
276 const MachineOperand &Src0 = MI.getOperand(1); in runOnMachineFunction() local
DR600ExpandSpecialInstrs.cpp222 unsigned Src0 = BMI->getOperand( in runOnMachineFunction() local
274 unsigned Src0 = MI.getOperand( in runOnMachineFunction() local
DSIInstrInfo.cpp889 unsigned Src0 = MI.getOperand(1).getReg(); in expandPostRAPseudo() local
954 MachineOperand &Src0 = MI.getOperand(Src0Idx); in commuteInstructionImpl() local
1239 MachineOperand *Src0 = getNamedOperand(UseMI, AMDGPU::OpName::src0); in FoldImmediate() local
1425 const MachineOperand *Src0 = getNamedOperand(MI, AMDGPU::OpName::src0); in convertToThreeAddress() local
1433 const MachineOperand *Src0 = getNamedOperand(MI, AMDGPU::OpName::src0); in convertToThreeAddress() local
1760 const MachineOperand &Src0 = MI.getOperand(Src0Idx); in verifyInstruction() local
2066 MachineOperand &Src0 = MI.getOperand(Src0Idx); in legalizeOperandsVOP2() local
2087 MachineOperand &Src0 = MI.getOperand(Src0Idx); in legalizeOperandsVOP2() local
2312 unsigned Src0 = MI.getOperand(1).getReg(); in legalizeOperands() local
2703 MachineOperand &Src0 = Inst.getOperand(1); in splitScalar64BitUnaryOp() local
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/unittests/CodeGen/GlobalISel/
DPatternMatchTest.cpp164 unsigned Src0, Src1, Src2; in TEST() local
363 unsigned Src0; in TEST() local
436 unsigned Src0; in TEST() local
462 unsigned Src0, Src1; in TEST() local
/external/swiftshader/third_party/subzero/unittest/AssemblerX8632/
DControlFlow.cpp18 #define TestJ(C, Near, Src0, Value0, Src1, Value1, Dest) \ in TEST_F() argument
DGPRArith.cpp48 #define TestSetCC(C, Src0, Value0, Src1, Value1, Dest, IsTrue) \ in TEST_F() argument
678 #define TestImplRegReg(Inst0, Inst1, Dst0, Dst1, Value0, Src0, Src1, Value1, \ in TEST_F() argument
776 #define TestImplAddrReg(Inst0, Inst1, Value0, Src0, Src1, Value1, Op, Size) \ in TEST_F() argument
842 #define TestImplOp(Inst0, Inst1, Dst0, Dst1, Value0, Src0, Src1, Value1, Op, \ in TEST_F() argument
853 #define TestImplValues(Dst0, Dst1, Value0, Src0, Src1, Value1, Size) \ in TEST_F() argument
859 #define TestImplSize(Dst0, Dst1, Src0, Src1, Size) \ in TEST_F() argument
865 #define TestImpl(Dst0, Dst1, Src0, Src1) \ in TEST_F() argument
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DScalarizeMaskedMemIntrin.cpp119 Value *Src0 = CI->getArgOperand(3); in scalarizeMaskedLoad() local
384 Value *Src0 = CI->getArgOperand(3); in scalarizeMaskedGather() local

123