1 /*++ 2 3 Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR> 4 5 6 This program and the accompanying materials are licensed and made available under 7 8 the terms and conditions of the BSD License that accompanies this distribution. 9 10 The full text of the license may be found at 11 12 http://opensource.org/licenses/bsd-license.php. 13 14 15 16 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 17 18 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 19 20 21 22 23 Module Name: 24 25 CK505ClockPlatformInfo.h 26 27 Abstract: 28 29 Protocol to communicate product clock routing information. 30 31 GUID Info: 32 {3C485EA4-449A-46ce-BB08-2A336EA96B4E} 33 0x3c485ea4, 0x449a, 0x46ce, 0xbb, 0x8, 0x2a, 0x33, 0x6e, 0xa9, 0x6b, 0x4e); 34 35 **/ 36 37 #ifndef _CLOCK_PLATFORM_INFO_H_ 38 #define _CLOCK_PLATFORM_INFO_H_ 39 40 41 #define EFI_CK505_CLOCK_PLATFORM_INFO_GUID \ 42 {0x3c485ea4, 0x449a, 0x46ce, 0xbb, 0x8, 0x2a, 0x33, 0x6e, 0xa9, 0x6b, 0x4e} 43 44 // 45 // Structure to hold register modifications 46 // 47 typedef enum { 48 None = 0x00000000, 49 nICS9LP505_1 = 0x00000001, 50 nICS9LP505_2 = 0x00000002, 51 nIDTCV163 = 0x00000004, 52 nIDTCV174 = 0x00000008, 53 nSLG505YC56 = 0x00000010, 54 nSLG505YC64 = 0x00000020, 55 nCY28505 = 0x00000040, 56 nCY28505_2 = 0x00000080, 57 nCY28505LF = 0x00000100, 58 nPI6C505_OLD = 0x00000200, 59 nPI6C505_RevD = 0x00000400, 60 nGENERIC_505 = 0x00000800, 61 nSLG505YC264 = 0x00001000, 62 nIDTCV183 = 0x00002000, 63 nSLG505YC256 = 0x00004000, 64 nIDTCV184 = 0x00008000, 65 nIDTCV190 = 0x00010000, 66 All = 0xFFFFFFFF 67 } EFI_CLOCKS_SUPPORTED; 68 69 typedef enum { 70 Disabled, 71 Enabled, 72 EnabledWithoutSwitch, 73 EnabledWithSwitch 74 } EFI_SIGNAL_STATE; 75 76 typedef enum { 77 SrcClk11, 78 SrcClk10, 79 SrcClk9, 80 SrcClk8, 81 SrcClk7, 82 SrcClk6, 83 SrcClk5, 84 SrcClk4, 85 SrcClk3, 86 SrcClk2, 87 SrcClk1, 88 SrcClk0, 89 CpuClk1, 90 CpuClk0, 91 Ref0, 92 Dot96, 93 Usb48, 94 PciClkF5, 95 PciClk4, 96 PciClk3, 97 PciClk2, 98 PciClk1, 99 PciClk0, 100 SaveClockConfiguration, 101 MePresent, 102 Cr_A, 103 Cr_B, 104 Cr_C, 105 Cr_D, 106 Cr_E, 107 Cr_F, 108 Cr_G, 109 Cr_H, 110 Clk_None // Dummy entry for dynamic detection 111 } EFI_CLOCK_SIGNAL_NAME; 112 113 typedef struct { 114 EFI_CLOCK_SIGNAL_NAME Signal; 115 EFI_SIGNAL_STATE State; 116 EFI_CLOCKS_SUPPORTED Supported; 117 } EFI_STATIC_SIGNALS; 118 119 typedef struct { 120 BOOLEAN BehindBridge; 121 UINT16 BridgeBus; 122 UINT16 BridgeDev; 123 UINT16 BridgeFunction; 124 UINT16 TargetDevice; 125 EFI_CLOCK_SIGNAL_NAME Signal; 126 } EFI_DYNAMIC_SIGNALS; 127 128 129 typedef struct { 130 EFI_STATIC_SIGNALS *StaticClockTable; 131 UINTN StaticClockTableCount; 132 EFI_STATIC_SIGNALS *SxClockTable; 133 UINTN SxClockTableCount; 134 EFI_STATIC_SIGNALS *DynamicDisabledClocksTable; 135 UINTN DynamicDisabledClocksTableCount; 136 } EFI_CLOCK_PLATFORM_INFO; 137 138 extern EFI_GUID gEfiCk505ClockPlatformInfoGuid; 139 140 #endif 141