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Searched defs:T7 (Results 1 – 25 of 28) sorted by relevance

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/external/clang/test/SemaCXX/
Dtrivial-constructor.cpp32 struct T7 { struct
35 static_assert(!__has_trivial_constructor(T7), "t4 does not have a trivial constructor!"); argument
Dtrivial-destructor.cpp32 struct T7 { struct
35 static_assert(!__has_trivial_destructor(T7), "t2 does not have a trivial destructor!"); argument
Dattr-mode-tmpl.cpp19 …typedef enum { A7, B7 } __attribute__((mode(V2QI))) T7; // expected-error{{mode 'V2QI' is not supp… in CheckEnumerations() typedef
42 typedef T __attribute__((mode(II))) T7; // expected-error{{unknown machine mode}} in CheckMachineMode() typedef
Daccess-base-class.cpp82 namespace T7 { namespace
Dvirtual-override.cpp95 namespace T7 { namespace
Dundefined-internal.cpp285 class T7 {}; class
/external/clang/test/Index/
Dcomplete-documentation.cpp28 void T6::T7() { in T7() function in T6
Dcomplete-documentation-templates.cpp37 int T7; member in T3
/external/clang/test/Preprocessor/
Dassembler-with-cpp.c59 #define T7(x) T7 #x macro
/external/swiftshader/src/Renderer/
DVertex.hpp37 T7 = 10, enumerator
/external/swiftshader/src/Device/
DVertex.hpp37 T7 = 10, enumerator
/external/swiftshader/third_party/LLVM/utils/unittest/googletest/include/gtest/
Dgtest-printers.h543 void PrintTo(const ::std::tr1::tuple<T1, T2, T3, T4, T5, T6, T7, T8>& t, in PrintTo() argument
550 void PrintTo(const ::std::tr1::tuple<T1, T2, T3, T4, T5, T6, T7, T8, T9>& t, in PrintTo() argument
558 const ::std::tr1::tuple<T1, T2, T3, T4, T5, T6, T7, T8, T9, T10>& t, in PrintTo() argument
/external/llvm/utils/unittest/googletest/include/gtest/
Dgtest-printers.h543 void PrintTo(const ::std::tr1::tuple<T1, T2, T3, T4, T5, T6, T7, T8>& t, in PrintTo() argument
550 void PrintTo(const ::std::tr1::tuple<T1, T2, T3, T4, T5, T6, T7, T8, T9>& t, in PrintTo() argument
558 const ::std::tr1::tuple<T1, T2, T3, T4, T5, T6, T7, T8, T9, T10>& t, in PrintTo() argument
/external/google-breakpad/src/testing/gtest/include/gtest/
Dgtest-printers.h543 void PrintTo(const ::std::tr1::tuple<T1, T2, T3, T4, T5, T6, T7, T8>& t, in PrintTo() argument
550 void PrintTo(const ::std::tr1::tuple<T1, T2, T3, T4, T5, T6, T7, T8, T9>& t, in PrintTo() argument
558 const ::std::tr1::tuple<T1, T2, T3, T4, T5, T6, T7, T8, T9, T10>& t, in PrintTo() argument
/external/clang/test/CodeGen/
Dtbaa-struct.cpp31 typedef _Complex int T7; typedef
Dx86_64-arguments.c394 typedef _Complex int T7; typedef
/external/swiftshader/third_party/llvm-7.0/llvm/utils/unittest/googletest/include/gtest/
Dgtest-printers.h647 void PrintTo(const ::std::tr1::tuple<T1, T2, T3, T4, T5, T6, T7, T8>& t, in PrintTo() argument
654 void PrintTo(const ::std::tr1::tuple<T1, T2, T3, T4, T5, T6, T7, T8, T9>& t, in PrintTo() argument
662 const ::std::tr1::tuple<T1, T2, T3, T4, T5, T6, T7, T8, T9, T10>& t, in PrintTo() argument
/external/libaom/libaom/third_party/googletest/src/googletest/include/gtest/
Dgtest-printers.h646 void PrintTo(const ::std::tr1::tuple<T1, T2, T3, T4, T5, T6, T7, T8>& t, in PrintTo() argument
653 void PrintTo(const ::std::tr1::tuple<T1, T2, T3, T4, T5, T6, T7, T8, T9>& t, in PrintTo() argument
661 const ::std::tr1::tuple<T1, T2, T3, T4, T5, T6, T7, T8, T9, T10>& t, in PrintTo() argument
/external/mesa3d/src/gtest/include/gtest/
Dgtest-printers.h646 void PrintTo(const ::std::tr1::tuple<T1, T2, T3, T4, T5, T6, T7, T8>& t, in PrintTo() argument
653 void PrintTo(const ::std::tr1::tuple<T1, T2, T3, T4, T5, T6, T7, T8, T9>& t, in PrintTo() argument
661 const ::std::tr1::tuple<T1, T2, T3, T4, T5, T6, T7, T8, T9, T10>& t, in PrintTo() argument
/external/libvpx/libvpx/third_party/googletest/src/include/gtest/
Dgtest-printers.h707 void PrintTo(const ::std::tr1::tuple<T1, T2, T3, T4, T5, T6, T7, T8>& t, in PrintTo() argument
714 void PrintTo(const ::std::tr1::tuple<T1, T2, T3, T4, T5, T6, T7, T8, T9>& t, in PrintTo() argument
722 const ::std::tr1::tuple<T1, T2, T3, T4, T5, T6, T7, T8, T9, T10>& t, in PrintTo() argument
/external/swiftshader/third_party/subzero/src/
DIceTargetLoweringMIPS32.cpp4632 auto *T7 = makeReg(IceType_i32); in lowerIntrinsicCall() local
4683 auto *T7 = makeReg(IceType_i32); in lowerIntrinsicCall() local
4747 auto *T7 = I32Reg(); in lowerIntrinsicCall() local
4840 auto *T7 = I32Reg(); in lowerIntrinsicCall() local
4972 auto *T7 = I32Reg(); in lowerIntrinsicCall() local
6134 auto *T7 = Target->makeReg(IceType_i32, RegMIPS32::Reg_T7); in addiu_sp() local
6145 auto *T7 = Target->makeReg(IceType_i32, RegMIPS32::Reg_T7); in lw() local
6152 auto *T7 = Target->makeReg(IceType_i32, RegMIPS32::Reg_T7); in lw() local
6161 auto *T7 = Target->makeReg(IceType_i32, RegMIPS32::Reg_T7); in ll() local
6168 auto *T7 = Target->makeReg(IceType_i32, RegMIPS32::Reg_T7); in ll() local
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/external/python/cpython2/Modules/
Dmd5.c72 #define T7 /* 0xa8304613 */ (T_MASK ^ 0x57cfb9ec) macro
/external/libcups/cups/
Dmd5.c53 # define T7 0xa8304613 macro
/external/google-breakpad/src/testing/gtest/test/
Dgtest-param-test_test.cc114 const tuple<T1, T2, T3, T4, T5, T6, T7, T8, T9, T10>& value) { in PrintValue() argument
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/
DHexagonISelLoweringHVX.cpp1351 SDValue T7 = DAG.getNode(ISD::ADD, dl, ResTy, {T5, T6}); in LowerHvxMulh() local

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