Searched defs:TSR (Results 1 – 4 of 4) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonEarlyIfConv.cpp | 781 unsigned PredR, unsigned TR, unsigned TSR, unsigned FR, unsigned FSR) { in buildMux()
820 unsigned TR = 0, TSR = 0, FR = 0, FSR = 0, SR = 0, SSR = 0; in updatePhiNodes() local
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonEarlyIfConv.cpp | 781 unsigned TR = 0, TSR = 0, FR = 0, FSR = 0, SR = 0, SSR = 0; in updatePhiNodes() local
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| /external/u-boot/arch/powerpc/include/asm/ |
| D | processor.h | 685 #define TSR SPRN_TSR /* Timer Status Register */ macro
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| /external/u-boot/arch/sh/include/asm/ |
| D | cpu_sh7722.h | 877 #define TSR 0xA44800B8 macro
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