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1 /********************************************************************************
2 Copyright (C) 2016 Marvell International Ltd.
3 
4 Marvell BSD License Option
5 
6 If you received this File from Marvell, you may opt to use, redistribute and/or
7 modify this File under the following licensing terms.
8 Redistribution and use in source and binary forms, with or without modification,
9 are permitted provided that the following conditions are met:
10 
11 * Redistributions of source code must retain the above copyright notice,
12   this list of conditions and the following disclaimer.
13 
14 * Redistributions in binary form must reproduce the above copyright
15   notice, this list of conditions and the following disclaimer in the
16   documentation and/or other materials provided with the distribution.
17 
18 * Neither the name of Marvell nor the names of its contributors may be
19   used to endorse or promote products derived from this software without
20   specific prior written permission.
21 
22 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
23 ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
24 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
26 ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
27 (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
29 ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
31 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 
33 *******************************************************************************/
34 
35 #ifndef __UTMIPHY_H__
36 #define __UTMIPHY_H__
37 
38 #include <Library/ArmLib.h>
39 #include <Library/ArmPlatformLib.h>
40 #include <Library/DebugLib.h>
41 #include <Library/PcdLib.h>
42 #include <Library/MemoryAllocationLib.h>
43 #include <Library/IoLib.h>
44 #include <Library/TimerLib.h>
45 #include <Library/ParsePcdLib.h>
46 
47 #define UTMI_USB_CFG_DEVICE_EN_OFFSET             0
48 #define UTMI_USB_CFG_DEVICE_EN_MASK               (0x1 << UTMI_USB_CFG_DEVICE_EN_OFFSET)
49 #define UTMI_USB_CFG_DEVICE_MUX_OFFSET            1
50 #define UTMI_USB_CFG_DEVICE_MUX_MASK              (0x1 << UTMI_USB_CFG_DEVICE_MUX_OFFSET)
51 #define UTMI_USB_CFG_PLL_OFFSET                   25
52 #define UTMI_USB_CFG_PLL_MASK                     (0x1 << UTMI_USB_CFG_PLL_OFFSET)
53 
54 #define UTMI_PHY_CFG_PU_OFFSET                    5
55 #define UTMI_PHY_CFG_PU_MASK                      (0x1 << UTMI_PHY_CFG_PU_OFFSET)
56 
57 #define UTMI_PLL_CTRL_REG                         0x0
58 #define UTMI_PLL_CTRL_REFDIV_OFFSET               0
59 #define UTMI_PLL_CTRL_REFDIV_MASK                 (0x7f << UTMI_PLL_CTRL_REFDIV_OFFSET)
60 #define UTMI_PLL_CTRL_FBDIV_OFFSET                16
61 #define UTMI_PLL_CTRL_FBDIV_MASK                  (0x1FF << UTMI_PLL_CTRL_FBDIV_OFFSET)
62 #define UTMI_PLL_CTRL_SEL_LPFR_OFFSET             28
63 #define UTMI_PLL_CTRL_SEL_LPFR_MASK               (0x3 << UTMI_PLL_CTRL_SEL_LPFR_OFFSET)
64 #define UTMI_PLL_CTRL_PLL_RDY_OFFSET              31
65 #define UTMI_PLL_CTRL_PLL_RDY_MASK                (0x1 << UTMI_PLL_CTRL_PLL_RDY_OFFSET)
66 
67 #define UTMI_CALIB_CTRL_REG                       0x8
68 #define UTMI_CALIB_CTRL_IMPCAL_VTH_OFFSET         8
69 #define UTMI_CALIB_CTRL_IMPCAL_VTH_MASK           (0x7 << UTMI_CALIB_CTRL_IMPCAL_VTH_OFFSET)
70 #define UTMI_CALIB_CTRL_IMPCAL_DONE_OFFSET        23
71 #define UTMI_CALIB_CTRL_IMPCAL_DONE_MASK          (0x1 << UTMI_CALIB_CTRL_IMPCAL_DONE_OFFSET)
72 #define UTMI_CALIB_CTRL_PLLCAL_DONE_OFFSET        31
73 #define UTMI_CALIB_CTRL_PLLCAL_DONE_MASK          (0x1 << UTMI_CALIB_CTRL_PLLCAL_DONE_OFFSET)
74 
75 #define UTMI_TX_CH_CTRL_REG                       0xC
76 #define UTMI_TX_CH_CTRL_DRV_EN_LS_OFFSET          12
77 #define UTMI_TX_CH_CTRL_DRV_EN_LS_MASK            (0xf << UTMI_TX_CH_CTRL_DRV_EN_LS_OFFSET)
78 #define UTMI_TX_CH_CTRL_IMP_SEL_LS_OFFSET         16
79 #define UTMI_TX_CH_CTRL_IMP_SEL_LS_MASK           (0xf << UTMI_TX_CH_CTRL_IMP_SEL_LS_OFFSET)
80 
81 #define UTMI_RX_CH_CTRL0_REG                      0x14
82 #define UTMI_RX_CH_CTRL0_SQ_DET_OFFSET            15
83 #define UTMI_RX_CH_CTRL0_SQ_DET_MASK              (0x1 << UTMI_RX_CH_CTRL0_SQ_DET_OFFSET)
84 #define UTMI_RX_CH_CTRL0_SQ_ANA_DTC_OFFSET        28
85 #define UTMI_RX_CH_CTRL0_SQ_ANA_DTC_MASK          (0x1 << UTMI_RX_CH_CTRL0_SQ_ANA_DTC_OFFSET)
86 
87 #define UTMI_RX_CH_CTRL1_REG                      0x18
88 #define UTMI_RX_CH_CTRL1_SQ_AMP_CAL_OFFSET        0
89 #define UTMI_RX_CH_CTRL1_SQ_AMP_CAL_MASK          (0x3 << UTMI_RX_CH_CTRL1_SQ_AMP_CAL_OFFSET)
90 #define UTMI_RX_CH_CTRL1_SQ_AMP_CAL_EN_OFFSET     3
91 #define UTMI_RX_CH_CTRL1_SQ_AMP_CAL_EN_MASK       (0x1 << UTMI_RX_CH_CTRL1_SQ_AMP_CAL_EN_OFFSET)
92 
93 #define UTMI_CTRL_STATUS0_REG                     0x24
94 #define UTMI_CTRL_STATUS0_SUSPENDM_OFFSET         22
95 #define UTMI_CTRL_STATUS0_SUSPENDM_MASK           (0x1 << UTMI_CTRL_STATUS0_SUSPENDM_OFFSET)
96 #define UTMI_CTRL_STATUS0_TEST_SEL_OFFSET         25
97 #define UTMI_CTRL_STATUS0_TEST_SEL_MASK           (0x1 << UTMI_CTRL_STATUS0_TEST_SEL_OFFSET)
98 
99 #define UTMI_CHGDTC_CTRL_REG                      0x38
100 #define UTMI_CHGDTC_CTRL_VDAT_OFFSET              8
101 #define UTMI_CHGDTC_CTRL_VDAT_MASK                (0x3 << UTMI_CHGDTC_CTRL_VDAT_OFFSET)
102 #define UTMI_CHGDTC_CTRL_VSRC_OFFSET              10
103 #define UTMI_CHGDTC_CTRL_VSRC_MASK                (0x3 << UTMI_CHGDTC_CTRL_VSRC_OFFSET)
104 
105 #define UTMI_PHY_TO_USB_HOST0                     0
106 #define UTMI_PHY_TO_USB_HOST1                     1
107 #define UTMI_PHY_TO_USB_DEVICE0                   2
108 #define UTMI_PHY_INVALID                          0xff
109 
110 #endif
111