| /external/llvm/lib/Target/X86/Utils/ |
| D | X86ShuffleDecode.cpp | 48 void DecodeInsertElementMask(MVT VT, unsigned Idx, unsigned Len, in DecodeInsertElementMask()
77 void DecodeMOVSLDUPMask(MVT VT, SmallVectorImpl<int> &ShuffleMask) { in DecodeMOVSLDUPMask()
85 void DecodeMOVSHDUPMask(MVT VT, SmallVectorImpl<int> &ShuffleMask) { in DecodeMOVSHDUPMask()
93 void DecodeMOVDDUPMask(MVT VT, SmallVectorImpl<int> &ShuffleMask) { in DecodeMOVDDUPMask()
107 void DecodePSLLDQMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { in DecodePSLLDQMask()
121 void DecodePSRLDQMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { in DecodePSRLDQMask()
136 void DecodePALIGNRMask(MVT VT, unsigned Imm, in DecodePALIGNRMask()
157 void DecodePSHUFMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { in DecodePSHUFMask()
174 void DecodePSHUFHWMask(MVT VT, unsigned Imm, in DecodePSHUFHWMask()
190 void DecodePSHUFLWMask(MVT VT, unsigned Imm, in DecodePSHUFLWMask()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 474 MVT VT = Op.getSimpleValueType(); in Promote() local
507 MVT VT = Op.getOperand(0).getSimpleValueType(); in PromoteINT_TO_FP() local
532 MVT VT = Op.getSimpleValueType(); in PromoteFP_TO_INT() local
765 EVT VT = Op.getValueType(); in ExpandSELECT() local
817 EVT VT = Op.getValueType(); in ExpandSEXTINREG() local
840 EVT VT = Op.getValueType(); in ExpandANY_EXTEND_VECTOR_INREG() local
863 EVT VT = Op.getValueType(); in ExpandSIGN_EXTEND_VECTOR_INREG() local
887 EVT VT = Op.getValueType(); in ExpandZERO_EXTEND_VECTOR_INREG() local
912 static void createBSWAPShuffleMask(EVT VT, SmallVectorImpl<int> &ShuffleMask) { in createBSWAPShuffleMask()
920 EVT VT = Op.getValueType(); in ExpandBSWAP() local
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| D | LegalizeTypes.h | 63 TargetLowering::LegalizeTypeAction getTypeAction(EVT VT) const { in getTypeAction()
68 bool isTypeLegal(EVT VT) const { in isTypeLegal()
73 bool isSimpleLegalType(EVT VT) const { in isSimpleLegalType()
81 bool isLegalInHWReg(EVT VT) const { in isLegalInHWReg()
86 EVT getSetCCResultType(EVT VT) const { in getSetCCResultType()
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| /external/libcxx/test/std/utilities/smartptr/unique.ptr/unique.ptr.class/unique.ptr.modifiers/ |
| D | reset.pass.cpp | 24 typedef typename std::conditional<IsArray, A[], A>::type VT; in test_reset_pointer() typedef
61 typedef typename std::conditional<IsArray, A[], A>::type VT; in test_reset_nullptr() typedef
85 typedef typename std::conditional<IsArray, A[], A>::type VT; in test_reset_no_arg() typedef
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| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | TargetLowering.h | 202 virtual TargetRegisterClass *getRegClassFor(EVT VT) const { in getRegClassFor()
214 virtual const TargetRegisterClass *getRepRegClassFor(EVT VT) const { in getRepRegClassFor()
222 virtual uint8_t getRepRegClassCostFor(EVT VT) const { in getRepRegClassCostFor()
230 bool isTypeLegal(EVT VT) const { in isTypeLegal()
246 LegalizeTypeAction getTypeAction(MVT VT) const { in getTypeAction()
250 void setTypeAction(EVT VT, LegalizeTypeAction Action) { in setTypeAction()
264 LegalizeTypeAction getTypeAction(LLVMContext &Context, EVT VT) const { in getTypeAction()
267 LegalizeTypeAction getTypeAction(MVT VT) const { in getTypeAction()
277 EVT getTypeToTransformTo(LLVMContext &Context, EVT VT) const { in getTypeToTransformTo()
285 EVT getTypeToExpandTo(LLVMContext &Context, EVT VT) const { in getTypeToExpandTo()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyMachineFunctionInfo.h | 57 void addParam(MVT VT) { Params.push_back(VT); } in addParam()
60 void addResult(MVT VT) { Results.push_back(VT); } in addResult()
66 void setLocal(size_t i, MVT VT) { Locals[i] = VT; } in setLocal()
67 void addLocal(MVT VT) { Locals.push_back(VT); } in addLocal()
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| /external/libcxx/test/std/iterators/iterator.primitives/iterator.traits/ |
| D | empty.fail.cpp | 72 …typedef T::value_type VT; // expected-error-re {{no type named 'value_type' in 'std::__1::i… in main() typedef
81 …typedef T::value_type VT; // expected-error-re {{no type named 'value_type' in 'std::__1::i… in main() typedef
90 …typedef T::value_type VT; // expected-error-re {{no type named 'value_type' in 'std::__1::i… in main() typedef
99 …typedef T::value_type VT; // expected-error-re {{no type named 'value_type' in 'std::__1::i… in main() typedef
108 …typedef T::value_type VT; // expected-error-re {{no type named 'value_type' in 'std::__1::i… in main() typedef
117 …typedef T::value_type VT; // expected-error-re {{no type named 'value_type' in 'std::__1::i… in main() typedef
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 402 MVT VT = Op.getSimpleValueType(); in Promote() local
435 EVT VT = Op.getOperand(0).getValueType(); in PromoteINT_TO_FP() local
471 EVT VT = Op.getValueType(); in PromoteFP_TO_INT() local
713 EVT VT = Op.getValueType(); in ExpandSELECT() local
768 EVT VT = Op.getValueType(); in ExpandSEXTINREG() local
791 EVT VT = Op.getValueType(); in ExpandANY_EXTEND_VECTOR_INREG() local
814 EVT VT = Op.getValueType(); in ExpandSIGN_EXTEND_VECTOR_INREG() local
838 EVT VT = Op.getValueType(); in ExpandZERO_EXTEND_VECTOR_INREG() local
863 static void createBSWAPShuffleMask(EVT VT, SmallVectorImpl<int> &ShuffleMask) { in createBSWAPShuffleMask()
871 EVT VT = Op.getValueType(); in ExpandBSWAP() local
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| D | LegalizeTypes.h | 63 TargetLowering::LegalizeTypeAction getTypeAction(EVT VT) const { in getTypeAction()
68 bool isTypeLegal(EVT VT) const { in isTypeLegal()
73 bool isSimpleLegalType(EVT VT) const { in isSimpleLegalType()
81 bool isLegalInHWReg(EVT VT) const { in isLegalInHWReg()
86 EVT getSetCCResultType(EVT VT) const { in getSetCCResultType()
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| D | SelectionDAG.cpp | 79 bool ConstantFPSDNode::isValueValidForType(EVT VT, in isValueValidForType()
679 EVT VT = N->getValueType(0); in VerifySDNode() local
754 EVT VT = cast<VTSDNode>(N)->getVT(); in RemoveNodeFromCSEMaps() local
1001 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT) { in getAnyExtOrTrunc()
1007 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT) { in getSExtOrTrunc()
1013 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT) { in getZExtOrTrunc()
1019 SDValue SelectionDAG::getBoolExtOrTrunc(SDValue Op, const SDLoc &SL, EVT VT, in getBoolExtOrTrunc()
1028 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, const SDLoc &DL, EVT VT) { in getZeroExtendInReg()
1041 EVT VT) { in getAnyExtendVectorInReg()
1052 EVT VT) { in getSignExtendVectorInReg()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | TargetLowering.h | 281 getPreferredVectorAction(EVT VT) const { in getPreferredVectorAction()
308 virtual bool isIntDivCheap(EVT VT, AttributeList Attr) const { return false; } in isIntDivCheap()
311 virtual bool hasStandaloneRem(EVT VT) const { in hasStandaloneRem()
445 virtual bool hasBitPreservingFPLogic(EVT VT) const { in hasBitPreservingFPLogic()
474 virtual bool convertSetCCLogicToBitwiseLogic(EVT VT) const { in convertSetCCLogicToBitwiseLogic()
483 MVT VT = MVT::getIntegerVT(NumBits); in hasFastEqualityCompare() local
556 virtual bool enableAggressiveFMAFusion(EVT VT) const { in enableAggressiveFMAFusion()
607 virtual const TargetRegisterClass *getRegClassFor(MVT VT) const { in getRegClassFor()
620 virtual const TargetRegisterClass *getRepRegClassFor(MVT VT) const { in getRepRegClassFor()
627 virtual uint8_t getRepRegClassCostFor(MVT VT) const { in getRepRegClassCostFor()
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| /external/llvm/include/llvm/Target/ |
| D | TargetLowering.h | 210 getPreferredVectorAction(EVT VT) const { in getPreferredVectorAction()
237 virtual bool isIntDivCheap(EVT VT, AttributeSet Attr) const { in isIntDivCheap()
323 virtual bool hasBitPreservingFPLogic(EVT VT) const { in hasBitPreservingFPLogic()
379 virtual bool enableAggressiveFMAFusion(EVT VT) const { in enableAggressiveFMAFusion()
430 virtual const TargetRegisterClass *getRegClassFor(MVT VT) const { in getRegClassFor()
443 virtual const TargetRegisterClass *getRepRegClassFor(MVT VT) const { in getRepRegClassFor()
450 virtual uint8_t getRepRegClassCostFor(MVT VT) const { in getRepRegClassCostFor()
457 bool isTypeLegal(EVT VT) const { in isTypeLegal()
474 LegalizeTypeAction getTypeAction(MVT VT) const { in getTypeAction()
478 void setTypeAction(MVT VT, LegalizeTypeAction Action) { in setTypeAction()
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| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86FastISel.cpp | 148 bool X86FastISel::isTypeLegal(Type *Ty, MVT &VT, bool AllowI1) { in isTypeLegal()
176 bool X86FastISel::X86FastEmitLoad(EVT VT, const X86AddressMode &AM, in X86FastEmitLoad()
235 X86FastISel::X86FastEmitStore(EVT VT, unsigned Val, const X86AddressMode &AM) { in X86FastEmitStore()
268 bool X86FastISel::X86FastEmitStore(EVT VT, const Value *Val, in X86FastEmitStore()
677 MVT VT; in X86SelectStore() local
803 MVT VT; in X86SelectLoad() local
819 static unsigned X86ChooseCmpOpcode(EVT VT, const X86Subtarget *Subtarget) { in X86ChooseCmpOpcode()
840 static unsigned X86ChooseCmpImmediateOpcode(EVT VT, const ConstantInt *RHSC) { in X86ChooseCmpImmediateOpcode()
857 EVT VT) { in X86FastEmitCompare()
892 MVT VT; in X86SelectCmp() local
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| D | X86ISelLowering.cpp | 84 EVT VT = Vec.getValueType(); in Extract128BitVector() local
128 EVT VT = Vec.getValueType(); in Insert128BitVector() local
352 MVT VT = IntVTs[i]; in X86TargetLowering() local
477 MVT VT = IntVTs[i]; in X86TargetLowering() local
684 for (unsigned VT = (unsigned)MVT::FIRST_VECTOR_VALUETYPE; in X86TargetLowering() local
852 EVT VT = (MVT::SimpleValueType)i; in X86TargetLowering() local
882 EVT VT = SVT; in X86TargetLowering() local
1057 EVT VT = SVT; in X86TargetLowering() local
1079 EVT VT = SVT; in X86TargetLowering() local
1100 for (unsigned VT = (unsigned)MVT::FIRST_VECTOR_VALUETYPE; in X86TargetLowering() local
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| /external/libcxx/test/std/utilities/smartptr/unique.ptr/unique.ptr.class/unique.ptr.ctor/ |
| D | move.pass.cpp | 63 void sink2(std::unique_ptr<VT, Deleter<VT> > p) { in sink2()
69 void sink3(std::unique_ptr<VT, NCDeleter<VT>&> p) { in sink3()
86 typedef typename std::conditional<!IsArray, A, A[]>::type VT; in test_basic() typedef
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 298 bool isTypeLegal(const EVT &VT) { in isTypeLegal()
533 EVT VT = N0.getValueType(); in ReassociateOps() local
666 EVT VT = Load->getValueType(0); in ReplaceLoadWithPromotedLoad() local
761 EVT VT = Op.getValueType(); in PromoteIntBinOp() local
819 EVT VT = Op.getValueType(); in PromoteIntShiftOp() local
863 EVT VT = Op.getValueType(); in PromoteExtend() local
892 EVT VT = Op.getValueType(); in PromoteLoad() local
1296 EVT VT = N0.getValueType(); in combineShlAddConstant() local
1320 EVT VT = N0.getValueType(); in visitADD() local
1486 EVT VT = N0.getValueType(); in visitADDC() local
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| /external/llvm/lib/CodeGen/ |
| D | CallingConvLower.cpp | 93 MVT VT = Outs[i].VT; in CheckReturn() local
107 MVT VT = Outs[i].VT; in AnalyzeReturn() local
160 MVT VT = Ins[i].VT; in AnalyzeCallResult() local
173 void CCState::AnalyzeCallResult(MVT VT, CCAssignFn Fn) { in AnalyzeCallResult()
183 static bool isValueTypeInRegForCC(CallingConv::ID CC, MVT VT) { in isValueTypeInRegForCC()
194 MVT VT, CCAssignFn Fn) { in getRemainingRegParmsForType()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86InterleavedAccess.cpp | 223 static MVT scaleVectorType(MVT VT) { in scaleVectorType()
251 static void genShuffleBland(MVT VT, ArrayRef<uint32_t> Mask, in genShuffleBland()
281 static void reorderSubVector(MVT VT, SmallVectorImpl<Value *> &TransposedMatrix, in reorderSubVector()
323 MVT VT = MVT::v8i16; in interleave8bitStride4VF8() local
363 MVT VT = MVT::getVectorVT(MVT::i8, NumOfElm); in interleave8bitStride4() local
432 static void createShuffleStride(MVT VT, int Stride, in createShuffleStride()
446 static void setGroupSize(MVT VT, SmallVectorImpl<uint32_t> &SizeInfo) { in setGroupSize()
469 static void DecodePALIGNRMask(MVT VT, unsigned Imm, in DecodePALIGNRMask()
554 MVT VT = MVT::getVT(Shuffles[0]->getType()); in deinterleave8bitStride3() local
605 static void group2Shuffle(MVT VT, SmallVectorImpl<uint32_t> &Mask, in group2Shuffle()
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| /external/libcxx/test/std/utilities/memory/allocator.traits/allocator.traits.members/ |
| D | allocate_hint.pass.cpp | 65 typedef IncompleteHolder* VT; in main() typedef
76 typedef IncompleteHolder* VT; in main() typedef
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | CallingConvLower.cpp | 110 MVT VT = Outs[i].VT; in CheckReturn() local
124 MVT VT = Outs[i].VT; in AnalyzeReturn() local
177 MVT VT = Ins[i].VT; in AnalyzeCallResult() local
190 void CCState::AnalyzeCallResult(MVT VT, CCAssignFn Fn) { in AnalyzeCallResult()
200 static bool isValueTypeInRegForCC(CallingConv::ID CC, MVT VT) { in isValueTypeInRegForCC()
211 MVT VT, CCAssignFn Fn) { in getRemainingRegParmsForType()
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| D | TargetLoweringBase.cpp | 405 RTLIB::Libcall RTLIB::getSYNC(unsigned Opc, MVT VT) { in getSYNC()
586 for (MVT VT : MVT::all_valuetypes()) { in initActions() local
856 static unsigned getVectorTypeBreakdownMVT(MVT VT, MVT &IntermediateVT, in getVectorTypeBreakdownMVT()
1159 MVT VT = (MVT::SimpleValueType) i; in computeRegisterProperties() local
1271 unsigned TargetLoweringBase::getVectorTypeBreakdown(LLVMContext &Context, EVT VT, in getVectorTypeBreakdown()
1350 EVT VT = ValueVTs[j]; in GetReturnInfo() local
1398 const DataLayout &DL, EVT VT, in allowsMemoryAccess()
1686 static std::string getReciprocalOpName(bool IsSqrt, EVT VT) { in getReciprocalOpName()
1729 static int getOpEnabled(bool IsSqrt, EVT VT, StringRef Override) { in getOpEnabled()
1789 static int getOpRefinementSteps(bool IsSqrt, EVT VT, StringRef Override) { in getOpRefinementSteps()
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| /external/libcxx/test/std/utilities/smartptr/unique.ptr/unique.ptr.class/unique.ptr.asgn/ |
| D | move.pass.cpp | 34 typedef typename std::conditional<IsArray, A[], A>::type VT; in test_basic() typedef
79 typedef typename std::conditional<IsArray, int[], int>::type VT; in test_sfinae() typedef
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | CallingConvLower.cpp | 92 MVT VT = Outs[i].VT; in CheckReturn() local
106 MVT VT = Outs[i].VT; in AnalyzeReturn() local
160 MVT VT = Ins[i].VT; in AnalyzeCallResult() local
174 void CCState::AnalyzeCallResult(MVT VT, CCAssignFn Fn) { in AnalyzeCallResult()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.cpp | 49 EVT AMDGPUTargetLowering::getEquivalentMemType(LLVMContext &Ctx, EVT VT) { in getEquivalentMemType()
58 EVT AMDGPUTargetLowering::getEquivalentBitType(LLVMContext &Ctx, EVT VT) { in getEquivalentBitType()
100 for (MVT VT : MVT::integer_valuetypes()) { in AMDGPUTargetLowering() local
106 for (MVT VT : MVT::integer_valuetypes()) { in AMDGPUTargetLowering() local
126 for (MVT VT : MVT::integer_vector_valuetypes()) { in AMDGPUTargetLowering() local
292 for (MVT VT : ScalarIntVTs) { in AMDGPUTargetLowering() local
363 for (MVT VT : VectorIntTypes) { in AMDGPUTargetLowering() local
406 for (MVT VT : FloatVectorTypes) { in AMDGPUTargetLowering() local
768 EVT VT = EVT::getEVT(InitTy); in LowerConstantInitializer() local
776 EVT VT = EVT::getEVT(CFP->getType()); in LowerConstantInitializer() local
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMFastISel.cpp | 475 unsigned ARMFastISel::ARMMoveToFPReg(EVT VT, unsigned SrcReg) { in ARMMoveToFPReg()
485 unsigned ARMFastISel::ARMMoveToIntReg(EVT VT, unsigned SrcReg) { in ARMMoveToIntReg()
498 unsigned ARMFastISel::ARMMaterializeFP(const ConstantFP *CFP, EVT VT) { in ARMMaterializeFP()
542 unsigned ARMFastISel::ARMMaterializeInt(const Constant *C, EVT VT) { in ARMMaterializeInt()
582 unsigned ARMFastISel::ARMMaterializeGV(const GlobalValue *GV, EVT VT) { in ARMMaterializeGV()
644 EVT VT = TLI.getValueType(C->getType(), true); in TargetMaterializeConstant() local
663 MVT VT; in TargetMaterializeAlloca() local
685 bool ARMFastISel::isTypeLegal(Type *Ty, MVT &VT) { in isTypeLegal()
697 bool ARMFastISel::isLoadTypeLegal(Type *Ty, MVT &VT) { in isLoadTypeLegal()
831 void ARMFastISel::ARMSimplifyAddress(Address &Addr, EVT VT) { in ARMSimplifyAddress()
[all …]
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