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1 /*
2  *  Copyright (c) 2013 The WebRTC project authors. All Rights Reserved.
3  *
4  *  Use of this source code is governed by a BSD-style license
5  *  that can be found in the LICENSE file in the root of the source
6  *  tree. An additional intellectual property rights grant can be found
7  *  in the file PATENTS.  All contributing project authors may
8  *  be found in the AUTHORS file in the root of the source tree.
9  */
10 
11 
12 /*
13  * This file contains implementations of the functions
14  * WebRtcSpl_ScaleAndAddVectorsWithRound_mips()
15  */
16 
17 #include "webrtc/common_audio/signal_processing/include/signal_processing_library.h"
18 
WebRtcSpl_ScaleAndAddVectorsWithRound_mips(const int16_t * in_vector1,int16_t in_vector1_scale,const int16_t * in_vector2,int16_t in_vector2_scale,int right_shifts,int16_t * out_vector,size_t length)19 int WebRtcSpl_ScaleAndAddVectorsWithRound_mips(const int16_t* in_vector1,
20                                                int16_t in_vector1_scale,
21                                                const int16_t* in_vector2,
22                                                int16_t in_vector2_scale,
23                                                int right_shifts,
24                                                int16_t* out_vector,
25                                                size_t length) {
26   int16_t r0 = 0, r1 = 0;
27   int16_t *in1 = (int16_t*)in_vector1;
28   int16_t *in2 = (int16_t*)in_vector2;
29   int16_t *out = out_vector;
30   size_t i = 0;
31   int value32 = 0;
32 
33   if (in_vector1 == NULL || in_vector2 == NULL || out_vector == NULL ||
34       length == 0 || right_shifts < 0) {
35     return -1;
36   }
37   for (i = 0; i < length; i++) {
38     __asm __volatile (
39       "lh         %[r0],          0(%[in1])                               \n\t"
40       "lh         %[r1],          0(%[in2])                               \n\t"
41       "mult       %[r0],          %[in_vector1_scale]                     \n\t"
42       "madd       %[r1],          %[in_vector2_scale]                     \n\t"
43       "extrv_r.w  %[value32],     $ac0,               %[right_shifts]     \n\t"
44       "addiu      %[in1],         %[in1],             2                   \n\t"
45       "addiu      %[in2],         %[in2],             2                   \n\t"
46       "sh         %[value32],     0(%[out])                               \n\t"
47       "addiu      %[out],         %[out],             2                   \n\t"
48       : [value32] "=&r" (value32), [out] "+r" (out), [in1] "+r" (in1),
49         [in2] "+r" (in2), [r0] "=&r" (r0), [r1] "=&r" (r1)
50       : [in_vector1_scale] "r" (in_vector1_scale),
51         [in_vector2_scale] "r" (in_vector2_scale),
52         [right_shifts] "r" (right_shifts)
53       : "hi", "lo", "memory"
54     );
55   }
56   return 0;
57 }
58