| /external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
| D | CodeGenSchedule.cpp | 494 IdxVec &Writes, IdxVec &Reads) const { in findRWs()
612 IdxVec Writes, Reads; in collectSchedClasses() local
677 IdxVec Writes; in collectSchedClasses() local
989 IdxVec Writes, Reads; in inferFromItinClass() local
1011 IdxVec Writes, Reads; in inferFromInstRWs() local
1573 IdxVec Writes, Reads; in collectProcResources() local
1729 IdxVec Writes, Reads; in collectItinProcResources() local
1771 void CodeGenSchedModels::collectRWResources(ArrayRef<unsigned> Writes, in collectRWResources()
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| D | CodeGenSchedule.h | 130 IdxVec Writes; member
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| D | SubtargetEmitter.cpp | 1032 IdxVec Writes = SC.Writes; in GenSchedClassTables() local
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| /external/llvm/utils/TableGen/ |
| D | CodeGenSchedule.cpp | 383 IdxVec &Writes, IdxVec &Reads) const { in findRWs()
509 IdxVec Writes, Reads; in collectSchedClasses() local
567 IdxVec Writes; in collectSchedClasses() local
589 ArrayRef<unsigned> Writes, in findSchedClassIdx()
884 IdxVec Writes, Reads; in inferFromItinClass() local
907 IdxVec Writes, Reads; in inferFromInstRWs() local
1463 IdxVec Writes, Reads; in collectProcResources() local
1617 IdxVec Writes, Reads; in collectItinProcResources() local
1660 void CodeGenSchedModels::collectRWResources(ArrayRef<unsigned> Writes, in collectRWResources()
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| D | CodeGenSchedule.h | 132 IdxVec Writes; member
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| D | SubtargetEmitter.cpp | 852 IdxVec Writes = SC.Writes; in GenSchedClassTables() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMParallelDSP.cpp | 495 Instructions &Writes) { in AliasCandidates()
508 Instructions &Writes, OpChainList &MACCandidates) { in AreAliased()
618 Instructions Reads, Writes; in MatchSMLAD() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | MachineInstrBundle.h | 157 bool Writes; member
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| /external/llvm/include/llvm/CodeGen/ |
| D | MachineInstrBundle.h | 158 bool Writes; member
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| /external/swiftshader/third_party/llvm-7.0/llvm/tools/llvm-mca/ |
| D | Instruction.h | 188 void setDependentWrites(unsigned Writes) { in setDependentWrites()
256 std::vector<WriteDescriptor> Writes; // Implicit writes are at the end. member
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| D | RegisterFile.cpp | 245 void RegisterFile::collectWrites(SmallVectorImpl<WriteRef> &Writes, in collectWrites()
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| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | InlineSpiller.cpp | 866 bool Reads, Writes; in reMaterializeFor() local
1126 bool Reads, Writes; in spillAroundUses() local
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| D | RegisterCoalescer.cpp | 942 bool Reads, Writes; in UpdateRegDefsUses() local
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| /external/llvm/lib/CodeGen/ |
| D | RegisterCoalescer.cpp | 1276 bool Reads, Writes; in updateRegDefsUses() local
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| D | MachinePipeliner.cpp | 3651 bool Reads, Writes; in orderDependence() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | RegisterCoalescer.cpp | 1559 bool Reads, Writes; in updateRegDefsUses() local
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| D | MachinePipeliner.cpp | 3795 bool Reads, Writes; in orderDependence() local
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