/external/u-boot/arch/arm/dts/ |
D | zynq-7000.dtsi | 73 adc: adc@f8007100 { label
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D | stm32f429.dtsi | 461 adc: adc@40012000 { label
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D | r8a7791.dtsi | 1040 adc: adc@e6e54000 { label
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/external/u-boot/board/samsung/universal_c210/ |
D | universal.c | 49 struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc(); in get_adc_value() local
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/external/swiftshader/third_party/subzero/src/ |
D | IceAssemblerX86BaseImpl.h | 2881 void AssemblerX86Base<TraitsType>::adc(Type Ty, GPRRegister dst, in adc() function 2887 void AssemblerX86Base<TraitsType>::adc(Type Ty, GPRRegister dst, in adc() function 2893 void AssemblerX86Base<TraitsType>::adc(Type Ty, GPRRegister reg, in adc() function 2899 void AssemblerX86Base<TraitsType>::adc(Type Ty, const Address &address, in adc() function 2905 void AssemblerX86Base<TraitsType>::adc(Type Ty, const Address &address, in adc() function
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D | IceAssemblerARM32.cpp | 1316 void AssemblerARM32::adc(const Operand *OpRd, const Operand *OpRn, in adc() function in Ice::ARM32::AssemblerARM32
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/external/v8/src/compiler/arm/ |
D | code-generator-arm.cc | 1225 __ adc(i.OutputRegister(1), i.InputRegister(1), in AssembleArchInstruction() local 1510 __ adc(i.OutputRegister(), i.OutputRegister(), Operand::Zero()); in AssembleArchInstruction() local
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/external/v8/src/compiler/ia32/ |
D | code-generator-ia32.cc | 1107 __ adc(i.OutputRegister(1), Operand(i.InputRegister(3))); in AssembleArchInstruction() local 3828 __ adc(i.InputRegister(1), 0); in AssembleArchInstruction() local 3832 __ adc(i.InputRegister(1), i.OutputRegister(1)); in AssembleArchInstruction() local
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/external/v8/src/ia32/ |
D | assembler-ia32.cc | 815 void Assembler::adc(Register dst, int32_t imm32) { in adc() function in v8::internal::Assembler 820 void Assembler::adc(Register dst, Operand src) { in adc() function in v8::internal::Assembler
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D | assembler-ia32.h | 654 void adc(Register dst, Register src) { adc(dst, Operand(src)); } in adc() function
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/external/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 54 __ adc(w3, w4, w5); in GenerateTestSequenceBase() local 55 __ adc(x6, x7, x8); in GenerateTestSequenceBase() local
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/external/vixl/src/aarch32/ |
D | assembler-aarch32.h | 1883 void adc(Register rd, Register rn, const Operand& operand) { in adc() function 1886 void adc(Condition cond, Register rd, Register rn, const Operand& operand) { in adc() function 1889 void adc(EncodingSize size, in adc() function
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D | assembler-aarch32.cc | 1923 void Assembler::adc(Condition cond, in adc() function in vixl::aarch32::Assembler
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D | disasm-aarch32.cc | 1127 void Disassembler::adc(Condition cond, in adc() function in vixl::aarch32::Disassembler
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/external/v8/src/arm64/ |
D | assembler-arm64.cc | 1163 void Assembler::adc(const Register& rd, in adc() function in v8::internal::Assembler
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/external/v8/src/arm/ |
D | assembler-arm.cc | 1525 void Assembler::adc(Register dst, Register src1, const Operand& src2, in adc() function in v8::internal::Assembler
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/external/vixl/src/aarch64/ |
D | assembler-aarch64.cc | 521 void Assembler::adc(const Register& rd, in adc() function in vixl::aarch64::Assembler
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