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1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
4  *
5  * Adapted from coreboot src/arch/x86/boot/mpspec.c
6  */
7 
8 #include <common.h>
9 #include <cpu.h>
10 #include <dm.h>
11 #include <errno.h>
12 #include <fdtdec.h>
13 #include <asm/cpu.h>
14 #include <asm/irq.h>
15 #include <asm/ioapic.h>
16 #include <asm/lapic.h>
17 #include <asm/mpspec.h>
18 #include <asm/tables.h>
19 #include <dm/uclass-internal.h>
20 
21 DECLARE_GLOBAL_DATA_PTR;
22 
23 static bool isa_irq_occupied[16];
24 
mp_write_floating_table(struct mp_floating_table * mf)25 struct mp_config_table *mp_write_floating_table(struct mp_floating_table *mf)
26 {
27 	ulong mc;
28 
29 	memcpy(mf->mpf_signature, MPF_SIGNATURE, 4);
30 	mf->mpf_physptr = (ulong)mf + sizeof(struct mp_floating_table);
31 	mf->mpf_length = 1;
32 	mf->mpf_spec = MPSPEC_V14;
33 	mf->mpf_checksum = 0;
34 	/* We don't use the default configuration table */
35 	mf->mpf_feature1 = 0;
36 	/* Indicate that virtual wire mode is always implemented */
37 	mf->mpf_feature2 = 0;
38 	mf->mpf_feature3 = 0;
39 	mf->mpf_feature4 = 0;
40 	mf->mpf_feature5 = 0;
41 	mf->mpf_checksum = table_compute_checksum(mf, mf->mpf_length * 16);
42 
43 	mc = (ulong)mf + sizeof(struct mp_floating_table);
44 	return (struct mp_config_table *)mc;
45 }
46 
mp_config_table_init(struct mp_config_table * mc)47 void mp_config_table_init(struct mp_config_table *mc)
48 {
49 	memcpy(mc->mpc_signature, MPC_SIGNATURE, 4);
50 	mc->mpc_length = sizeof(struct mp_config_table);
51 	mc->mpc_spec = MPSPEC_V14;
52 	mc->mpc_checksum = 0;
53 	mc->mpc_oemptr = 0;
54 	mc->mpc_oemsize = 0;
55 	mc->mpc_entry_count = 0;
56 	mc->mpc_lapic = LAPIC_DEFAULT_BASE;
57 	mc->mpe_length = 0;
58 	mc->mpe_checksum = 0;
59 	mc->reserved = 0;
60 
61 	/* The oem/product id fields are exactly 8/12 bytes long */
62 	table_fill_string(mc->mpc_oem, CONFIG_SYS_VENDOR, 8, ' ');
63 	table_fill_string(mc->mpc_product, CONFIG_SYS_BOARD, 12, ' ');
64 }
65 
mp_write_processor(struct mp_config_table * mc)66 void mp_write_processor(struct mp_config_table *mc)
67 {
68 	struct mpc_config_processor *mpc;
69 	struct udevice *dev;
70 	u8 boot_apicid, apicver;
71 	u32 cpusignature, cpufeature;
72 	struct cpuid_result result;
73 
74 	boot_apicid = lapicid();
75 	apicver = lapic_read(LAPIC_LVR) & 0xff;
76 	result = cpuid(1);
77 	cpusignature = result.eax;
78 	cpufeature = result.edx;
79 
80 	for (uclass_find_first_device(UCLASS_CPU, &dev);
81 	     dev;
82 	     uclass_find_next_device(&dev)) {
83 		struct cpu_platdata *plat = dev_get_parent_platdata(dev);
84 		u8 cpuflag = MPC_CPU_EN;
85 
86 		if (!device_active(dev))
87 			continue;
88 
89 		mpc = (struct mpc_config_processor *)mp_next_mpc_entry(mc);
90 		mpc->mpc_type = MP_PROCESSOR;
91 		mpc->mpc_apicid = plat->cpu_id;
92 		mpc->mpc_apicver = apicver;
93 		if (boot_apicid == plat->cpu_id)
94 			cpuflag |= MPC_CPU_BP;
95 		mpc->mpc_cpuflag = cpuflag;
96 		mpc->mpc_cpusignature = cpusignature;
97 		mpc->mpc_cpufeature = cpufeature;
98 		mpc->mpc_reserved[0] = 0;
99 		mpc->mpc_reserved[1] = 0;
100 		mp_add_mpc_entry(mc, sizeof(*mpc));
101 	}
102 }
103 
mp_write_bus(struct mp_config_table * mc,int id,const char * bustype)104 void mp_write_bus(struct mp_config_table *mc, int id, const char *bustype)
105 {
106 	struct mpc_config_bus *mpc;
107 
108 	mpc = (struct mpc_config_bus *)mp_next_mpc_entry(mc);
109 	mpc->mpc_type = MP_BUS;
110 	mpc->mpc_busid = id;
111 	memcpy(mpc->mpc_bustype, bustype, 6);
112 	mp_add_mpc_entry(mc, sizeof(*mpc));
113 }
114 
mp_write_ioapic(struct mp_config_table * mc,int id,int ver,u32 apicaddr)115 void mp_write_ioapic(struct mp_config_table *mc, int id, int ver, u32 apicaddr)
116 {
117 	struct mpc_config_ioapic *mpc;
118 
119 	mpc = (struct mpc_config_ioapic *)mp_next_mpc_entry(mc);
120 	mpc->mpc_type = MP_IOAPIC;
121 	mpc->mpc_apicid = id;
122 	mpc->mpc_apicver = ver;
123 	mpc->mpc_flags = MPC_APIC_USABLE;
124 	mpc->mpc_apicaddr = apicaddr;
125 	mp_add_mpc_entry(mc, sizeof(*mpc));
126 }
127 
mp_write_intsrc(struct mp_config_table * mc,int irqtype,int irqflag,int srcbus,int srcbusirq,int dstapic,int dstirq)128 void mp_write_intsrc(struct mp_config_table *mc, int irqtype, int irqflag,
129 		     int srcbus, int srcbusirq, int dstapic, int dstirq)
130 {
131 	struct mpc_config_intsrc *mpc;
132 
133 	mpc = (struct mpc_config_intsrc *)mp_next_mpc_entry(mc);
134 	mpc->mpc_type = MP_INTSRC;
135 	mpc->mpc_irqtype = irqtype;
136 	mpc->mpc_irqflag = irqflag;
137 	mpc->mpc_srcbus = srcbus;
138 	mpc->mpc_srcbusirq = srcbusirq;
139 	mpc->mpc_dstapic = dstapic;
140 	mpc->mpc_dstirq = dstirq;
141 	mp_add_mpc_entry(mc, sizeof(*mpc));
142 }
143 
mp_write_pci_intsrc(struct mp_config_table * mc,int irqtype,int srcbus,int dev,int pin,int dstapic,int dstirq)144 void mp_write_pci_intsrc(struct mp_config_table *mc, int irqtype,
145 			 int srcbus, int dev, int pin, int dstapic, int dstirq)
146 {
147 	u8 srcbusirq = (dev << 2) | (pin - 1);
148 
149 	mp_write_intsrc(mc, irqtype, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW,
150 			srcbus, srcbusirq, dstapic, dstirq);
151 }
152 
mp_write_lintsrc(struct mp_config_table * mc,int irqtype,int irqflag,int srcbus,int srcbusirq,int destapic,int destlint)153 void mp_write_lintsrc(struct mp_config_table *mc, int irqtype, int irqflag,
154 		      int srcbus, int srcbusirq, int destapic, int destlint)
155 {
156 	struct mpc_config_lintsrc *mpc;
157 
158 	mpc = (struct mpc_config_lintsrc *)mp_next_mpc_entry(mc);
159 	mpc->mpc_type = MP_LINTSRC;
160 	mpc->mpc_irqtype = irqtype;
161 	mpc->mpc_irqflag = irqflag;
162 	mpc->mpc_srcbusid = srcbus;
163 	mpc->mpc_srcbusirq = srcbusirq;
164 	mpc->mpc_destapic = destapic;
165 	mpc->mpc_destlint = destlint;
166 	mp_add_mpc_entry(mc, sizeof(*mpc));
167 }
168 
mp_write_address_space(struct mp_config_table * mc,int busid,int addr_type,u32 addr_base_low,u32 addr_base_high,u32 addr_length_low,u32 addr_length_high)169 void mp_write_address_space(struct mp_config_table *mc,
170 			    int busid, int addr_type,
171 			    u32 addr_base_low, u32 addr_base_high,
172 			    u32 addr_length_low, u32 addr_length_high)
173 {
174 	struct mp_ext_system_address_space *mpe;
175 
176 	mpe = (struct mp_ext_system_address_space *)mp_next_mpe_entry(mc);
177 	mpe->mpe_type = MPE_SYSTEM_ADDRESS_SPACE;
178 	mpe->mpe_length = sizeof(*mpe);
179 	mpe->mpe_busid = busid;
180 	mpe->mpe_addr_type = addr_type;
181 	mpe->mpe_addr_base_low = addr_base_low;
182 	mpe->mpe_addr_base_high = addr_base_high;
183 	mpe->mpe_addr_length_low = addr_length_low;
184 	mpe->mpe_addr_length_high = addr_length_high;
185 	mp_add_mpe_entry(mc, (struct mp_ext_config *)mpe);
186 }
187 
mp_write_bus_hierarchy(struct mp_config_table * mc,int busid,int bus_info,int parent_busid)188 void mp_write_bus_hierarchy(struct mp_config_table *mc,
189 			    int busid, int bus_info, int parent_busid)
190 {
191 	struct mp_ext_bus_hierarchy *mpe;
192 
193 	mpe = (struct mp_ext_bus_hierarchy *)mp_next_mpe_entry(mc);
194 	mpe->mpe_type = MPE_BUS_HIERARCHY;
195 	mpe->mpe_length = sizeof(*mpe);
196 	mpe->mpe_busid = busid;
197 	mpe->mpe_bus_info = bus_info;
198 	mpe->mpe_parent_busid = parent_busid;
199 	mpe->reserved[0] = 0;
200 	mpe->reserved[1] = 0;
201 	mpe->reserved[2] = 0;
202 	mp_add_mpe_entry(mc, (struct mp_ext_config *)mpe);
203 }
204 
mp_write_compat_address_space(struct mp_config_table * mc,int busid,int addr_modifier,u32 range_list)205 void mp_write_compat_address_space(struct mp_config_table *mc, int busid,
206 				   int addr_modifier, u32 range_list)
207 {
208 	struct mp_ext_compat_address_space *mpe;
209 
210 	mpe = (struct mp_ext_compat_address_space *)mp_next_mpe_entry(mc);
211 	mpe->mpe_type = MPE_COMPAT_ADDRESS_SPACE;
212 	mpe->mpe_length = sizeof(*mpe);
213 	mpe->mpe_busid = busid;
214 	mpe->mpe_addr_modifier = addr_modifier;
215 	mpe->mpe_range_list = range_list;
216 	mp_add_mpe_entry(mc, (struct mp_ext_config *)mpe);
217 }
218 
mptable_finalize(struct mp_config_table * mc)219 u32 mptable_finalize(struct mp_config_table *mc)
220 {
221 	ulong end;
222 
223 	mc->mpe_checksum = table_compute_checksum((void *)mp_next_mpc_entry(mc),
224 						  mc->mpe_length);
225 	mc->mpc_checksum = table_compute_checksum(mc, mc->mpc_length);
226 	end = mp_next_mpe_entry(mc);
227 
228 	debug("Write the MP table at: %lx - %lx\n", (ulong)mc, end);
229 
230 	return end;
231 }
232 
mptable_add_isa_interrupts(struct mp_config_table * mc,int bus_isa,int apicid,int external_int2)233 static void mptable_add_isa_interrupts(struct mp_config_table *mc, int bus_isa,
234 				       int apicid, int external_int2)
235 {
236 	int i;
237 
238 	mp_write_intsrc(mc, external_int2 ? MP_INT : MP_EXTINT,
239 			MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH,
240 			bus_isa, 0, apicid, 0);
241 	mp_write_intsrc(mc, MP_INT, MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH,
242 			bus_isa, 1, apicid, 1);
243 	mp_write_intsrc(mc, external_int2 ? MP_EXTINT : MP_INT,
244 			MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH,
245 			bus_isa, 0, apicid, 2);
246 
247 	for (i = 3; i < 16; i++) {
248 		/*
249 		 * Do not write ISA interrupt entry if it is already occupied
250 		 * by the platform devices.
251 		 */
252 		if (isa_irq_occupied[i])
253 			continue;
254 
255 		mp_write_intsrc(mc, MP_INT,
256 				MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH,
257 				bus_isa, i, apicid, i);
258 	}
259 }
260 
261 /*
262  * Check duplicated I/O interrupt assignment table entry, to make sure
263  * there is only one entry with the given bus, device and interrupt pin.
264  */
check_dup_entry(struct mpc_config_intsrc * intsrc_base,int entry_num,int bus,int device,int pin)265 static bool check_dup_entry(struct mpc_config_intsrc *intsrc_base,
266 			    int entry_num, int bus, int device, int pin)
267 {
268 	struct mpc_config_intsrc *intsrc = intsrc_base;
269 	int i;
270 
271 	for (i = 0; i < entry_num; i++) {
272 		if (intsrc->mpc_srcbus == bus &&
273 		    intsrc->mpc_srcbusirq == ((device << 2) | (pin - 1)))
274 			break;
275 		intsrc++;
276 	}
277 
278 	return (i == entry_num) ? false : true;
279 }
280 
281 /* TODO: move this to driver model */
mp_determine_pci_dstirq(int bus,int dev,int func,int pirq)282 __weak int mp_determine_pci_dstirq(int bus, int dev, int func, int pirq)
283 {
284 	/* PIRQ[A-H] are connected to I/O APIC INTPIN#16-23 */
285 	return pirq + 16;
286 }
287 
mptable_add_intsrc(struct mp_config_table * mc,int bus_isa,int apicid)288 static int mptable_add_intsrc(struct mp_config_table *mc,
289 			      int bus_isa, int apicid)
290 {
291 	struct mpc_config_intsrc *intsrc_base;
292 	int intsrc_entries = 0;
293 	const void *blob = gd->fdt_blob;
294 	struct udevice *dev;
295 	int len, count;
296 	const u32 *cell;
297 	int i, ret;
298 
299 	ret = uclass_first_device_err(UCLASS_IRQ, &dev);
300 	if (ret && ret != -ENODEV) {
301 		debug("%s: Cannot find irq router node\n", __func__);
302 		return ret;
303 	}
304 
305 	/* Get I/O interrupt information from device tree */
306 	cell = fdt_getprop(blob, dev_of_offset(dev), "intel,pirq-routing",
307 			   &len);
308 	if (!cell)
309 		return -ENOENT;
310 
311 	if ((len % sizeof(struct pirq_routing)) == 0)
312 		count = len / sizeof(struct pirq_routing);
313 	else
314 		return -EINVAL;
315 
316 	intsrc_base = (struct mpc_config_intsrc *)mp_next_mpc_entry(mc);
317 
318 	for (i = 0; i < count; i++) {
319 		struct pirq_routing pr;
320 		int bus, dev, func;
321 		int dstirq;
322 
323 		pr.bdf = fdt_addr_to_cpu(cell[0]);
324 		pr.pin = fdt_addr_to_cpu(cell[1]);
325 		pr.pirq = fdt_addr_to_cpu(cell[2]);
326 		bus = PCI_BUS(pr.bdf);
327 		dev = PCI_DEV(pr.bdf);
328 		func = PCI_FUNC(pr.bdf);
329 
330 		if (check_dup_entry(intsrc_base, intsrc_entries,
331 				    bus, dev, pr.pin)) {
332 			debug("found entry for bus %d device %d INT%c, skipping\n",
333 			      bus, dev, 'A' + pr.pin - 1);
334 			cell += sizeof(struct pirq_routing) / sizeof(u32);
335 			continue;
336 		}
337 
338 		dstirq = mp_determine_pci_dstirq(bus, dev, func, pr.pirq);
339 		/*
340 		 * For PIRQ which is connected to I/O APIC interrupt pin#0-15,
341 		 * mark it as occupied so that we can skip it later.
342 		 */
343 		if (dstirq < 16)
344 			isa_irq_occupied[dstirq] = true;
345 		mp_write_pci_intsrc(mc, MP_INT, bus, dev, pr.pin,
346 				    apicid, dstirq);
347 		intsrc_entries++;
348 		cell += sizeof(struct pirq_routing) / sizeof(u32);
349 	}
350 
351 	/* Legacy Interrupts */
352 	debug("Writing ISA IRQs\n");
353 	mptable_add_isa_interrupts(mc, bus_isa, apicid, 0);
354 
355 	return 0;
356 }
357 
mptable_add_lintsrc(struct mp_config_table * mc,int bus_isa)358 static void mptable_add_lintsrc(struct mp_config_table *mc, int bus_isa)
359 {
360 	mp_write_lintsrc(mc, MP_EXTINT,
361 			 MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH,
362 			 bus_isa, 0, MP_APIC_ALL, 0);
363 	mp_write_lintsrc(mc, MP_NMI,
364 			 MP_IRQ_TRIGGER_EDGE | MP_IRQ_POLARITY_HIGH,
365 			 bus_isa, 0, MP_APIC_ALL, 1);
366 }
367 
write_mp_table(ulong addr)368 ulong write_mp_table(ulong addr)
369 {
370 	struct mp_config_table *mc;
371 	int ioapic_id, ioapic_ver;
372 	int bus_isa = 0xff;
373 	int ret;
374 	ulong end;
375 
376 	/* 16 byte align the table address */
377 	addr = ALIGN(addr, 16);
378 
379 	/* Write floating table */
380 	mc = mp_write_floating_table((struct mp_floating_table *)addr);
381 
382 	/* Write configuration table header */
383 	mp_config_table_init(mc);
384 
385 	/* Write processor entry */
386 	mp_write_processor(mc);
387 
388 	/* Write bus entry */
389 	mp_write_bus(mc, bus_isa, BUSTYPE_ISA);
390 
391 	/* Write I/O APIC entry */
392 	ioapic_id = io_apic_read(IO_APIC_ID) >> 24;
393 	ioapic_ver = io_apic_read(IO_APIC_VER) & 0xff;
394 	mp_write_ioapic(mc, ioapic_id, ioapic_ver, IO_APIC_ADDR);
395 
396 	/* Write I/O interrupt assignment entry */
397 	ret = mptable_add_intsrc(mc, bus_isa, ioapic_id);
398 	if (ret)
399 		debug("Failed to write I/O interrupt assignment table\n");
400 
401 	/* Write local interrupt assignment entry */
402 	mptable_add_lintsrc(mc, bus_isa);
403 
404 	/* Finalize the MP table */
405 	end = mptable_finalize(mc);
406 
407 	return end;
408 }
409