| /external/u-boot/drivers/pinctrl/mvebu/ |
| D | pinctrl-mvebu.h | 23 void *base_reg; member
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| /external/u-boot/drivers/pinctrl/broadcom/ |
| D | pinctrl-bcm283x.c | 26 u32 *base_reg; member
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| /external/mesa3d/src/intel/compiler/ |
| D | brw_fs_reg_allocate.cpp | 217 for (int base_reg = j; in brw_alloc_reg_set() local
231 for (int base_reg = j; in brw_alloc_reg_set() local
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| D | brw_vec4_reg_allocate.cpp | 138 for (int base_reg = j; in brw_vec4_alloc_reg_set() local
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| /external/v8/src/x64/ |
| D | macro-assembler-x64.h | 75 : base_reg_(base_reg), in base_reg_() argument
86 : base_reg_(base_reg), in base_reg_() argument
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| D | code-stubs-x64.cc | 273 Register base_reg = r15; in CallApiFunctionAndReturn() local
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| D | disasm-x64.cc | 340 int base_reg(int low_bits) { return low_bits | ((rex_ & 0x01) << 3); } in base_reg() function in disasm::DisassemblerX64
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| D | macro-assembler-x64.cc | 55 Register base_reg, const ParameterCount& parameter_count, in StackArgumentsAccessor()
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| D | assembler-x64.cc | 209 int base_reg = (has_sib ? operand.data().buf[1] : modrm) & 0x07; in OperandBuilder() local
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| /external/mesa3d/src/amd/vulkan/ |
| D | radv_cmd_buffer.c | 582 uint32_t base_reg = pipeline->user_data_0[stage]; in radv_emit_userdata_address() local
610 uint32_t base_reg = pipeline->user_data_0[MESA_SHADER_FRAGMENT]; in radv_update_multisample_state() local
875 uint32_t base_reg = pipeline->user_data_0[MESA_SHADER_TESS_CTRL]; in radv_emit_tess_shaders() local
888 uint32_t base_reg = pipeline->user_data_0[MESA_SHADER_TESS_EVAL]; in radv_emit_tess_shaders() local
898 uint32_t base_reg = pipeline->user_data_0[MESA_SHADER_VERTEX]; in radv_emit_tess_shaders() local
1669 uint32_t base_reg = pipeline->user_data_0[stage]; in emit_stage_descriptor_set_userdata() local
3167 uint32_t base_reg = pipeline->user_data_0[stage]; in radv_emit_view_index() local
3174 uint32_t base_reg = R_00B130_SPI_SHADER_USER_DATA_VS_0; in radv_emit_view_index() local
3214 uint32_t base_reg = cmd_buffer->state.pipeline->graphics.vtx_base_sgpr; in radv_cs_emit_indirect_draw_packet() local
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| /external/mesa3d/src/mesa/drivers/dri/radeon/ |
| D | radeon_state_init.c | 426 uint32_t base_reg; in cube_emit_cs() local
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| /external/u-boot/arch/arm/mach-tegra/ |
| D | clock.c | 590 u32 base_reg, misc_reg; in clock_set_rate() local
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| /external/mesa3d/src/util/ |
| D | register_allocate.c | 270 unsigned int base_reg, unsigned int reg) in ra_add_transitive_reg_conflict()
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| /external/pcre/dist2/src/sljit/ |
| D | sljitNativeARM_32.c | 891 #define EMIT_DATA_TRANSFER(type, add, target_reg, base_reg, arg) \ argument
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| /external/v8/src/interpreter/ |
| D | interpreter-assembler.cc | 276 Node* base_reg = RegisterLocation( in GetRegisterListAtOperandIndex() local
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| /external/v8/src/compiler/mips64/ |
| D | code-generator-mips64.cc | 859 Register base_reg = offset.from_stack_pointer() ? sp : fp; in AssembleArchInstruction() local
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| /external/v8/src/compiler/mips/ |
| D | code-generator-mips.cc | 839 Register base_reg = offset.from_stack_pointer() ? sp : fp; in AssembleArchInstruction() local
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| /external/pcre/dist2/src/ |
| D | pcre2_jit_compile.c | 2131 int from_sp, base_reg, offset, i; in copy_recurse_data() local
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| /external/v8/src/s390/ |
| D | simulator-s390.cc | 2807 #define GET_ADDRESS(index_reg, base_reg, offset) \ argument
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