| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/SVE/ |
| D | bics-diagnostics.s | 6 bics p0.h, p0/z, p0.h, p1.h label
11 bics p0.s, p0/z, p0.s, p1.s label
16 bics p0.d, p0/z, p0.d, p1.d label
24 bics p0.b, p0/m, p1.b, p2.b label
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| D | bics.s | 10 bics p0.b, p0/z, p0.b, p0.b label
16 bics p15.b, p15/z, p15.b, p15.b label
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 74 __ bics(w3, w4, w5); in GenerateTestSequenceBase() local
75 __ bics(x6, x7, x8); in GenerateTestSequenceBase() local
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| D | test-assembler-aarch64.cc | 1125 TEST(bics) { in TEST() argument
15241 __ bics(xzr, x3, ~0xf); in TEST() local
15242 __ bics(xzr, xzr, ~0xf); in TEST() local
15243 __ bics(xzr, x0, x3); in TEST() local
15244 __ bics(xzr, x3, xzr); in TEST() local
15245 __ bics(xzr, xzr, x3); in TEST() local
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 2089 void bics(Register rd, Register rn, const Operand& operand) { in bics() function
2092 void bics(Condition cond, Register rd, Register rn, const Operand& operand) { in bics() function
2095 void bics(EncodingSize size, in bics() function
|
| D | assembler-aarch32.cc | 3338 void Assembler::bics(Condition cond, in bics() function in vixl::aarch32::Assembler
|
| D | disasm-aarch32.cc | 1310 void Disassembler::bics(Condition cond, in bics() function in vixl::aarch32::Disassembler
|
| /external/v8/src/arm64/ |
| D | assembler-arm64.cc | 1231 void Assembler::bics(const Register& rd, in bics() function in v8::internal::Assembler
|
| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.cc | 588 void Assembler::bics(const Register& rd, in bics() function in vixl::aarch64::Assembler
|
| /external/vixl/test/aarch32/ |
| D | test-assembler-aarch32.cc | 990 TEST(bics) { in TEST() argument
|