1 /*
2 * Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 * Intel funded Tungsten Graphics to
4 * develop this 3D driver.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial
16 * portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 */
26 #include "brw_context.h"
27 #include "brw_wm.h"
28 #include "brw_state.h"
29 #include "main/enums.h"
30 #include "main/formats.h"
31 #include "main/fbobject.h"
32 #include "main/samplerobj.h"
33 #include "main/framebuffer.h"
34 #include "program/prog_parameter.h"
35 #include "program/program.h"
36 #include "intel_mipmap_tree.h"
37 #include "intel_image.h"
38 #include "compiler/brw_nir.h"
39 #include "brw_program.h"
40
41 #include "util/ralloc.h"
42
43 static void
assign_fs_binding_table_offsets(const struct gen_device_info * devinfo,const struct gl_program * prog,const struct brw_wm_prog_key * key,struct brw_wm_prog_data * prog_data)44 assign_fs_binding_table_offsets(const struct gen_device_info *devinfo,
45 const struct gl_program *prog,
46 const struct brw_wm_prog_key *key,
47 struct brw_wm_prog_data *prog_data)
48 {
49 /* Render targets implicitly start at surface index 0. Even if there are
50 * no color regions, we still perform an FB write to a null render target,
51 * which will be surface 0.
52 */
53 uint32_t next_binding_table_offset = MAX2(key->nr_color_regions, 1);
54
55 next_binding_table_offset =
56 brw_assign_common_binding_table_offsets(devinfo, prog, &prog_data->base,
57 next_binding_table_offset);
58
59 if (prog->nir->info.outputs_read && !key->coherent_fb_fetch) {
60 prog_data->binding_table.render_target_read_start =
61 next_binding_table_offset;
62 next_binding_table_offset += key->nr_color_regions;
63 }
64 }
65
66 static void
brw_wm_debug_recompile(struct brw_context * brw,struct gl_program * prog,const struct brw_wm_prog_key * key)67 brw_wm_debug_recompile(struct brw_context *brw, struct gl_program *prog,
68 const struct brw_wm_prog_key *key)
69 {
70 perf_debug("Recompiling fragment shader for program %d\n", prog->Id);
71
72 bool found = false;
73 const struct brw_wm_prog_key *old_key =
74 brw_find_previous_compile(&brw->cache, BRW_CACHE_FS_PROG,
75 key->program_string_id);
76
77 if (!old_key) {
78 perf_debug(" Didn't find previous compile in the shader cache for debug\n");
79 return;
80 }
81
82 found |= key_debug(brw, "alphatest, computed depth, depth test, or "
83 "depth write",
84 old_key->iz_lookup, key->iz_lookup);
85 found |= key_debug(brw, "depth statistics",
86 old_key->stats_wm, key->stats_wm);
87 found |= key_debug(brw, "flat shading",
88 old_key->flat_shade, key->flat_shade);
89 found |= key_debug(brw, "number of color buffers",
90 old_key->nr_color_regions, key->nr_color_regions);
91 found |= key_debug(brw, "MRT alpha test or alpha-to-coverage",
92 old_key->replicate_alpha, key->replicate_alpha);
93 found |= key_debug(brw, "fragment color clamping",
94 old_key->clamp_fragment_color, key->clamp_fragment_color);
95 found |= key_debug(brw, "per-sample interpolation",
96 old_key->persample_interp, key->persample_interp);
97 found |= key_debug(brw, "multisampled FBO",
98 old_key->multisample_fbo, key->multisample_fbo);
99 found |= key_debug(brw, "frag coord adds sample pos",
100 old_key->frag_coord_adds_sample_pos,
101 key->frag_coord_adds_sample_pos);
102 found |= key_debug(brw, "line smoothing",
103 old_key->line_aa, key->line_aa);
104 found |= key_debug(brw, "high quality derivatives",
105 old_key->high_quality_derivatives,
106 key->high_quality_derivatives);
107 found |= key_debug(brw, "force dual color blending",
108 old_key->force_dual_color_blend,
109 key->force_dual_color_blend);
110 found |= key_debug(brw, "coherent fb fetch",
111 old_key->coherent_fb_fetch, key->coherent_fb_fetch);
112
113 found |= key_debug(brw, "input slots valid",
114 old_key->input_slots_valid, key->input_slots_valid);
115 found |= key_debug(brw, "mrt alpha test function",
116 old_key->alpha_test_func, key->alpha_test_func);
117 found |= key_debug(brw, "mrt alpha test reference value",
118 old_key->alpha_test_ref, key->alpha_test_ref);
119
120 found |= brw_debug_recompile_sampler_key(brw, &old_key->tex, &key->tex);
121
122 if (!found) {
123 perf_debug(" Something else\n");
124 }
125 }
126
127 static bool
brw_codegen_wm_prog(struct brw_context * brw,struct brw_program * fp,struct brw_wm_prog_key * key,struct brw_vue_map * vue_map)128 brw_codegen_wm_prog(struct brw_context *brw,
129 struct brw_program *fp,
130 struct brw_wm_prog_key *key,
131 struct brw_vue_map *vue_map)
132 {
133 const struct gen_device_info *devinfo = &brw->screen->devinfo;
134 void *mem_ctx = ralloc_context(NULL);
135 struct brw_wm_prog_data prog_data;
136 const GLuint *program;
137 bool start_busy = false;
138 double start_time = 0;
139
140 memset(&prog_data, 0, sizeof(prog_data));
141
142 /* Use ALT floating point mode for ARB programs so that 0^0 == 1. */
143 if (fp->program.is_arb_asm)
144 prog_data.base.use_alt_mode = true;
145
146 assign_fs_binding_table_offsets(devinfo, &fp->program, key, &prog_data);
147
148 if (!fp->program.is_arb_asm) {
149 brw_nir_setup_glsl_uniforms(mem_ctx, fp->program.nir, &fp->program,
150 &prog_data.base, true);
151 brw_nir_analyze_ubo_ranges(brw->screen->compiler, fp->program.nir,
152 prog_data.base.ubo_ranges);
153 } else {
154 brw_nir_setup_arb_uniforms(mem_ctx, fp->program.nir, &fp->program,
155 &prog_data.base);
156
157 if (unlikely(INTEL_DEBUG & DEBUG_WM))
158 brw_dump_arb_asm("fragment", &fp->program);
159 }
160
161 if (unlikely(brw->perf_debug)) {
162 start_busy = (brw->batch.last_bo &&
163 brw_bo_busy(brw->batch.last_bo));
164 start_time = get_time();
165 }
166
167 int st_index8 = -1, st_index16 = -1;
168 if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
169 st_index8 = brw_get_shader_time_index(brw, &fp->program, ST_FS8,
170 !fp->program.is_arb_asm);
171 st_index16 = brw_get_shader_time_index(brw, &fp->program, ST_FS16,
172 !fp->program.is_arb_asm);
173 }
174
175 char *error_str = NULL;
176 program = brw_compile_fs(brw->screen->compiler, brw, mem_ctx,
177 key, &prog_data, fp->program.nir,
178 &fp->program, st_index8, st_index16,
179 true, false, vue_map,
180 &error_str);
181
182 if (program == NULL) {
183 if (!fp->program.is_arb_asm) {
184 fp->program.sh.data->LinkStatus = linking_failure;
185 ralloc_strcat(&fp->program.sh.data->InfoLog, error_str);
186 }
187
188 _mesa_problem(NULL, "Failed to compile fragment shader: %s\n", error_str);
189
190 ralloc_free(mem_ctx);
191 return false;
192 }
193
194 if (unlikely(brw->perf_debug)) {
195 if (fp->compiled_once)
196 brw_wm_debug_recompile(brw, &fp->program, key);
197 fp->compiled_once = true;
198
199 if (start_busy && !brw_bo_busy(brw->batch.last_bo)) {
200 perf_debug("FS compile took %.03f ms and stalled the GPU\n",
201 (get_time() - start_time) * 1000);
202 }
203 }
204
205 brw_alloc_stage_scratch(brw, &brw->wm.base, prog_data.base.total_scratch);
206
207 if (unlikely((INTEL_DEBUG & DEBUG_WM) && fp->program.is_arb_asm))
208 fprintf(stderr, "\n");
209
210 /* The param and pull_param arrays will be freed by the shader cache. */
211 ralloc_steal(NULL, prog_data.base.param);
212 ralloc_steal(NULL, prog_data.base.pull_param);
213 brw_upload_cache(&brw->cache, BRW_CACHE_FS_PROG,
214 key, sizeof(struct brw_wm_prog_key),
215 program, prog_data.base.program_size,
216 &prog_data, sizeof(prog_data),
217 &brw->wm.base.prog_offset, &brw->wm.base.prog_data);
218
219 ralloc_free(mem_ctx);
220
221 return true;
222 }
223
224 bool
brw_debug_recompile_sampler_key(struct brw_context * brw,const struct brw_sampler_prog_key_data * old_key,const struct brw_sampler_prog_key_data * key)225 brw_debug_recompile_sampler_key(struct brw_context *brw,
226 const struct brw_sampler_prog_key_data *old_key,
227 const struct brw_sampler_prog_key_data *key)
228 {
229 bool found = false;
230
231 for (unsigned int i = 0; i < MAX_SAMPLERS; i++) {
232 found |= key_debug(brw, "EXT_texture_swizzle or DEPTH_TEXTURE_MODE",
233 old_key->swizzles[i], key->swizzles[i]);
234 }
235 found |= key_debug(brw, "GL_CLAMP enabled on any texture unit's 1st coordinate",
236 old_key->gl_clamp_mask[0], key->gl_clamp_mask[0]);
237 found |= key_debug(brw, "GL_CLAMP enabled on any texture unit's 2nd coordinate",
238 old_key->gl_clamp_mask[1], key->gl_clamp_mask[1]);
239 found |= key_debug(brw, "GL_CLAMP enabled on any texture unit's 3rd coordinate",
240 old_key->gl_clamp_mask[2], key->gl_clamp_mask[2]);
241 found |= key_debug(brw, "gather channel quirk on any texture unit",
242 old_key->gather_channel_quirk_mask, key->gather_channel_quirk_mask);
243 found |= key_debug(brw, "compressed multisample layout",
244 old_key->compressed_multisample_layout_mask,
245 key->compressed_multisample_layout_mask);
246 found |= key_debug(brw, "16x msaa",
247 old_key->msaa_16,
248 key->msaa_16);
249
250 found |= key_debug(brw, "y_uv image bound",
251 old_key->y_uv_image_mask,
252 key->y_uv_image_mask);
253 found |= key_debug(brw, "y_u_v image bound",
254 old_key->y_u_v_image_mask,
255 key->y_u_v_image_mask);
256 found |= key_debug(brw, "yx_xuxv image bound",
257 old_key->yx_xuxv_image_mask,
258 key->yx_xuxv_image_mask);
259 found |= key_debug(brw, "xy_uxvx image bound",
260 old_key->xy_uxvx_image_mask,
261 key->xy_uxvx_image_mask);
262
263
264 for (unsigned int i = 0; i < MAX_SAMPLERS; i++) {
265 found |= key_debug(brw, "textureGather workarounds",
266 old_key->gen6_gather_wa[i], key->gen6_gather_wa[i]);
267 }
268
269 return found;
270 }
271
272 static uint8_t
gen6_gather_workaround(GLenum internalformat)273 gen6_gather_workaround(GLenum internalformat)
274 {
275 switch (internalformat) {
276 case GL_R8I: return WA_SIGN | WA_8BIT;
277 case GL_R8UI: return WA_8BIT;
278 case GL_R16I: return WA_SIGN | WA_16BIT;
279 case GL_R16UI: return WA_16BIT;
280 default:
281 /* Note that even though GL_R32I and GL_R32UI have format overrides in
282 * the surface state, there is no shader w/a required.
283 */
284 return 0;
285 }
286 }
287
288 void
brw_populate_sampler_prog_key_data(struct gl_context * ctx,const struct gl_program * prog,struct brw_sampler_prog_key_data * key)289 brw_populate_sampler_prog_key_data(struct gl_context *ctx,
290 const struct gl_program *prog,
291 struct brw_sampler_prog_key_data *key)
292 {
293 struct brw_context *brw = brw_context(ctx);
294 const struct gen_device_info *devinfo = &brw->screen->devinfo;
295 GLbitfield mask = prog->SamplersUsed;
296
297 while (mask) {
298 const int s = u_bit_scan(&mask);
299
300 key->swizzles[s] = SWIZZLE_NOOP;
301
302 int unit_id = prog->SamplerUnits[s];
303 const struct gl_texture_unit *unit = &ctx->Texture.Unit[unit_id];
304
305 if (unit->_Current && unit->_Current->Target != GL_TEXTURE_BUFFER) {
306 const struct gl_texture_object *t = unit->_Current;
307 const struct gl_texture_image *img = t->Image[0][t->BaseLevel];
308 struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit_id);
309
310 const bool alpha_depth = t->DepthMode == GL_ALPHA &&
311 (img->_BaseFormat == GL_DEPTH_COMPONENT ||
312 img->_BaseFormat == GL_DEPTH_STENCIL);
313
314 /* Haswell handles texture swizzling as surface format overrides
315 * (except for GL_ALPHA); all other platforms need MOVs in the shader.
316 */
317 if (alpha_depth || (devinfo->gen < 8 && !devinfo->is_haswell))
318 key->swizzles[s] = brw_get_texture_swizzle(ctx, t);
319
320 if (devinfo->gen < 8 &&
321 sampler->MinFilter != GL_NEAREST &&
322 sampler->MagFilter != GL_NEAREST) {
323 if (sampler->WrapS == GL_CLAMP)
324 key->gl_clamp_mask[0] |= 1 << s;
325 if (sampler->WrapT == GL_CLAMP)
326 key->gl_clamp_mask[1] |= 1 << s;
327 if (sampler->WrapR == GL_CLAMP)
328 key->gl_clamp_mask[2] |= 1 << s;
329 }
330
331 /* gather4 for RG32* is broken in multiple ways on Gen7. */
332 if (devinfo->gen == 7 && prog->info.uses_texture_gather) {
333 switch (img->InternalFormat) {
334 case GL_RG32I:
335 case GL_RG32UI: {
336 /* We have to override the format to R32G32_FLOAT_LD.
337 * This means that SCS_ALPHA and SCS_ONE will return 0x3f8
338 * (1.0) rather than integer 1. This needs shader hacks.
339 *
340 * On Ivybridge, we whack W (alpha) to ONE in our key's
341 * swizzle. On Haswell, we look at the original texture
342 * swizzle, and use XYZW with channels overridden to ONE,
343 * leaving normal texture swizzling to SCS.
344 */
345 unsigned src_swizzle =
346 devinfo->is_haswell ? t->_Swizzle : key->swizzles[s];
347 for (int i = 0; i < 4; i++) {
348 unsigned src_comp = GET_SWZ(src_swizzle, i);
349 if (src_comp == SWIZZLE_ONE || src_comp == SWIZZLE_W) {
350 key->swizzles[i] &= ~(0x7 << (3 * i));
351 key->swizzles[i] |= SWIZZLE_ONE << (3 * i);
352 }
353 }
354 /* fallthrough */
355 }
356 case GL_RG32F:
357 /* The channel select for green doesn't work - we have to
358 * request blue. Haswell can use SCS for this, but Ivybridge
359 * needs a shader workaround.
360 */
361 if (!devinfo->is_haswell)
362 key->gather_channel_quirk_mask |= 1 << s;
363 break;
364 }
365 }
366
367 /* Gen6's gather4 is broken for UINT/SINT; we treat them as
368 * UNORM/FLOAT instead and fix it in the shader.
369 */
370 if (devinfo->gen == 6 && prog->info.uses_texture_gather) {
371 key->gen6_gather_wa[s] = gen6_gather_workaround(img->InternalFormat);
372 }
373
374 /* If this is a multisample sampler, and uses the CMS MSAA layout,
375 * then we need to emit slightly different code to first sample the
376 * MCS surface.
377 */
378 struct intel_texture_object *intel_tex =
379 intel_texture_object((struct gl_texture_object *)t);
380
381 /* From gen9 onwards some single sampled buffers can also be
382 * compressed. These don't need ld2dms sampling along with mcs fetch.
383 */
384 if (intel_tex->mt->aux_usage == ISL_AUX_USAGE_MCS) {
385 assert(devinfo->gen >= 7);
386 assert(intel_tex->mt->surf.samples > 1);
387 assert(intel_tex->mt->mcs_buf);
388 assert(intel_tex->mt->surf.msaa_layout == ISL_MSAA_LAYOUT_ARRAY);
389 key->compressed_multisample_layout_mask |= 1 << s;
390
391 if (intel_tex->mt->surf.samples >= 16) {
392 assert(devinfo->gen >= 9);
393 key->msaa_16 |= 1 << s;
394 }
395 }
396
397 if (t->Target == GL_TEXTURE_EXTERNAL_OES && intel_tex->planar_format) {
398 switch (intel_tex->planar_format->components) {
399 case __DRI_IMAGE_COMPONENTS_Y_UV:
400 key->y_uv_image_mask |= 1 << s;
401 break;
402 case __DRI_IMAGE_COMPONENTS_Y_U_V:
403 key->y_u_v_image_mask |= 1 << s;
404 break;
405 case __DRI_IMAGE_COMPONENTS_Y_XUXV:
406 key->yx_xuxv_image_mask |= 1 << s;
407 break;
408 case __DRI_IMAGE_COMPONENTS_Y_UXVX:
409 key->xy_uxvx_image_mask |= 1 << s;
410 break;
411 default:
412 break;
413 }
414 }
415
416 }
417 }
418 }
419
420 static bool
brw_wm_state_dirty(const struct brw_context * brw)421 brw_wm_state_dirty(const struct brw_context *brw)
422 {
423 return brw_state_dirty(brw,
424 _NEW_BUFFERS |
425 _NEW_COLOR |
426 _NEW_DEPTH |
427 _NEW_FRAG_CLAMP |
428 _NEW_HINT |
429 _NEW_LIGHT |
430 _NEW_LINE |
431 _NEW_MULTISAMPLE |
432 _NEW_POLYGON |
433 _NEW_STENCIL |
434 _NEW_TEXTURE,
435 BRW_NEW_FRAGMENT_PROGRAM |
436 BRW_NEW_REDUCED_PRIMITIVE |
437 BRW_NEW_STATS_WM |
438 BRW_NEW_VUE_MAP_GEOM_OUT);
439 }
440
441 void
brw_wm_populate_key(struct brw_context * brw,struct brw_wm_prog_key * key)442 brw_wm_populate_key(struct brw_context *brw, struct brw_wm_prog_key *key)
443 {
444 const struct gen_device_info *devinfo = &brw->screen->devinfo;
445 struct gl_context *ctx = &brw->ctx;
446 /* BRW_NEW_FRAGMENT_PROGRAM */
447 const struct gl_program *prog = brw->programs[MESA_SHADER_FRAGMENT];
448 const struct brw_program *fp = brw_program_const(prog);
449 GLuint lookup = 0;
450 GLuint line_aa;
451
452 memset(key, 0, sizeof(*key));
453
454 /* Build the index for table lookup
455 */
456 if (devinfo->gen < 6) {
457 /* _NEW_COLOR */
458 if (prog->info.fs.uses_discard || ctx->Color.AlphaEnabled) {
459 lookup |= BRW_WM_IZ_PS_KILL_ALPHATEST_BIT;
460 }
461
462 if (prog->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) {
463 lookup |= BRW_WM_IZ_PS_COMPUTES_DEPTH_BIT;
464 }
465
466 /* _NEW_DEPTH */
467 if (ctx->Depth.Test)
468 lookup |= BRW_WM_IZ_DEPTH_TEST_ENABLE_BIT;
469
470 if (brw_depth_writes_enabled(brw))
471 lookup |= BRW_WM_IZ_DEPTH_WRITE_ENABLE_BIT;
472
473 /* _NEW_STENCIL | _NEW_BUFFERS */
474 if (brw->stencil_enabled) {
475 lookup |= BRW_WM_IZ_STENCIL_TEST_ENABLE_BIT;
476
477 if (ctx->Stencil.WriteMask[0] ||
478 ctx->Stencil.WriteMask[ctx->Stencil._BackFace])
479 lookup |= BRW_WM_IZ_STENCIL_WRITE_ENABLE_BIT;
480 }
481 key->iz_lookup = lookup;
482 }
483
484 line_aa = BRW_WM_AA_NEVER;
485
486 /* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
487 if (ctx->Line.SmoothFlag) {
488 if (brw->reduced_primitive == GL_LINES) {
489 line_aa = BRW_WM_AA_ALWAYS;
490 }
491 else if (brw->reduced_primitive == GL_TRIANGLES) {
492 if (ctx->Polygon.FrontMode == GL_LINE) {
493 line_aa = BRW_WM_AA_SOMETIMES;
494
495 if (ctx->Polygon.BackMode == GL_LINE ||
496 (ctx->Polygon.CullFlag &&
497 ctx->Polygon.CullFaceMode == GL_BACK))
498 line_aa = BRW_WM_AA_ALWAYS;
499 }
500 else if (ctx->Polygon.BackMode == GL_LINE) {
501 line_aa = BRW_WM_AA_SOMETIMES;
502
503 if ((ctx->Polygon.CullFlag &&
504 ctx->Polygon.CullFaceMode == GL_FRONT))
505 line_aa = BRW_WM_AA_ALWAYS;
506 }
507 }
508 }
509
510 key->line_aa = line_aa;
511
512 /* _NEW_HINT */
513 key->high_quality_derivatives =
514 prog->info.uses_fddx_fddy &&
515 ctx->Hint.FragmentShaderDerivative == GL_NICEST;
516
517 if (devinfo->gen < 6)
518 key->stats_wm = brw->stats_wm;
519
520 /* _NEW_LIGHT */
521 key->flat_shade =
522 (prog->info.inputs_read & (VARYING_BIT_COL0 | VARYING_BIT_COL1)) &&
523 (ctx->Light.ShadeModel == GL_FLAT);
524
525 /* _NEW_FRAG_CLAMP | _NEW_BUFFERS */
526 key->clamp_fragment_color = ctx->Color._ClampFragmentColor;
527
528 /* _NEW_TEXTURE */
529 brw_populate_sampler_prog_key_data(ctx, prog, &key->tex);
530
531 /* _NEW_BUFFERS */
532 key->nr_color_regions = ctx->DrawBuffer->_NumColorDrawBuffers;
533
534 /* _NEW_COLOR */
535 key->force_dual_color_blend = brw->dual_color_blend_by_location &&
536 (ctx->Color.BlendEnabled & 1) && ctx->Color.Blend[0]._UsesDualSrc;
537
538 /* _NEW_MULTISAMPLE, _NEW_COLOR, _NEW_BUFFERS */
539 key->replicate_alpha = ctx->DrawBuffer->_NumColorDrawBuffers > 1 &&
540 (_mesa_is_alpha_test_enabled(ctx) ||
541 _mesa_is_alpha_to_coverage_enabled(ctx));
542
543 /* _NEW_BUFFERS _NEW_MULTISAMPLE */
544 /* Ignore sample qualifier while computing this flag. */
545 if (ctx->Multisample.Enabled) {
546 key->persample_interp =
547 ctx->Multisample.SampleShading &&
548 (ctx->Multisample.MinSampleShadingValue *
549 _mesa_geometric_samples(ctx->DrawBuffer) > 1);
550
551 key->multisample_fbo = _mesa_geometric_samples(ctx->DrawBuffer) > 1;
552 }
553
554 /* BRW_NEW_VUE_MAP_GEOM_OUT */
555 if (devinfo->gen < 6 || _mesa_bitcount_64(prog->info.inputs_read &
556 BRW_FS_VARYING_INPUT_MASK) > 16) {
557 key->input_slots_valid = brw->vue_map_geom_out.slots_valid;
558 }
559
560 /* _NEW_COLOR | _NEW_BUFFERS */
561 /* Pre-gen6, the hardware alpha test always used each render
562 * target's alpha to do alpha test, as opposed to render target 0's alpha
563 * like GL requires. Fix that by building the alpha test into the
564 * shader, and we'll skip enabling the fixed function alpha test.
565 */
566 if (devinfo->gen < 6 && ctx->DrawBuffer->_NumColorDrawBuffers > 1 &&
567 ctx->Color.AlphaEnabled) {
568 key->alpha_test_func = ctx->Color.AlphaFunc;
569 key->alpha_test_ref = ctx->Color.AlphaRef;
570 }
571
572 /* The unique fragment program ID */
573 key->program_string_id = fp->id;
574
575 /* Whether reads from the framebuffer should behave coherently. */
576 key->coherent_fb_fetch = ctx->Extensions.MESA_shader_framebuffer_fetch;
577 }
578
579 void
brw_upload_wm_prog(struct brw_context * brw)580 brw_upload_wm_prog(struct brw_context *brw)
581 {
582 struct brw_wm_prog_key key;
583 struct brw_program *fp =
584 (struct brw_program *) brw->programs[MESA_SHADER_FRAGMENT];
585
586 if (!brw_wm_state_dirty(brw))
587 return;
588
589 brw_wm_populate_key(brw, &key);
590
591 if (brw_search_cache(&brw->cache, BRW_CACHE_FS_PROG,
592 &key, sizeof(key),
593 &brw->wm.base.prog_offset,
594 &brw->wm.base.prog_data))
595 return;
596
597 if (brw_disk_cache_upload_program(brw, MESA_SHADER_FRAGMENT))
598 return;
599
600 fp = (struct brw_program *) brw->programs[MESA_SHADER_FRAGMENT];
601 fp->id = key.program_string_id;
602
603 MAYBE_UNUSED bool success = brw_codegen_wm_prog(brw, fp, &key,
604 &brw->vue_map_geom_out);
605 assert(success);
606 }
607
608 bool
brw_fs_precompile(struct gl_context * ctx,struct gl_program * prog)609 brw_fs_precompile(struct gl_context *ctx, struct gl_program *prog)
610 {
611 struct brw_context *brw = brw_context(ctx);
612 const struct gen_device_info *devinfo = &brw->screen->devinfo;
613 struct brw_wm_prog_key key;
614
615 struct brw_program *bfp = brw_program(prog);
616
617 memset(&key, 0, sizeof(key));
618
619 uint64_t outputs_written = prog->info.outputs_written;
620
621 if (devinfo->gen < 6) {
622 if (prog->info.fs.uses_discard)
623 key.iz_lookup |= BRW_WM_IZ_PS_KILL_ALPHATEST_BIT;
624
625 if (outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
626 key.iz_lookup |= BRW_WM_IZ_PS_COMPUTES_DEPTH_BIT;
627
628 /* Just assume depth testing. */
629 key.iz_lookup |= BRW_WM_IZ_DEPTH_TEST_ENABLE_BIT;
630 key.iz_lookup |= BRW_WM_IZ_DEPTH_WRITE_ENABLE_BIT;
631 }
632
633 if (devinfo->gen < 6 || _mesa_bitcount_64(prog->info.inputs_read &
634 BRW_FS_VARYING_INPUT_MASK) > 16) {
635 key.input_slots_valid = prog->info.inputs_read | VARYING_BIT_POS;
636 }
637
638 brw_setup_tex_for_precompile(brw, &key.tex, prog);
639
640 key.nr_color_regions = _mesa_bitcount_64(outputs_written &
641 ~(BITFIELD64_BIT(FRAG_RESULT_DEPTH) |
642 BITFIELD64_BIT(FRAG_RESULT_STENCIL) |
643 BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK)));
644
645 key.program_string_id = bfp->id;
646
647 /* Whether reads from the framebuffer should behave coherently. */
648 key.coherent_fb_fetch = ctx->Extensions.MESA_shader_framebuffer_fetch;
649
650 uint32_t old_prog_offset = brw->wm.base.prog_offset;
651 struct brw_stage_prog_data *old_prog_data = brw->wm.base.prog_data;
652
653 struct brw_vue_map vue_map;
654 if (devinfo->gen < 6) {
655 brw_compute_vue_map(&brw->screen->devinfo, &vue_map,
656 prog->info.inputs_read | VARYING_BIT_POS,
657 false);
658 }
659
660 bool success = brw_codegen_wm_prog(brw, bfp, &key, &vue_map);
661
662 brw->wm.base.prog_offset = old_prog_offset;
663 brw->wm.base.prog_data = old_prog_data;
664
665 return success;
666 }
667