Searched defs:ccm_regs (Results 1 – 3 of 3) sorted by relevance
208 struct ccm_regs { struct209 u32 ccmr; /* Control */210 u32 pdr0; /* Post divider 0 */211 u32 pdr1; /* Post divider 1 */212 u32 pdr2; /* Post divider 2 */213 u32 pdr3; /* Post divider 3 */214 u32 pdr4; /* Post divider 4 */215 u32 rcsr; /* CCM Status */216 u32 mpctl; /* Core PLL Control */217 u32 ppctl; /* Peripheral PLL Control */[all …]
23 struct ccm_regs { struct24 u32 mpctl; /* Core PLL Control */25 u32 upctl; /* USB PLL Control */26 u32 cctl; /* Clock Control */27 u32 cgr0; /* Clock Gating Control 0 */28 u32 cgr1; /* Clock Gating Control 1 */29 u32 cgr2; /* Clock Gating Control 2 */30 u32 pcdr[4]; /* PER Clock Dividers */31 u32 rcsr; /* CCM Status */32 u32 crdr; /* CCM Reset and Debug */[all …]
1110 struct mxc_ccm_reg *ccm_regs = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in enable_pcie_clock() local