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Searched defs:div (Results 1 – 25 of 250) sorted by relevance

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/external/eigen/unsupported/test/
Dcxx11_tensor_intdiv.cpp28 const Eigen::internal::TensorIntDivisor<int32_t, false> div(i); in test_signed_32bit() local
39 const Eigen::internal::TensorIntDivisor<int32_t, true> div(i); in test_signed_32bit() local
53 const Eigen::internal::TensorIntDivisor<uint32_t> div(i); in test_unsigned_32bit() local
67 const Eigen::internal::TensorIntDivisor<int64_t> div(i); in test_signed_64bit() local
81 const Eigen::internal::TensorIntDivisor<uint64_t> div(i); in test_unsigned_64bit() local
93 int32_t div = (1 << expon); in test_powers_32bit() local
112 int64_t div = (1ull << expon); in test_powers_64bit() local
130 int64_t div = 209715200; in test_specific() local
/external/u-boot/arch/arm/mach-s5pc1xx/
Dclock.c137 unsigned long div; in s5pc110_get_arm_clk() local
157 unsigned long div; in s5pc100_get_arm_clk() local
180 uint div, d0_bus_ratio; in get_hclk() local
197 uint div, d1_bus_ratio, pclkd1_ratio; in get_pclkd1() local
218 unsigned int div; in get_hclk_sys() local
247 unsigned int div; in get_pclk_sys() local
323 void set_mmc_clk(int dev_index, unsigned int div) in set_mmc_clk()
/external/libcxx/include/
Dstdlib.h116 inline _LIBCPP_INLINE_VISIBILITY ldiv_t div( long __x, long __y) _NOEXCEPT {return ldiv(… in div() function
118 inline _LIBCPP_INLINE_VISIBILITY lldiv_t div(long long __x, long long __y) _NOEXCEPT {return lldiv(… in div() function
/external/u-boot/drivers/clk/rockchip/
Dclk_rk3128.c27 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
39 const struct pll_div *div) in rkclk_set_pll()
76 static int pll_para_config(u32 freq_hz, struct pll_div *div) in pll_para_config()
282 uint div, mux; in rockchip_mmc_get_clk() local
348 u32 div, con; in rk3128_peri_get_pclk() local
393 u32 div, val; in rk3128_saradc_get_clk() local
457 u32 div, con, parent; in rk3128_vop_get_rate() local
Dclk_rk3368.c41 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
89 const struct pll_div *div) in rkclk_set_pll()
159 u32 div, con, con_id, rate; in rk3368_mmc_get_clk() local
222 u32 div = DIV_ROUND_UP(parent_rate, rate); in rk3368_mmc_find_best_rate_and_parent() local
254 u32 con_id, mux = 0, div = 0; in rk3368_mmc_set_clk() local
326 u8 div; in rk3368_gmac_set_clk() local
381 u32 div, val; in rk3368_spi_get_clk() local
429 u32 div, val; in rk3368_saradc_get_clk() local
Dclk_rv1108.c27 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
90 uint8_t div; in rv1108_mac_set_clk() local
115 u32 div; in rv1108_sfc_set_clk() local
134 u32 div, val; in rv1108_saradc_get_clk() local
Dclk_rk3288.c130 #define DIV_TO_RATE(input_rate, div) ((input_rate) / ((div) + 1)) argument
144 const struct pll_div *div) in rkclk_set_pll()
226 static int pll_para_config(ulong freq_hz, struct pll_div *div, uint *ext_div) in pll_para_config()
311 u8 div; in rockchip_mac_set_clk() local
529 uint div, mux; in rockchip_mmc_get_clk() local
612 uint div, mux; in rockchip_spi_get_clk() local
675 u32 div, val; in rockchip_saradc_get_clk() local
791 u32 div; in rk3288_clk_set_rate() local
/external/libyuv/files/unit_test/
Dmath_test.cc25 int div[1280]; in TEST_F() local
89 int div[1280]; in TEST_F() local
123 int div[1280]; in TEST_F() local
/external/u-boot/arch/arm/mach-at91/armv7/
Dclock.c41 unsigned mul, div; in at91_pll_rate() local
194 int at91_enable_periph_generated_clk(u32 id, u32 clk_source, u32 div) in at91_enable_periph_generated_clk()
260 u32 regval, clk_source, div; in at91_get_periph_generated_clk() local
/external/u-boot/arch/arm/cpu/arm926ejs/mxs/
Dclock.c41 uint32_t clkctrl, clkseq, div; in mxs_get_pclk() local
73 uint32_t div; in mxs_get_hclk() local
91 uint32_t clkctrl, clkseq, div; in mxs_get_emiclk() local
122 uint32_t clkctrl, clkseq, div; in mxs_get_gpmiclk() local
148 uint32_t div; in mxs_set_ioclk() local
/external/perfetto/infra/perfetto-ci.appspot.com/static/
Dscript.js37 function GetTravisStatusForJob(jobId, div) { argument
71 function GetTravisStatusForBranch(branch, div) { argument
/external/u-boot/drivers/clk/renesas/
Dclk-rcar-gen2.c31 u8 div; member
47 static u8 gen2_clk_get_sdh_div(const struct clk_div_table *table, u8 div) in gen2_clk_get_sdh_div()
78 u32 value, mult, div, rate = 0; in gen2_clk_get_rate() local
/external/u-boot/arch/arm/cpu/arm926ejs/mx25/
Dgeneric.c73 ulong div; in imx_get_armclk() local
89 ulong div; in imx_get_ahbclk() local
107 ulong div; in imx_get_perclk() local
119 ulong div = (fref + freq - 1) / freq; in imx_set_perclk() local
/external/clang/test/SemaCXX/
Dwarn-div-or-rem-by-zero.cpp5 void div() { in div() function
/external/u-boot/arch/arm/mach-davinci/
Dcpu.c117 u32 div; in pll_div() local
148 static unsigned pll_sysclk_mhz(unsigned pll_addr, unsigned div) in pll_sysclk_mhz()
178 unsigned int davinci_clk_get(unsigned int div) in davinci_clk_get()
/external/u-boot/arch/arm/mach-imx/mx7/
Dclock_slice.c520 int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div) in clock_set_postdiv()
548 int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div) in clock_get_postdiv()
572 int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div, in clock_set_autopostdiv()
610 int clock_get_autopostdiv(enum clk_root_index clock_id, enum root_auto_div *div, in clock_get_autopostdiv()
/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-objdump/ARM/
Dv7m-subfeatures.s22 div: label
Dv7a-subfeature.s31 div: label
/external/u-boot/drivers/clk/mvebu/
Darmada-37xx-tbg.c57 unsigned int div[NUM_TBG]; member
72 unsigned int div; in tbg_get_div() local
127 unsigned int mult, div; in armada_37xx_tbg_clk_probe() local
/external/u-boot/arch/arm/mach-exynos/
Dclock.c116 unsigned int div; in exynos_get_pll_clk() local
368 unsigned int src = 0, div = 0, sub_div = 0; in exynos5_get_periph_rate() local
467 unsigned int src = 0, div = 0, sub_div = 0; in exynos542x_get_periph_rate() local
573 unsigned long div; in exynos4_get_arm_clk() local
595 unsigned long div; in exynos4x12_get_arm_clk() local
617 unsigned long div; in exynos5_get_arm_clk() local
833 static void exynos4_set_mmc_clk(int dev_index, unsigned int div) in exynos4_set_mmc_clk()
868 static void exynos5_set_mmc_clk(int dev_index, unsigned int div) in exynos5_set_mmc_clk()
892 static void exynos5420_set_mmc_clk(int dev_index, unsigned int div) in exynos5420_set_mmc_clk()
1346 unsigned int div; in exynos5_set_i2s_clk_prescaler() local
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/external/u-boot/arch/arm/mach-at91/arm920t/
Dclock.c43 unsigned i, div = 0, mul = 0, diff = 1 << 30; in at91_pll_calc() local
92 unsigned mul, div; in at91_pll_rate() local
/external/jacoco/org.jacoco.report/src/org/jacoco/report/internal/html/page/
DReportPage.java133 private void breadcrumb(final HTMLElement div, final ReportOutputFolder base) in breadcrumb()
140 final HTMLElement div, final ReportOutputFolder base) in breadcrumbParent()
/external/u-boot/arch/arm/cpu/armv7/s5p-common/
Dpwm.c44 unsigned int div; in pwm_calc_tin() local
114 int pwm_init(int pwm_id, int div, int invert) in pwm_init()
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/RISCV/
Drv32m-valid.s26 div s0, s0, s0 label
/external/u-boot/arch/arm/mach-imx/mx7ulp/
Dpcc.c160 int pcc_clock_div_config(enum pcc_clk clk, bool frac, u8 div) in pcc_clock_div_config()
255 u32 reg, val, rate, frac, div; in pcc_clock_get_rate() local

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