1 /************************************************************************** 2 * 3 * Copyright © 2009-2015 VMware, Inc., Palo Alto, CA., USA 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 24 * USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28 #ifndef __VMWGFX_DRM_H__ 29 #define __VMWGFX_DRM_H__ 30 31 #ifndef __KERNEL__ 32 #include <drm.h> 33 #endif 34 35 #define DRM_VMW_MAX_SURFACE_FACES 6 36 #define DRM_VMW_MAX_MIP_LEVELS 24 37 38 39 #define DRM_VMW_GET_PARAM 0 40 #define DRM_VMW_ALLOC_DMABUF 1 41 #define DRM_VMW_UNREF_DMABUF 2 42 #define DRM_VMW_CURSOR_BYPASS 3 43 /* guarded by DRM_VMW_PARAM_NUM_STREAMS != 0*/ 44 #define DRM_VMW_CONTROL_STREAM 4 45 #define DRM_VMW_CLAIM_STREAM 5 46 #define DRM_VMW_UNREF_STREAM 6 47 /* guarded by DRM_VMW_PARAM_3D == 1 */ 48 #define DRM_VMW_CREATE_CONTEXT 7 49 #define DRM_VMW_UNREF_CONTEXT 8 50 #define DRM_VMW_CREATE_SURFACE 9 51 #define DRM_VMW_UNREF_SURFACE 10 52 #define DRM_VMW_REF_SURFACE 11 53 #define DRM_VMW_EXECBUF 12 54 #define DRM_VMW_GET_3D_CAP 13 55 #define DRM_VMW_FENCE_WAIT 14 56 #define DRM_VMW_FENCE_SIGNALED 15 57 #define DRM_VMW_FENCE_UNREF 16 58 #define DRM_VMW_FENCE_EVENT 17 59 #define DRM_VMW_PRESENT 18 60 #define DRM_VMW_PRESENT_READBACK 19 61 #define DRM_VMW_UPDATE_LAYOUT 20 62 #define DRM_VMW_CREATE_SHADER 21 63 #define DRM_VMW_UNREF_SHADER 22 64 #define DRM_VMW_GB_SURFACE_CREATE 23 65 #define DRM_VMW_GB_SURFACE_REF 24 66 #define DRM_VMW_SYNCCPU 25 67 #define DRM_VMW_CREATE_EXTENDED_CONTEXT 26 68 69 /*************************************************************************/ 70 /** 71 * DRM_VMW_GET_PARAM - get device information. 72 * 73 * DRM_VMW_PARAM_FIFO_OFFSET: 74 * Offset to use to map the first page of the FIFO read-only. 75 * The fifo is mapped using the mmap() system call on the drm device. 76 * 77 * DRM_VMW_PARAM_OVERLAY_IOCTL: 78 * Does the driver support the overlay ioctl. 79 */ 80 81 #define DRM_VMW_PARAM_NUM_STREAMS 0 82 #define DRM_VMW_PARAM_NUM_FREE_STREAMS 1 83 #define DRM_VMW_PARAM_3D 2 84 #define DRM_VMW_PARAM_HW_CAPS 3 85 #define DRM_VMW_PARAM_FIFO_CAPS 4 86 #define DRM_VMW_PARAM_MAX_FB_SIZE 5 87 #define DRM_VMW_PARAM_FIFO_HW_VERSION 6 88 #define DRM_VMW_PARAM_MAX_SURF_MEMORY 7 89 #define DRM_VMW_PARAM_3D_CAPS_SIZE 8 90 #define DRM_VMW_PARAM_MAX_MOB_MEMORY 9 91 #define DRM_VMW_PARAM_MAX_MOB_SIZE 10 92 #define DRM_VMW_PARAM_SCREEN_TARGET 11 93 #define DRM_VMW_PARAM_VGPU10 12 94 95 /** 96 * enum drm_vmw_handle_type - handle type for ref ioctls 97 * 98 */ 99 enum drm_vmw_handle_type { 100 DRM_VMW_HANDLE_LEGACY = 0, 101 DRM_VMW_HANDLE_PRIME = 1 102 }; 103 104 /** 105 * struct drm_vmw_getparam_arg 106 * 107 * @value: Returned value. //Out 108 * @param: Parameter to query. //In. 109 * 110 * Argument to the DRM_VMW_GET_PARAM Ioctl. 111 */ 112 113 struct drm_vmw_getparam_arg { 114 uint64_t value; 115 uint32_t param; 116 uint32_t pad64; 117 }; 118 119 /*************************************************************************/ 120 /** 121 * DRM_VMW_CREATE_CONTEXT - Create a host context. 122 * 123 * Allocates a device unique context id, and queues a create context command 124 * for the host. Does not wait for host completion. 125 */ 126 127 /** 128 * struct drm_vmw_context_arg 129 * 130 * @cid: Device unique context ID. 131 * 132 * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl. 133 * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl. 134 */ 135 136 struct drm_vmw_context_arg { 137 int32_t cid; 138 uint32_t pad64; 139 }; 140 141 /*************************************************************************/ 142 /** 143 * DRM_VMW_UNREF_CONTEXT - Create a host context. 144 * 145 * Frees a global context id, and queues a destroy host command for the host. 146 * Does not wait for host completion. The context ID can be used directly 147 * in the command stream and shows up as the same context ID on the host. 148 */ 149 150 /*************************************************************************/ 151 /** 152 * DRM_VMW_CREATE_SURFACE - Create a host suface. 153 * 154 * Allocates a device unique surface id, and queues a create surface command 155 * for the host. Does not wait for host completion. The surface ID can be 156 * used directly in the command stream and shows up as the same surface 157 * ID on the host. 158 */ 159 160 /** 161 * struct drm_wmv_surface_create_req 162 * 163 * @flags: Surface flags as understood by the host. 164 * @format: Surface format as understood by the host. 165 * @mip_levels: Number of mip levels for each face. 166 * An unused face should have 0 encoded. 167 * @size_addr: Address of a user-space array of sruct drm_vmw_size 168 * cast to an uint64_t for 32-64 bit compatibility. 169 * The size of the array should equal the total number of mipmap levels. 170 * @shareable: Boolean whether other clients (as identified by file descriptors) 171 * may reference this surface. 172 * @scanout: Boolean whether the surface is intended to be used as a 173 * scanout. 174 * 175 * Input data to the DRM_VMW_CREATE_SURFACE Ioctl. 176 * Output data from the DRM_VMW_REF_SURFACE Ioctl. 177 */ 178 179 struct drm_vmw_surface_create_req { 180 uint32_t flags; 181 uint32_t format; 182 uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES]; 183 uint64_t size_addr; 184 int32_t shareable; 185 int32_t scanout; 186 }; 187 188 /** 189 * struct drm_wmv_surface_arg 190 * 191 * @sid: Surface id of created surface or surface to destroy or reference. 192 * @handle_type: Handle type for DRM_VMW_REF_SURFACE Ioctl. 193 * 194 * Output data from the DRM_VMW_CREATE_SURFACE Ioctl. 195 * Input argument to the DRM_VMW_UNREF_SURFACE Ioctl. 196 * Input argument to the DRM_VMW_REF_SURFACE Ioctl. 197 */ 198 199 struct drm_vmw_surface_arg { 200 int32_t sid; 201 enum drm_vmw_handle_type handle_type; 202 }; 203 204 /** 205 * struct drm_vmw_size ioctl. 206 * 207 * @width - mip level width 208 * @height - mip level height 209 * @depth - mip level depth 210 * 211 * Description of a mip level. 212 * Input data to the DRM_WMW_CREATE_SURFACE Ioctl. 213 */ 214 215 struct drm_vmw_size { 216 uint32_t width; 217 uint32_t height; 218 uint32_t depth; 219 uint32_t pad64; 220 }; 221 222 /** 223 * union drm_vmw_surface_create_arg 224 * 225 * @rep: Output data as described above. 226 * @req: Input data as described above. 227 * 228 * Argument to the DRM_VMW_CREATE_SURFACE Ioctl. 229 */ 230 231 union drm_vmw_surface_create_arg { 232 struct drm_vmw_surface_arg rep; 233 struct drm_vmw_surface_create_req req; 234 }; 235 236 /*************************************************************************/ 237 /** 238 * DRM_VMW_REF_SURFACE - Reference a host surface. 239 * 240 * Puts a reference on a host surface with a give sid, as previously 241 * returned by the DRM_VMW_CREATE_SURFACE ioctl. 242 * A reference will make sure the surface isn't destroyed while we hold 243 * it and will allow the calling client to use the surface ID in the command 244 * stream. 245 * 246 * On successful return, the Ioctl returns the surface information given 247 * in the DRM_VMW_CREATE_SURFACE ioctl. 248 */ 249 250 /** 251 * union drm_vmw_surface_reference_arg 252 * 253 * @rep: Output data as described above. 254 * @req: Input data as described above. 255 * 256 * Argument to the DRM_VMW_REF_SURFACE Ioctl. 257 */ 258 259 union drm_vmw_surface_reference_arg { 260 struct drm_vmw_surface_create_req rep; 261 struct drm_vmw_surface_arg req; 262 }; 263 264 /*************************************************************************/ 265 /** 266 * DRM_VMW_UNREF_SURFACE - Unreference a host surface. 267 * 268 * Clear a reference previously put on a host surface. 269 * When all references are gone, including the one implicitly placed 270 * on creation, 271 * a destroy surface command will be queued for the host. 272 * Does not wait for completion. 273 */ 274 275 /*************************************************************************/ 276 /** 277 * DRM_VMW_EXECBUF 278 * 279 * Submit a command buffer for execution on the host, and return a 280 * fence seqno that when signaled, indicates that the command buffer has 281 * executed. 282 */ 283 284 /** 285 * struct drm_vmw_execbuf_arg 286 * 287 * @commands: User-space address of a command buffer cast to an uint64_t. 288 * @command-size: Size in bytes of the command buffer. 289 * @throttle-us: Sleep until software is less than @throttle_us 290 * microseconds ahead of hardware. The driver may round this value 291 * to the nearest kernel tick. 292 * @fence_rep: User-space address of a struct drm_vmw_fence_rep cast to an 293 * uint64_t. 294 * @version: Allows expanding the execbuf ioctl parameters without breaking 295 * backwards compatibility, since user-space will always tell the kernel 296 * which version it uses. 297 * @flags: Execbuf flags. 298 * @imported_fence_fd: FD for a fence imported from another device 299 * 300 * Argument to the DRM_VMW_EXECBUF Ioctl. 301 */ 302 303 #define DRM_VMW_EXECBUF_VERSION 2 304 305 #define DRM_VMW_EXECBUF_FLAG_IMPORT_FENCE_FD (1 << 0) 306 #define DRM_VMW_EXECBUF_FLAG_EXPORT_FENCE_FD (1 << 1) 307 308 struct drm_vmw_execbuf_arg { 309 uint64_t commands; 310 uint32_t command_size; 311 uint32_t throttle_us; 312 uint64_t fence_rep; 313 uint32_t version; 314 uint32_t flags; 315 uint32_t context_handle; 316 int32_t imported_fence_fd; 317 }; 318 319 /** 320 * struct drm_vmw_fence_rep 321 * 322 * @handle: Fence object handle for fence associated with a command submission. 323 * @mask: Fence flags relevant for this fence object. 324 * @seqno: Fence sequence number in fifo. A fence object with a lower 325 * seqno will signal the EXEC flag before a fence object with a higher 326 * seqno. This can be used by user-space to avoid kernel calls to determine 327 * whether a fence has signaled the EXEC flag. Note that @seqno will 328 * wrap at 32-bit. 329 * @passed_seqno: The highest seqno number processed by the hardware 330 * so far. This can be used to mark user-space fence objects as signaled, and 331 * to determine whether a fence seqno might be stale. 332 * @fd: FD associated with the fence, -1 if not exported 333 * @error: This member should've been set to -EFAULT on submission. 334 * The following actions should be take on completion: 335 * error == -EFAULT: Fence communication failed. The host is synchronized. 336 * Use the last fence id read from the FIFO fence register. 337 * error != 0 && error != -EFAULT: 338 * Fence submission failed. The host is synchronized. Use the fence_seq member. 339 * error == 0: All is OK, The host may not be synchronized. 340 * Use the fence_seq member. 341 * 342 * Input / Output data to the DRM_VMW_EXECBUF Ioctl. 343 */ 344 345 struct drm_vmw_fence_rep { 346 uint32_t handle; 347 uint32_t mask; 348 uint32_t seqno; 349 uint32_t passed_seqno; 350 int32_t fd; 351 int32_t error; 352 }; 353 354 /*************************************************************************/ 355 /** 356 * DRM_VMW_ALLOC_DMABUF 357 * 358 * Allocate a DMA buffer that is visible also to the host. 359 * NOTE: The buffer is 360 * identified by a handle and an offset, which are private to the guest, but 361 * useable in the command stream. The guest kernel may translate these 362 * and patch up the command stream accordingly. In the future, the offset may 363 * be zero at all times, or it may disappear from the interface before it is 364 * fixed. 365 * 366 * The DMA buffer may stay user-space mapped in the guest at all times, 367 * and is thus suitable for sub-allocation. 368 * 369 * DMA buffers are mapped using the mmap() syscall on the drm device. 370 */ 371 372 /** 373 * struct drm_vmw_alloc_dmabuf_req 374 * 375 * @size: Required minimum size of the buffer. 376 * 377 * Input data to the DRM_VMW_ALLOC_DMABUF Ioctl. 378 */ 379 380 struct drm_vmw_alloc_dmabuf_req { 381 uint32_t size; 382 uint32_t pad64; 383 }; 384 385 /** 386 * struct drm_vmw_dmabuf_rep 387 * 388 * @map_handle: Offset to use in the mmap() call used to map the buffer. 389 * @handle: Handle unique to this buffer. Used for unreferencing. 390 * @cur_gmr_id: GMR id to use in the command stream when this buffer is 391 * referenced. See not above. 392 * @cur_gmr_offset: Offset to use in the command stream when this buffer is 393 * referenced. See note above. 394 * 395 * Output data from the DRM_VMW_ALLOC_DMABUF Ioctl. 396 */ 397 398 struct drm_vmw_dmabuf_rep { 399 uint64_t map_handle; 400 uint32_t handle; 401 uint32_t cur_gmr_id; 402 uint32_t cur_gmr_offset; 403 uint32_t pad64; 404 }; 405 406 /** 407 * union drm_vmw_dmabuf_arg 408 * 409 * @req: Input data as described above. 410 * @rep: Output data as described above. 411 * 412 * Argument to the DRM_VMW_ALLOC_DMABUF Ioctl. 413 */ 414 415 union drm_vmw_alloc_dmabuf_arg { 416 struct drm_vmw_alloc_dmabuf_req req; 417 struct drm_vmw_dmabuf_rep rep; 418 }; 419 420 /*************************************************************************/ 421 /** 422 * DRM_VMW_UNREF_DMABUF - Free a DMA buffer. 423 * 424 */ 425 426 /** 427 * struct drm_vmw_unref_dmabuf_arg 428 * 429 * @handle: Handle indicating what buffer to free. Obtained from the 430 * DRM_VMW_ALLOC_DMABUF Ioctl. 431 * 432 * Argument to the DRM_VMW_UNREF_DMABUF Ioctl. 433 */ 434 435 struct drm_vmw_unref_dmabuf_arg { 436 uint32_t handle; 437 uint32_t pad64; 438 }; 439 440 /*************************************************************************/ 441 /** 442 * DRM_VMW_CONTROL_STREAM - Control overlays, aka streams. 443 * 444 * This IOCTL controls the overlay units of the svga device. 445 * The SVGA overlay units does not work like regular hardware units in 446 * that they do not automaticaly read back the contents of the given dma 447 * buffer. But instead only read back for each call to this ioctl, and 448 * at any point between this call being made and a following call that 449 * either changes the buffer or disables the stream. 450 */ 451 452 /** 453 * struct drm_vmw_rect 454 * 455 * Defines a rectangle. Used in the overlay ioctl to define 456 * source and destination rectangle. 457 */ 458 459 struct drm_vmw_rect { 460 int32_t x; 461 int32_t y; 462 uint32_t w; 463 uint32_t h; 464 }; 465 466 /** 467 * struct drm_vmw_control_stream_arg 468 * 469 * @stream_id: Stearm to control 470 * @enabled: If false all following arguments are ignored. 471 * @handle: Handle to buffer for getting data from. 472 * @format: Format of the overlay as understood by the host. 473 * @width: Width of the overlay. 474 * @height: Height of the overlay. 475 * @size: Size of the overlay in bytes. 476 * @pitch: Array of pitches, the two last are only used for YUV12 formats. 477 * @offset: Offset from start of dma buffer to overlay. 478 * @src: Source rect, must be within the defined area above. 479 * @dst: Destination rect, x and y may be negative. 480 * 481 * Argument to the DRM_VMW_CONTROL_STREAM Ioctl. 482 */ 483 484 struct drm_vmw_control_stream_arg { 485 uint32_t stream_id; 486 uint32_t enabled; 487 488 uint32_t flags; 489 uint32_t color_key; 490 491 uint32_t handle; 492 uint32_t offset; 493 int32_t format; 494 uint32_t size; 495 uint32_t width; 496 uint32_t height; 497 uint32_t pitch[3]; 498 499 uint32_t pad64; 500 struct drm_vmw_rect src; 501 struct drm_vmw_rect dst; 502 }; 503 504 /*************************************************************************/ 505 /** 506 * DRM_VMW_CURSOR_BYPASS - Give extra information about cursor bypass. 507 * 508 */ 509 510 #define DRM_VMW_CURSOR_BYPASS_ALL (1 << 0) 511 #define DRM_VMW_CURSOR_BYPASS_FLAGS (1) 512 513 /** 514 * struct drm_vmw_cursor_bypass_arg 515 * 516 * @flags: Flags. 517 * @crtc_id: Crtc id, only used if DMR_CURSOR_BYPASS_ALL isn't passed. 518 * @xpos: X position of cursor. 519 * @ypos: Y position of cursor. 520 * @xhot: X hotspot. 521 * @yhot: Y hotspot. 522 * 523 * Argument to the DRM_VMW_CURSOR_BYPASS Ioctl. 524 */ 525 526 struct drm_vmw_cursor_bypass_arg { 527 uint32_t flags; 528 uint32_t crtc_id; 529 int32_t xpos; 530 int32_t ypos; 531 int32_t xhot; 532 int32_t yhot; 533 }; 534 535 /*************************************************************************/ 536 /** 537 * DRM_VMW_CLAIM_STREAM - Claim a single stream. 538 */ 539 540 /** 541 * struct drm_vmw_context_arg 542 * 543 * @stream_id: Device unique context ID. 544 * 545 * Output argument to the DRM_VMW_CREATE_CONTEXT Ioctl. 546 * Input argument to the DRM_VMW_UNREF_CONTEXT Ioctl. 547 */ 548 549 struct drm_vmw_stream_arg { 550 uint32_t stream_id; 551 uint32_t pad64; 552 }; 553 554 /*************************************************************************/ 555 /** 556 * DRM_VMW_UNREF_STREAM - Unclaim a stream. 557 * 558 * Return a single stream that was claimed by this process. Also makes 559 * sure that the stream has been stopped. 560 */ 561 562 /*************************************************************************/ 563 /** 564 * DRM_VMW_GET_3D_CAP 565 * 566 * Read 3D capabilities from the FIFO 567 * 568 */ 569 570 /** 571 * struct drm_vmw_get_3d_cap_arg 572 * 573 * @buffer: Pointer to a buffer for capability data, cast to an uint64_t 574 * @size: Max size to copy 575 * 576 * Input argument to the DRM_VMW_GET_3D_CAP_IOCTL 577 * ioctls. 578 */ 579 580 struct drm_vmw_get_3d_cap_arg { 581 uint64_t buffer; 582 uint32_t max_size; 583 uint32_t pad64; 584 }; 585 586 587 /*************************************************************************/ 588 /** 589 * DRM_VMW_FENCE_WAIT 590 * 591 * Waits for a fence object to signal. The wait is interruptible, so that 592 * signals may be delivered during the interrupt. The wait may timeout, 593 * in which case the calls returns -EBUSY. If the wait is restarted, 594 * that is restarting without resetting @cookie_valid to zero, 595 * the timeout is computed from the first call. 596 * 597 * The flags argument to the DRM_VMW_FENCE_WAIT ioctl indicates what to wait 598 * on: 599 * DRM_VMW_FENCE_FLAG_EXEC: All commands ahead of the fence in the command 600 * stream 601 * have executed. 602 * DRM_VMW_FENCE_FLAG_QUERY: All query results resulting from query finish 603 * commands 604 * in the buffer given to the EXECBUF ioctl returning the fence object handle 605 * are available to user-space. 606 * 607 * DRM_VMW_WAIT_OPTION_UNREF: If this wait option is given, and the 608 * fenc wait ioctl returns 0, the fence object has been unreferenced after 609 * the wait. 610 */ 611 612 #define DRM_VMW_FENCE_FLAG_EXEC (1 << 0) 613 #define DRM_VMW_FENCE_FLAG_QUERY (1 << 1) 614 615 #define DRM_VMW_WAIT_OPTION_UNREF (1 << 0) 616 617 /** 618 * struct drm_vmw_fence_wait_arg 619 * 620 * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl. 621 * @cookie_valid: Must be reset to 0 on first call. Left alone on restart. 622 * @kernel_cookie: Set to 0 on first call. Left alone on restart. 623 * @timeout_us: Wait timeout in microseconds. 0 for indefinite timeout. 624 * @lazy: Set to 1 if timing is not critical. Allow more than a kernel tick 625 * before returning. 626 * @flags: Fence flags to wait on. 627 * @wait_options: Options that control the behaviour of the wait ioctl. 628 * 629 * Input argument to the DRM_VMW_FENCE_WAIT ioctl. 630 */ 631 632 struct drm_vmw_fence_wait_arg { 633 uint32_t handle; 634 int32_t cookie_valid; 635 uint64_t kernel_cookie; 636 uint64_t timeout_us; 637 int32_t lazy; 638 int32_t flags; 639 int32_t wait_options; 640 int32_t pad64; 641 }; 642 643 /*************************************************************************/ 644 /** 645 * DRM_VMW_FENCE_SIGNALED 646 * 647 * Checks if a fence object is signaled.. 648 */ 649 650 /** 651 * struct drm_vmw_fence_signaled_arg 652 * 653 * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl. 654 * @flags: Fence object flags input to DRM_VMW_FENCE_SIGNALED ioctl 655 * @signaled: Out: Flags signaled. 656 * @sequence: Out: Highest sequence passed so far. Can be used to signal the 657 * EXEC flag of user-space fence objects. 658 * 659 * Input/Output argument to the DRM_VMW_FENCE_SIGNALED and DRM_VMW_FENCE_UNREF 660 * ioctls. 661 */ 662 663 struct drm_vmw_fence_signaled_arg { 664 uint32_t handle; 665 uint32_t flags; 666 int32_t signaled; 667 uint32_t passed_seqno; 668 uint32_t signaled_flags; 669 uint32_t pad64; 670 }; 671 672 /*************************************************************************/ 673 /** 674 * DRM_VMW_FENCE_UNREF 675 * 676 * Unreferences a fence object, and causes it to be destroyed if there are no 677 * other references to it. 678 * 679 */ 680 681 /** 682 * struct drm_vmw_fence_arg 683 * 684 * @handle: Fence object handle as returned by the DRM_VMW_EXECBUF ioctl. 685 * 686 * Input/Output argument to the DRM_VMW_FENCE_UNREF ioctl.. 687 */ 688 689 struct drm_vmw_fence_arg { 690 uint32_t handle; 691 uint32_t pad64; 692 }; 693 694 695 /*************************************************************************/ 696 /** 697 * DRM_VMW_FENCE_EVENT 698 * 699 * Queues an event on a fence to be delivered on the drm character device 700 * when the fence has signaled the DRM_VMW_FENCE_FLAG_EXEC flag. 701 * Optionally the approximate time when the fence signaled is 702 * given by the event. 703 */ 704 705 /* 706 * The event type 707 */ 708 #define DRM_VMW_EVENT_FENCE_SIGNALED 0x80000000 709 710 struct drm_vmw_event_fence { 711 struct drm_event base; 712 uint64_t user_data; 713 uint32_t tv_sec; 714 uint32_t tv_usec; 715 }; 716 717 /* 718 * Flags that may be given to the command. 719 */ 720 /* Request fence signaled time on the event. */ 721 #define DRM_VMW_FE_FLAG_REQ_TIME (1 << 0) 722 723 /** 724 * struct drm_vmw_fence_event_arg 725 * 726 * @fence_rep: Pointer to fence_rep structure cast to uint64_t or 0 if 727 * the fence is not supposed to be referenced by user-space. 728 * @user_info: Info to be delivered with the event. 729 * @handle: Attach the event to this fence only. 730 * @flags: A set of flags as defined above. 731 */ 732 struct drm_vmw_fence_event_arg { 733 uint64_t fence_rep; 734 uint64_t user_data; 735 uint32_t handle; 736 uint32_t flags; 737 }; 738 739 740 /*************************************************************************/ 741 /** 742 * DRM_VMW_PRESENT 743 * 744 * Executes an SVGA present on a given fb for a given surface. The surface 745 * is placed on the framebuffer. Cliprects are given relative to the given 746 * point (the point disignated by dest_{x|y}). 747 * 748 */ 749 750 /** 751 * struct drm_vmw_present_arg 752 * @fb_id: framebuffer id to present / read back from. 753 * @sid: Surface id to present from. 754 * @dest_x: X placement coordinate for surface. 755 * @dest_y: Y placement coordinate for surface. 756 * @clips_ptr: Pointer to an array of clip rects cast to an uint64_t. 757 * @num_clips: Number of cliprects given relative to the framebuffer origin, 758 * in the same coordinate space as the frame buffer. 759 * @pad64: Unused 64-bit padding. 760 * 761 * Input argument to the DRM_VMW_PRESENT ioctl. 762 */ 763 764 struct drm_vmw_present_arg { 765 uint32_t fb_id; 766 uint32_t sid; 767 int32_t dest_x; 768 int32_t dest_y; 769 uint64_t clips_ptr; 770 uint32_t num_clips; 771 uint32_t pad64; 772 }; 773 774 775 /*************************************************************************/ 776 /** 777 * DRM_VMW_PRESENT_READBACK 778 * 779 * Executes an SVGA present readback from a given fb to the dma buffer 780 * currently bound as the fb. If there is no dma buffer bound to the fb, 781 * an error will be returned. 782 * 783 */ 784 785 /** 786 * struct drm_vmw_present_arg 787 * @fb_id: fb_id to present / read back from. 788 * @num_clips: Number of cliprects. 789 * @clips_ptr: Pointer to an array of clip rects cast to an uint64_t. 790 * @fence_rep: Pointer to a struct drm_vmw_fence_rep, cast to an uint64_t. 791 * If this member is NULL, then the ioctl should not return a fence. 792 */ 793 794 struct drm_vmw_present_readback_arg { 795 uint32_t fb_id; 796 uint32_t num_clips; 797 uint64_t clips_ptr; 798 uint64_t fence_rep; 799 }; 800 801 /*************************************************************************/ 802 /** 803 * DRM_VMW_UPDATE_LAYOUT - Update layout 804 * 805 * Updates the preferred modes and connection status for connectors. The 806 * command consists of one drm_vmw_update_layout_arg pointing to an array 807 * of num_outputs drm_vmw_rect's. 808 */ 809 810 /** 811 * struct drm_vmw_update_layout_arg 812 * 813 * @num_outputs: number of active connectors 814 * @rects: pointer to array of drm_vmw_rect cast to an uint64_t 815 * 816 * Input argument to the DRM_VMW_UPDATE_LAYOUT Ioctl. 817 */ 818 struct drm_vmw_update_layout_arg { 819 uint32_t num_outputs; 820 uint32_t pad64; 821 uint64_t rects; 822 }; 823 824 825 /*************************************************************************/ 826 /** 827 * DRM_VMW_CREATE_SHADER - Create shader 828 * 829 * Creates a shader and optionally binds it to a dma buffer containing 830 * the shader byte-code. 831 */ 832 833 /** 834 * enum drm_vmw_shader_type - Shader types 835 */ 836 enum drm_vmw_shader_type { 837 drm_vmw_shader_type_vs = 0, 838 drm_vmw_shader_type_ps, 839 }; 840 841 842 /** 843 * struct drm_vmw_shader_create_arg 844 * 845 * @shader_type: Shader type of the shader to create. 846 * @size: Size of the byte-code in bytes. 847 * where the shader byte-code starts 848 * @buffer_handle: Buffer handle identifying the buffer containing the 849 * shader byte-code 850 * @shader_handle: On successful completion contains a handle that 851 * can be used to subsequently identify the shader. 852 * @offset: Offset in bytes into the buffer given by @buffer_handle, 853 * 854 * Input / Output argument to the DRM_VMW_CREATE_SHADER Ioctl. 855 */ 856 struct drm_vmw_shader_create_arg { 857 enum drm_vmw_shader_type shader_type; 858 uint32_t size; 859 uint32_t buffer_handle; 860 uint32_t shader_handle; 861 uint64_t offset; 862 }; 863 864 /*************************************************************************/ 865 /** 866 * DRM_VMW_UNREF_SHADER - Unreferences a shader 867 * 868 * Destroys a user-space reference to a shader, optionally destroying 869 * it. 870 */ 871 872 /** 873 * struct drm_vmw_shader_arg 874 * 875 * @handle: Handle identifying the shader to destroy. 876 * 877 * Input argument to the DRM_VMW_UNREF_SHADER ioctl. 878 */ 879 struct drm_vmw_shader_arg { 880 uint32_t handle; 881 uint32_t pad64; 882 }; 883 884 /*************************************************************************/ 885 /** 886 * DRM_VMW_GB_SURFACE_CREATE - Create a host guest-backed surface. 887 * 888 * Allocates a surface handle and queues a create surface command 889 * for the host on the first use of the surface. The surface ID can 890 * be used as the surface ID in commands referencing the surface. 891 */ 892 893 /** 894 * enum drm_vmw_surface_flags 895 * 896 * @drm_vmw_surface_flag_shareable: Whether the surface is shareable 897 * @drm_vmw_surface_flag_scanout: Whether the surface is a scanout 898 * surface. 899 * @drm_vmw_surface_flag_create_buffer: Create a backup buffer if none is 900 * given. 901 */ 902 enum drm_vmw_surface_flags { 903 drm_vmw_surface_flag_shareable = (1 << 0), 904 drm_vmw_surface_flag_scanout = (1 << 1), 905 drm_vmw_surface_flag_create_buffer = (1 << 2) 906 }; 907 908 /** 909 * struct drm_vmw_gb_surface_create_req 910 * 911 * @svga3d_flags: SVGA3d surface flags for the device. 912 * @format: SVGA3d format. 913 * @mip_level: Number of mip levels for all faces. 914 * @drm_surface_flags Flags as described above. 915 * @multisample_count Future use. Set to 0. 916 * @autogen_filter Future use. Set to 0. 917 * @buffer_handle Buffer handle of backup buffer. SVGA3D_INVALID_ID 918 * if none. 919 * @base_size Size of the base mip level for all faces. 920 * @array_size Must be zero for non-vgpu10 hardware, and if non-zero 921 * svga3d_flags must have proper bind flags setup. 922 * 923 * Input argument to the DRM_VMW_GB_SURFACE_CREATE Ioctl. 924 * Part of output argument for the DRM_VMW_GB_SURFACE_REF Ioctl. 925 */ 926 struct drm_vmw_gb_surface_create_req { 927 uint32_t svga3d_flags; 928 uint32_t format; 929 uint32_t mip_levels; 930 enum drm_vmw_surface_flags drm_surface_flags; 931 uint32_t multisample_count; 932 uint32_t autogen_filter; 933 uint32_t buffer_handle; 934 uint32_t array_size; 935 struct drm_vmw_size base_size; 936 }; 937 938 /** 939 * struct drm_vmw_gb_surface_create_rep 940 * 941 * @handle: Surface handle. 942 * @backup_size: Size of backup buffers for this surface. 943 * @buffer_handle: Handle of backup buffer. SVGA3D_INVALID_ID if none. 944 * @buffer_size: Actual size of the buffer identified by 945 * @buffer_handle 946 * @buffer_map_handle: Offset into device address space for the buffer 947 * identified by @buffer_handle. 948 * 949 * Part of output argument for the DRM_VMW_GB_SURFACE_REF ioctl. 950 * Output argument for the DRM_VMW_GB_SURFACE_CREATE ioctl. 951 */ 952 struct drm_vmw_gb_surface_create_rep { 953 uint32_t handle; 954 uint32_t backup_size; 955 uint32_t buffer_handle; 956 uint32_t buffer_size; 957 uint64_t buffer_map_handle; 958 }; 959 960 /** 961 * union drm_vmw_gb_surface_create_arg 962 * 963 * @req: Input argument as described above. 964 * @rep: Output argument as described above. 965 * 966 * Argument to the DRM_VMW_GB_SURFACE_CREATE ioctl. 967 */ 968 union drm_vmw_gb_surface_create_arg { 969 struct drm_vmw_gb_surface_create_rep rep; 970 struct drm_vmw_gb_surface_create_req req; 971 }; 972 973 /*************************************************************************/ 974 /** 975 * DRM_VMW_GB_SURFACE_REF - Reference a host surface. 976 * 977 * Puts a reference on a host surface with a given handle, as previously 978 * returned by the DRM_VMW_GB_SURFACE_CREATE ioctl. 979 * A reference will make sure the surface isn't destroyed while we hold 980 * it and will allow the calling client to use the surface handle in 981 * the command stream. 982 * 983 * On successful return, the Ioctl returns the surface information given 984 * to and returned from the DRM_VMW_GB_SURFACE_CREATE ioctl. 985 */ 986 987 /** 988 * struct drm_vmw_gb_surface_reference_arg 989 * 990 * @creq: The data used as input when the surface was created, as described 991 * above at "struct drm_vmw_gb_surface_create_req" 992 * @crep: Additional data output when the surface was created, as described 993 * above at "struct drm_vmw_gb_surface_create_rep" 994 * 995 * Output Argument to the DRM_VMW_GB_SURFACE_REF ioctl. 996 */ 997 struct drm_vmw_gb_surface_ref_rep { 998 struct drm_vmw_gb_surface_create_req creq; 999 struct drm_vmw_gb_surface_create_rep crep; 1000 }; 1001 1002 /** 1003 * union drm_vmw_gb_surface_reference_arg 1004 * 1005 * @req: Input data as described above at "struct drm_vmw_surface_arg" 1006 * @rep: Output data as described above at "struct drm_vmw_gb_surface_ref_rep" 1007 * 1008 * Argument to the DRM_VMW_GB_SURFACE_REF Ioctl. 1009 */ 1010 union drm_vmw_gb_surface_reference_arg { 1011 struct drm_vmw_gb_surface_ref_rep rep; 1012 struct drm_vmw_surface_arg req; 1013 }; 1014 1015 1016 /*************************************************************************/ 1017 /** 1018 * DRM_VMW_SYNCCPU - Sync a DMA buffer / MOB for CPU access. 1019 * 1020 * Idles any previously submitted GPU operations on the buffer and 1021 * by default blocks command submissions that reference the buffer. 1022 * If the file descriptor used to grab a blocking CPU sync is closed, the 1023 * cpu sync is released. 1024 * The flags argument indicates how the grab / release operation should be 1025 * performed: 1026 */ 1027 1028 /** 1029 * enum drm_vmw_synccpu_flags - Synccpu flags: 1030 * 1031 * @drm_vmw_synccpu_read: Sync for read. If sync is done for read only, it's a 1032 * hint to the kernel to allow command submissions that references the buffer 1033 * for read-only. 1034 * @drm_vmw_synccpu_write: Sync for write. Block all command submissions 1035 * referencing this buffer. 1036 * @drm_vmw_synccpu_dontblock: Dont wait for GPU idle, but rather return 1037 * -EBUSY should the buffer be busy. 1038 * @drm_vmw_synccpu_allow_cs: Allow command submission that touches the buffer 1039 * while the buffer is synced for CPU. This is similar to the GEM bo idle 1040 * behavior. 1041 */ 1042 enum drm_vmw_synccpu_flags { 1043 drm_vmw_synccpu_read = (1 << 0), 1044 drm_vmw_synccpu_write = (1 << 1), 1045 drm_vmw_synccpu_dontblock = (1 << 2), 1046 drm_vmw_synccpu_allow_cs = (1 << 3) 1047 }; 1048 1049 /** 1050 * enum drm_vmw_synccpu_op - Synccpu operations: 1051 * 1052 * @drm_vmw_synccpu_grab: Grab the buffer for CPU operations 1053 * @drm_vmw_synccpu_release: Release a previous grab. 1054 */ 1055 enum drm_vmw_synccpu_op { 1056 drm_vmw_synccpu_grab, 1057 drm_vmw_synccpu_release 1058 }; 1059 1060 /** 1061 * struct drm_vmw_synccpu_arg 1062 * 1063 * @op: The synccpu operation as described above. 1064 * @handle: Handle identifying the buffer object. 1065 * @flags: Flags as described above. 1066 */ 1067 struct drm_vmw_synccpu_arg { 1068 enum drm_vmw_synccpu_op op; 1069 enum drm_vmw_synccpu_flags flags; 1070 uint32_t handle; 1071 uint32_t pad64; 1072 }; 1073 1074 /*************************************************************************/ 1075 /** 1076 * DRM_VMW_CREATE_EXTENDED_CONTEXT - Create a host context. 1077 * 1078 * Allocates a device unique context id, and queues a create context command 1079 * for the host. Does not wait for host completion. 1080 */ 1081 enum drm_vmw_extended_context { 1082 drm_vmw_context_legacy, 1083 drm_vmw_context_vgpu10 1084 }; 1085 1086 /** 1087 * union drm_vmw_extended_context_arg 1088 * 1089 * @req: Context type. 1090 * @rep: Context identifier. 1091 * 1092 * Argument to the DRM_VMW_CREATE_EXTENDED_CONTEXT Ioctl. 1093 */ 1094 union drm_vmw_extended_context_arg { 1095 enum drm_vmw_extended_context req; 1096 struct drm_vmw_context_arg rep; 1097 }; 1098 #endif 1099