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1 // SPDX-License-Identifier: GPL-2.0
2 /*-
3  * Copyright (c) 2007-2008, Juniper Networks, Inc.
4  * Copyright (c) 2008, Excito Elektronik i Skåne AB
5  * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
6  *
7  * All rights reserved.
8  */
9 #include <common.h>
10 #include <dm.h>
11 #include <errno.h>
12 #include <asm/byteorder.h>
13 #include <asm/unaligned.h>
14 #include <usb.h>
15 #include <asm/io.h>
16 #include <malloc.h>
17 #include <memalign.h>
18 #include <watchdog.h>
19 #include <linux/compiler.h>
20 
21 #include "ehci.h"
22 
23 #ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
24 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
25 #endif
26 
27 /*
28  * EHCI spec page 20 says that the HC may take up to 16 uFrames (= 4ms) to halt.
29  * Let's time out after 8 to have a little safety margin on top of that.
30  */
31 #define HCHALT_TIMEOUT (8 * 1000)
32 
33 #ifndef CONFIG_DM_USB
34 static struct ehci_ctrl ehcic[CONFIG_USB_MAX_CONTROLLER_COUNT];
35 #endif
36 
37 #define ALIGN_END_ADDR(type, ptr, size)			\
38 	((unsigned long)(ptr) + roundup((size) * sizeof(type), USB_DMA_MINALIGN))
39 
40 static struct descriptor {
41 	struct usb_hub_descriptor hub;
42 	struct usb_device_descriptor device;
43 	struct usb_linux_config_descriptor config;
44 	struct usb_linux_interface_descriptor interface;
45 	struct usb_endpoint_descriptor endpoint;
46 }  __attribute__ ((packed)) descriptor = {
47 	{
48 		0x8,		/* bDescLength */
49 		0x29,		/* bDescriptorType: hub descriptor */
50 		2,		/* bNrPorts -- runtime modified */
51 		0,		/* wHubCharacteristics */
52 		10,		/* bPwrOn2PwrGood */
53 		0,		/* bHubCntrCurrent */
54 		{		/* Device removable */
55 		}		/* at most 7 ports! XXX */
56 	},
57 	{
58 		0x12,		/* bLength */
59 		1,		/* bDescriptorType: UDESC_DEVICE */
60 		cpu_to_le16(0x0200), /* bcdUSB: v2.0 */
61 		9,		/* bDeviceClass: UDCLASS_HUB */
62 		0,		/* bDeviceSubClass: UDSUBCLASS_HUB */
63 		1,		/* bDeviceProtocol: UDPROTO_HSHUBSTT */
64 		64,		/* bMaxPacketSize: 64 bytes */
65 		0x0000,		/* idVendor */
66 		0x0000,		/* idProduct */
67 		cpu_to_le16(0x0100), /* bcdDevice */
68 		1,		/* iManufacturer */
69 		2,		/* iProduct */
70 		0,		/* iSerialNumber */
71 		1		/* bNumConfigurations: 1 */
72 	},
73 	{
74 		0x9,
75 		2,		/* bDescriptorType: UDESC_CONFIG */
76 		cpu_to_le16(0x19),
77 		1,		/* bNumInterface */
78 		1,		/* bConfigurationValue */
79 		0,		/* iConfiguration */
80 		0x40,		/* bmAttributes: UC_SELF_POWER */
81 		0		/* bMaxPower */
82 	},
83 	{
84 		0x9,		/* bLength */
85 		4,		/* bDescriptorType: UDESC_INTERFACE */
86 		0,		/* bInterfaceNumber */
87 		0,		/* bAlternateSetting */
88 		1,		/* bNumEndpoints */
89 		9,		/* bInterfaceClass: UICLASS_HUB */
90 		0,		/* bInterfaceSubClass: UISUBCLASS_HUB */
91 		0,		/* bInterfaceProtocol: UIPROTO_HSHUBSTT */
92 		0		/* iInterface */
93 	},
94 	{
95 		0x7,		/* bLength */
96 		5,		/* bDescriptorType: UDESC_ENDPOINT */
97 		0x81,		/* bEndpointAddress:
98 				 * UE_DIR_IN | EHCI_INTR_ENDPT
99 				 */
100 		3,		/* bmAttributes: UE_INTERRUPT */
101 		8,		/* wMaxPacketSize */
102 		255		/* bInterval */
103 	},
104 };
105 
106 #if defined(CONFIG_EHCI_IS_TDI)
107 #define ehci_is_TDI()	(1)
108 #else
109 #define ehci_is_TDI()	(0)
110 #endif
111 
ehci_get_ctrl(struct usb_device * udev)112 static struct ehci_ctrl *ehci_get_ctrl(struct usb_device *udev)
113 {
114 #ifdef CONFIG_DM_USB
115 	return dev_get_priv(usb_get_bus(udev->dev));
116 #else
117 	return udev->controller;
118 #endif
119 }
120 
ehci_get_port_speed(struct ehci_ctrl * ctrl,uint32_t reg)121 static int ehci_get_port_speed(struct ehci_ctrl *ctrl, uint32_t reg)
122 {
123 	return PORTSC_PSPD(reg);
124 }
125 
ehci_set_usbmode(struct ehci_ctrl * ctrl)126 static void ehci_set_usbmode(struct ehci_ctrl *ctrl)
127 {
128 	uint32_t tmp;
129 	uint32_t *reg_ptr;
130 
131 	reg_ptr = (uint32_t *)((u8 *)&ctrl->hcor->or_usbcmd + USBMODE);
132 	tmp = ehci_readl(reg_ptr);
133 	tmp |= USBMODE_CM_HC;
134 #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
135 	tmp |= USBMODE_BE;
136 #else
137 	tmp &= ~USBMODE_BE;
138 #endif
139 	ehci_writel(reg_ptr, tmp);
140 }
141 
ehci_powerup_fixup(struct ehci_ctrl * ctrl,uint32_t * status_reg,uint32_t * reg)142 static void ehci_powerup_fixup(struct ehci_ctrl *ctrl, uint32_t *status_reg,
143 			       uint32_t *reg)
144 {
145 	mdelay(50);
146 }
147 
ehci_get_portsc_register(struct ehci_ctrl * ctrl,int port)148 static uint32_t *ehci_get_portsc_register(struct ehci_ctrl *ctrl, int port)
149 {
150 	int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams));
151 
152 	if (port < 0 || port >= max_ports) {
153 		/* Printing the message would cause a scan failure! */
154 		debug("The request port(%u) exceeds maximum port number\n",
155 		      port);
156 		return NULL;
157 	}
158 
159 	return (uint32_t *)&ctrl->hcor->or_portsc[port];
160 }
161 
handshake(uint32_t * ptr,uint32_t mask,uint32_t done,int usec)162 static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
163 {
164 	uint32_t result;
165 	do {
166 		result = ehci_readl(ptr);
167 		udelay(5);
168 		if (result == ~(uint32_t)0)
169 			return -1;
170 		result &= mask;
171 		if (result == done)
172 			return 0;
173 		usec--;
174 	} while (usec > 0);
175 	return -1;
176 }
177 
ehci_reset(struct ehci_ctrl * ctrl)178 static int ehci_reset(struct ehci_ctrl *ctrl)
179 {
180 	uint32_t cmd;
181 	int ret = 0;
182 
183 	cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
184 	cmd = (cmd & ~CMD_RUN) | CMD_RESET;
185 	ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
186 	ret = handshake((uint32_t *)&ctrl->hcor->or_usbcmd,
187 			CMD_RESET, 0, 250 * 1000);
188 	if (ret < 0) {
189 		printf("EHCI fail to reset\n");
190 		goto out;
191 	}
192 
193 	if (ehci_is_TDI())
194 		ctrl->ops.set_usb_mode(ctrl);
195 
196 #ifdef CONFIG_USB_EHCI_TXFIFO_THRESH
197 	cmd = ehci_readl(&ctrl->hcor->or_txfilltuning);
198 	cmd &= ~TXFIFO_THRESH_MASK;
199 	cmd |= TXFIFO_THRESH(CONFIG_USB_EHCI_TXFIFO_THRESH);
200 	ehci_writel(&ctrl->hcor->or_txfilltuning, cmd);
201 #endif
202 out:
203 	return ret;
204 }
205 
ehci_shutdown(struct ehci_ctrl * ctrl)206 static int ehci_shutdown(struct ehci_ctrl *ctrl)
207 {
208 	int i, ret = 0;
209 	uint32_t cmd, reg;
210 	int max_ports = HCS_N_PORTS(ehci_readl(&ctrl->hccr->cr_hcsparams));
211 
212 	cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
213 	/* If not run, directly return */
214 	if (!(cmd & CMD_RUN))
215 		return 0;
216 	cmd &= ~(CMD_PSE | CMD_ASE);
217 	ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
218 	ret = handshake(&ctrl->hcor->or_usbsts, STS_ASS | STS_PSS, 0,
219 		100 * 1000);
220 
221 	if (!ret) {
222 		for (i = 0; i < max_ports; i++) {
223 			reg = ehci_readl(&ctrl->hcor->or_portsc[i]);
224 			reg |= EHCI_PS_SUSP;
225 			ehci_writel(&ctrl->hcor->or_portsc[i], reg);
226 		}
227 
228 		cmd &= ~CMD_RUN;
229 		ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
230 		ret = handshake(&ctrl->hcor->or_usbsts, STS_HALT, STS_HALT,
231 			HCHALT_TIMEOUT);
232 	}
233 
234 	if (ret)
235 		puts("EHCI failed to shut down host controller.\n");
236 
237 	return ret;
238 }
239 
ehci_td_buffer(struct qTD * td,void * buf,size_t sz)240 static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
241 {
242 	uint32_t delta, next;
243 	unsigned long addr = (unsigned long)buf;
244 	int idx;
245 
246 	if (addr != ALIGN(addr, ARCH_DMA_MINALIGN))
247 		debug("EHCI-HCD: Misaligned buffer address (%p)\n", buf);
248 
249 	flush_dcache_range(addr, ALIGN(addr + sz, ARCH_DMA_MINALIGN));
250 
251 	idx = 0;
252 	while (idx < QT_BUFFER_CNT) {
253 		td->qt_buffer[idx] = cpu_to_hc32(virt_to_phys((void *)addr));
254 		td->qt_buffer_hi[idx] = 0;
255 		next = (addr + EHCI_PAGE_SIZE) & ~(EHCI_PAGE_SIZE - 1);
256 		delta = next - addr;
257 		if (delta >= sz)
258 			break;
259 		sz -= delta;
260 		addr = next;
261 		idx++;
262 	}
263 
264 	if (idx == QT_BUFFER_CNT) {
265 		printf("out of buffer pointers (%zu bytes left)\n", sz);
266 		return -1;
267 	}
268 
269 	return 0;
270 }
271 
ehci_encode_speed(enum usb_device_speed speed)272 static inline u8 ehci_encode_speed(enum usb_device_speed speed)
273 {
274 	#define QH_HIGH_SPEED	2
275 	#define QH_FULL_SPEED	0
276 	#define QH_LOW_SPEED	1
277 	if (speed == USB_SPEED_HIGH)
278 		return QH_HIGH_SPEED;
279 	if (speed == USB_SPEED_LOW)
280 		return QH_LOW_SPEED;
281 	return QH_FULL_SPEED;
282 }
283 
ehci_update_endpt2_dev_n_port(struct usb_device * udev,struct QH * qh)284 static void ehci_update_endpt2_dev_n_port(struct usb_device *udev,
285 					  struct QH *qh)
286 {
287 	uint8_t portnr = 0;
288 	uint8_t hubaddr = 0;
289 
290 	if (udev->speed != USB_SPEED_LOW && udev->speed != USB_SPEED_FULL)
291 		return;
292 
293 	usb_find_usb2_hub_address_port(udev, &hubaddr, &portnr);
294 
295 	qh->qh_endpt2 |= cpu_to_hc32(QH_ENDPT2_PORTNUM(portnr) |
296 				     QH_ENDPT2_HUBADDR(hubaddr));
297 }
298 
299 static int
ehci_submit_async(struct usb_device * dev,unsigned long pipe,void * buffer,int length,struct devrequest * req)300 ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
301 		   int length, struct devrequest *req)
302 {
303 	ALLOC_ALIGN_BUFFER(struct QH, qh, 1, USB_DMA_MINALIGN);
304 	struct qTD *qtd;
305 	int qtd_count = 0;
306 	int qtd_counter = 0;
307 	volatile struct qTD *vtd;
308 	unsigned long ts;
309 	uint32_t *tdp;
310 	uint32_t endpt, maxpacket, token, usbsts;
311 	uint32_t c, toggle;
312 	uint32_t cmd;
313 	int timeout;
314 	int ret = 0;
315 	struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
316 
317 	debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,
318 	      buffer, length, req);
319 	if (req != NULL)
320 		debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
321 		      req->request, req->request,
322 		      req->requesttype, req->requesttype,
323 		      le16_to_cpu(req->value), le16_to_cpu(req->value),
324 		      le16_to_cpu(req->index));
325 
326 #define PKT_ALIGN	512
327 	/*
328 	 * The USB transfer is split into qTD transfers. Eeach qTD transfer is
329 	 * described by a transfer descriptor (the qTD). The qTDs form a linked
330 	 * list with a queue head (QH).
331 	 *
332 	 * Each qTD transfer starts with a new USB packet, i.e. a packet cannot
333 	 * have its beginning in a qTD transfer and its end in the following
334 	 * one, so the qTD transfer lengths have to be chosen accordingly.
335 	 *
336 	 * Each qTD transfer uses up to QT_BUFFER_CNT data buffers, mapped to
337 	 * single pages. The first data buffer can start at any offset within a
338 	 * page (not considering the cache-line alignment issues), while the
339 	 * following buffers must be page-aligned. There is no alignment
340 	 * constraint on the size of a qTD transfer.
341 	 */
342 	if (req != NULL)
343 		/* 1 qTD will be needed for SETUP, and 1 for ACK. */
344 		qtd_count += 1 + 1;
345 	if (length > 0 || req == NULL) {
346 		/*
347 		 * Determine the qTD transfer size that will be used for the
348 		 * data payload (not considering the first qTD transfer, which
349 		 * may be longer or shorter, and the final one, which may be
350 		 * shorter).
351 		 *
352 		 * In order to keep each packet within a qTD transfer, the qTD
353 		 * transfer size is aligned to PKT_ALIGN, which is a multiple of
354 		 * wMaxPacketSize (except in some cases for interrupt transfers,
355 		 * see comment in submit_int_msg()).
356 		 *
357 		 * By default, i.e. if the input buffer is aligned to PKT_ALIGN,
358 		 * QT_BUFFER_CNT full pages will be used.
359 		 */
360 		int xfr_sz = QT_BUFFER_CNT;
361 		/*
362 		 * However, if the input buffer is not aligned to PKT_ALIGN, the
363 		 * qTD transfer size will be one page shorter, and the first qTD
364 		 * data buffer of each transfer will be page-unaligned.
365 		 */
366 		if ((unsigned long)buffer & (PKT_ALIGN - 1))
367 			xfr_sz--;
368 		/* Convert the qTD transfer size to bytes. */
369 		xfr_sz *= EHCI_PAGE_SIZE;
370 		/*
371 		 * Approximate by excess the number of qTDs that will be
372 		 * required for the data payload. The exact formula is way more
373 		 * complicated and saves at most 2 qTDs, i.e. a total of 128
374 		 * bytes.
375 		 */
376 		qtd_count += 2 + length / xfr_sz;
377 	}
378 /*
379  * Threshold value based on the worst-case total size of the allocated qTDs for
380  * a mass-storage transfer of 65535 blocks of 512 bytes.
381  */
382 #if CONFIG_SYS_MALLOC_LEN <= 64 + 128 * 1024
383 #warning CONFIG_SYS_MALLOC_LEN may be too small for EHCI
384 #endif
385 	qtd = memalign(USB_DMA_MINALIGN, qtd_count * sizeof(struct qTD));
386 	if (qtd == NULL) {
387 		printf("unable to allocate TDs\n");
388 		return -1;
389 	}
390 
391 	memset(qh, 0, sizeof(struct QH));
392 	memset(qtd, 0, qtd_count * sizeof(*qtd));
393 
394 	toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
395 
396 	/*
397 	 * Setup QH (3.6 in ehci-r10.pdf)
398 	 *
399 	 *   qh_link ................. 03-00 H
400 	 *   qh_endpt1 ............... 07-04 H
401 	 *   qh_endpt2 ............... 0B-08 H
402 	 * - qh_curtd
403 	 *   qh_overlay.qt_next ...... 13-10 H
404 	 * - qh_overlay.qt_altnext
405 	 */
406 	qh->qh_link = cpu_to_hc32(virt_to_phys(&ctrl->qh_list) | QH_LINK_TYPE_QH);
407 	c = (dev->speed != USB_SPEED_HIGH) && !usb_pipeendpoint(pipe);
408 	maxpacket = usb_maxpacket(dev, pipe);
409 	endpt = QH_ENDPT1_RL(8) | QH_ENDPT1_C(c) |
410 		QH_ENDPT1_MAXPKTLEN(maxpacket) | QH_ENDPT1_H(0) |
411 		QH_ENDPT1_DTC(QH_ENDPT1_DTC_DT_FROM_QTD) |
412 		QH_ENDPT1_EPS(ehci_encode_speed(dev->speed)) |
413 		QH_ENDPT1_ENDPT(usb_pipeendpoint(pipe)) | QH_ENDPT1_I(0) |
414 		QH_ENDPT1_DEVADDR(usb_pipedevice(pipe));
415 	qh->qh_endpt1 = cpu_to_hc32(endpt);
416 	endpt = QH_ENDPT2_MULT(1) | QH_ENDPT2_UFCMASK(0) | QH_ENDPT2_UFSMASK(0);
417 	qh->qh_endpt2 = cpu_to_hc32(endpt);
418 	ehci_update_endpt2_dev_n_port(dev, qh);
419 	qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
420 	qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
421 
422 	tdp = &qh->qh_overlay.qt_next;
423 	if (req != NULL) {
424 		/*
425 		 * Setup request qTD (3.5 in ehci-r10.pdf)
426 		 *
427 		 *   qt_next ................ 03-00 H
428 		 *   qt_altnext ............. 07-04 H
429 		 *   qt_token ............... 0B-08 H
430 		 *
431 		 *   [ buffer, buffer_hi ] loaded with "req".
432 		 */
433 		qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
434 		qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
435 		token = QT_TOKEN_DT(0) | QT_TOKEN_TOTALBYTES(sizeof(*req)) |
436 			QT_TOKEN_IOC(0) | QT_TOKEN_CPAGE(0) | QT_TOKEN_CERR(3) |
437 			QT_TOKEN_PID(QT_TOKEN_PID_SETUP) |
438 			QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
439 		qtd[qtd_counter].qt_token = cpu_to_hc32(token);
440 		if (ehci_td_buffer(&qtd[qtd_counter], req, sizeof(*req))) {
441 			printf("unable to construct SETUP TD\n");
442 			goto fail;
443 		}
444 		/* Update previous qTD! */
445 		*tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
446 		tdp = &qtd[qtd_counter++].qt_next;
447 		toggle = 1;
448 	}
449 
450 	if (length > 0 || req == NULL) {
451 		uint8_t *buf_ptr = buffer;
452 		int left_length = length;
453 
454 		do {
455 			/*
456 			 * Determine the size of this qTD transfer. By default,
457 			 * QT_BUFFER_CNT full pages can be used.
458 			 */
459 			int xfr_bytes = QT_BUFFER_CNT * EHCI_PAGE_SIZE;
460 			/*
461 			 * However, if the input buffer is not page-aligned, the
462 			 * portion of the first page before the buffer start
463 			 * offset within that page is unusable.
464 			 */
465 			xfr_bytes -= (unsigned long)buf_ptr & (EHCI_PAGE_SIZE - 1);
466 			/*
467 			 * In order to keep each packet within a qTD transfer,
468 			 * align the qTD transfer size to PKT_ALIGN.
469 			 */
470 			xfr_bytes &= ~(PKT_ALIGN - 1);
471 			/*
472 			 * This transfer may be shorter than the available qTD
473 			 * transfer size that has just been computed.
474 			 */
475 			xfr_bytes = min(xfr_bytes, left_length);
476 
477 			/*
478 			 * Setup request qTD (3.5 in ehci-r10.pdf)
479 			 *
480 			 *   qt_next ................ 03-00 H
481 			 *   qt_altnext ............. 07-04 H
482 			 *   qt_token ............... 0B-08 H
483 			 *
484 			 *   [ buffer, buffer_hi ] loaded with "buffer".
485 			 */
486 			qtd[qtd_counter].qt_next =
487 					cpu_to_hc32(QT_NEXT_TERMINATE);
488 			qtd[qtd_counter].qt_altnext =
489 					cpu_to_hc32(QT_NEXT_TERMINATE);
490 			token = QT_TOKEN_DT(toggle) |
491 				QT_TOKEN_TOTALBYTES(xfr_bytes) |
492 				QT_TOKEN_IOC(req == NULL) | QT_TOKEN_CPAGE(0) |
493 				QT_TOKEN_CERR(3) |
494 				QT_TOKEN_PID(usb_pipein(pipe) ?
495 					QT_TOKEN_PID_IN : QT_TOKEN_PID_OUT) |
496 				QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
497 			qtd[qtd_counter].qt_token = cpu_to_hc32(token);
498 			if (ehci_td_buffer(&qtd[qtd_counter], buf_ptr,
499 						xfr_bytes)) {
500 				printf("unable to construct DATA TD\n");
501 				goto fail;
502 			}
503 			/* Update previous qTD! */
504 			*tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
505 			tdp = &qtd[qtd_counter++].qt_next;
506 			/*
507 			 * Data toggle has to be adjusted since the qTD transfer
508 			 * size is not always an even multiple of
509 			 * wMaxPacketSize.
510 			 */
511 			if ((xfr_bytes / maxpacket) & 1)
512 				toggle ^= 1;
513 			buf_ptr += xfr_bytes;
514 			left_length -= xfr_bytes;
515 		} while (left_length > 0);
516 	}
517 
518 	if (req != NULL) {
519 		/*
520 		 * Setup request qTD (3.5 in ehci-r10.pdf)
521 		 *
522 		 *   qt_next ................ 03-00 H
523 		 *   qt_altnext ............. 07-04 H
524 		 *   qt_token ............... 0B-08 H
525 		 */
526 		qtd[qtd_counter].qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
527 		qtd[qtd_counter].qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
528 		token = QT_TOKEN_DT(1) | QT_TOKEN_TOTALBYTES(0) |
529 			QT_TOKEN_IOC(1) | QT_TOKEN_CPAGE(0) | QT_TOKEN_CERR(3) |
530 			QT_TOKEN_PID(usb_pipein(pipe) ?
531 				QT_TOKEN_PID_OUT : QT_TOKEN_PID_IN) |
532 			QT_TOKEN_STATUS(QT_TOKEN_STATUS_ACTIVE);
533 		qtd[qtd_counter].qt_token = cpu_to_hc32(token);
534 		/* Update previous qTD! */
535 		*tdp = cpu_to_hc32(virt_to_phys(&qtd[qtd_counter]));
536 		tdp = &qtd[qtd_counter++].qt_next;
537 	}
538 
539 	ctrl->qh_list.qh_link = cpu_to_hc32(virt_to_phys(qh) | QH_LINK_TYPE_QH);
540 
541 	/* Flush dcache */
542 	flush_dcache_range((unsigned long)&ctrl->qh_list,
543 		ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
544 	flush_dcache_range((unsigned long)qh, ALIGN_END_ADDR(struct QH, qh, 1));
545 	flush_dcache_range((unsigned long)qtd,
546 			   ALIGN_END_ADDR(struct qTD, qtd, qtd_count));
547 
548 	/* Set async. queue head pointer. */
549 	ehci_writel(&ctrl->hcor->or_asynclistaddr, virt_to_phys(&ctrl->qh_list));
550 
551 	usbsts = ehci_readl(&ctrl->hcor->or_usbsts);
552 	ehci_writel(&ctrl->hcor->or_usbsts, (usbsts & 0x3f));
553 
554 	/* Enable async. schedule. */
555 	cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
556 	cmd |= CMD_ASE;
557 	ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
558 
559 	ret = handshake((uint32_t *)&ctrl->hcor->or_usbsts, STS_ASS, STS_ASS,
560 			100 * 1000);
561 	if (ret < 0) {
562 		printf("EHCI fail timeout STS_ASS set\n");
563 		goto fail;
564 	}
565 
566 	/* Wait for TDs to be processed. */
567 	ts = get_timer(0);
568 	vtd = &qtd[qtd_counter - 1];
569 	timeout = USB_TIMEOUT_MS(pipe);
570 	do {
571 		/* Invalidate dcache */
572 		invalidate_dcache_range((unsigned long)&ctrl->qh_list,
573 			ALIGN_END_ADDR(struct QH, &ctrl->qh_list, 1));
574 		invalidate_dcache_range((unsigned long)qh,
575 			ALIGN_END_ADDR(struct QH, qh, 1));
576 		invalidate_dcache_range((unsigned long)qtd,
577 			ALIGN_END_ADDR(struct qTD, qtd, qtd_count));
578 
579 		token = hc32_to_cpu(vtd->qt_token);
580 		if (!(QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE))
581 			break;
582 		WATCHDOG_RESET();
583 	} while (get_timer(ts) < timeout);
584 
585 	/*
586 	 * Invalidate the memory area occupied by buffer
587 	 * Don't try to fix the buffer alignment, if it isn't properly
588 	 * aligned it's upper layer's fault so let invalidate_dcache_range()
589 	 * vow about it. But we have to fix the length as it's actual
590 	 * transfer length and can be unaligned. This is potentially
591 	 * dangerous operation, it's responsibility of the calling
592 	 * code to make sure enough space is reserved.
593 	 */
594 	if (buffer != NULL && length > 0)
595 		invalidate_dcache_range((unsigned long)buffer,
596 			ALIGN((unsigned long)buffer + length, ARCH_DMA_MINALIGN));
597 
598 	/* Check that the TD processing happened */
599 	if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE)
600 		printf("EHCI timed out on TD - token=%#x\n", token);
601 
602 	/* Disable async schedule. */
603 	cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
604 	cmd &= ~CMD_ASE;
605 	ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
606 
607 	ret = handshake((uint32_t *)&ctrl->hcor->or_usbsts, STS_ASS, 0,
608 			100 * 1000);
609 	if (ret < 0) {
610 		printf("EHCI fail timeout STS_ASS reset\n");
611 		goto fail;
612 	}
613 
614 	token = hc32_to_cpu(qh->qh_overlay.qt_token);
615 	if (!(QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE)) {
616 		debug("TOKEN=%#x\n", token);
617 		switch (QT_TOKEN_GET_STATUS(token) &
618 			~(QT_TOKEN_STATUS_SPLITXSTATE | QT_TOKEN_STATUS_PERR)) {
619 		case 0:
620 			toggle = QT_TOKEN_GET_DT(token);
621 			usb_settoggle(dev, usb_pipeendpoint(pipe),
622 				       usb_pipeout(pipe), toggle);
623 			dev->status = 0;
624 			break;
625 		case QT_TOKEN_STATUS_HALTED:
626 			dev->status = USB_ST_STALLED;
627 			break;
628 		case QT_TOKEN_STATUS_ACTIVE | QT_TOKEN_STATUS_DATBUFERR:
629 		case QT_TOKEN_STATUS_DATBUFERR:
630 			dev->status = USB_ST_BUF_ERR;
631 			break;
632 		case QT_TOKEN_STATUS_HALTED | QT_TOKEN_STATUS_BABBLEDET:
633 		case QT_TOKEN_STATUS_BABBLEDET:
634 			dev->status = USB_ST_BABBLE_DET;
635 			break;
636 		default:
637 			dev->status = USB_ST_CRC_ERR;
638 			if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_HALTED)
639 				dev->status |= USB_ST_STALLED;
640 			break;
641 		}
642 		dev->act_len = length - QT_TOKEN_GET_TOTALBYTES(token);
643 	} else {
644 		dev->act_len = 0;
645 #ifndef CONFIG_USB_EHCI_FARADAY
646 		debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
647 		      dev->devnum, ehci_readl(&ctrl->hcor->or_usbsts),
648 		      ehci_readl(&ctrl->hcor->or_portsc[0]),
649 		      ehci_readl(&ctrl->hcor->or_portsc[1]));
650 #endif
651 	}
652 
653 	free(qtd);
654 	return (dev->status != USB_ST_NOT_PROC) ? 0 : -1;
655 
656 fail:
657 	free(qtd);
658 	return -1;
659 }
660 
ehci_submit_root(struct usb_device * dev,unsigned long pipe,void * buffer,int length,struct devrequest * req)661 static int ehci_submit_root(struct usb_device *dev, unsigned long pipe,
662 			    void *buffer, int length, struct devrequest *req)
663 {
664 	uint8_t tmpbuf[4];
665 	u16 typeReq;
666 	void *srcptr = NULL;
667 	int len, srclen;
668 	uint32_t reg;
669 	uint32_t *status_reg;
670 	int port = le16_to_cpu(req->index) & 0xff;
671 	struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
672 
673 	srclen = 0;
674 
675 	debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
676 	      req->request, req->request,
677 	      req->requesttype, req->requesttype,
678 	      le16_to_cpu(req->value), le16_to_cpu(req->index));
679 
680 	typeReq = req->request | req->requesttype << 8;
681 
682 	switch (typeReq) {
683 	case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
684 	case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
685 	case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
686 		status_reg = ctrl->ops.get_portsc_register(ctrl, port - 1);
687 		if (!status_reg)
688 			return -1;
689 		break;
690 	default:
691 		status_reg = NULL;
692 		break;
693 	}
694 
695 	switch (typeReq) {
696 	case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
697 		switch (le16_to_cpu(req->value) >> 8) {
698 		case USB_DT_DEVICE:
699 			debug("USB_DT_DEVICE request\n");
700 			srcptr = &descriptor.device;
701 			srclen = descriptor.device.bLength;
702 			break;
703 		case USB_DT_CONFIG:
704 			debug("USB_DT_CONFIG config\n");
705 			srcptr = &descriptor.config;
706 			srclen = descriptor.config.bLength +
707 					descriptor.interface.bLength +
708 					descriptor.endpoint.bLength;
709 			break;
710 		case USB_DT_STRING:
711 			debug("USB_DT_STRING config\n");
712 			switch (le16_to_cpu(req->value) & 0xff) {
713 			case 0:	/* Language */
714 				srcptr = "\4\3\1\0";
715 				srclen = 4;
716 				break;
717 			case 1:	/* Vendor */
718 				srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
719 				srclen = 14;
720 				break;
721 			case 2:	/* Product */
722 				srcptr = "\52\3E\0H\0C\0I\0 "
723 					 "\0H\0o\0s\0t\0 "
724 					 "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
725 				srclen = 42;
726 				break;
727 			default:
728 				debug("unknown value DT_STRING %x\n",
729 					le16_to_cpu(req->value));
730 				goto unknown;
731 			}
732 			break;
733 		default:
734 			debug("unknown value %x\n", le16_to_cpu(req->value));
735 			goto unknown;
736 		}
737 		break;
738 	case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
739 		switch (le16_to_cpu(req->value) >> 8) {
740 		case USB_DT_HUB:
741 			debug("USB_DT_HUB config\n");
742 			srcptr = &descriptor.hub;
743 			srclen = descriptor.hub.bLength;
744 			break;
745 		default:
746 			debug("unknown value %x\n", le16_to_cpu(req->value));
747 			goto unknown;
748 		}
749 		break;
750 	case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
751 		debug("USB_REQ_SET_ADDRESS\n");
752 		ctrl->rootdev = le16_to_cpu(req->value);
753 		break;
754 	case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
755 		debug("USB_REQ_SET_CONFIGURATION\n");
756 		/* Nothing to do */
757 		break;
758 	case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
759 		tmpbuf[0] = 1;	/* USB_STATUS_SELFPOWERED */
760 		tmpbuf[1] = 0;
761 		srcptr = tmpbuf;
762 		srclen = 2;
763 		break;
764 	case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
765 		memset(tmpbuf, 0, 4);
766 		reg = ehci_readl(status_reg);
767 		if (reg & EHCI_PS_CS)
768 			tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
769 		if (reg & EHCI_PS_PE)
770 			tmpbuf[0] |= USB_PORT_STAT_ENABLE;
771 		if (reg & EHCI_PS_SUSP)
772 			tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
773 		if (reg & EHCI_PS_OCA)
774 			tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
775 		if (reg & EHCI_PS_PR)
776 			tmpbuf[0] |= USB_PORT_STAT_RESET;
777 		if (reg & EHCI_PS_PP)
778 			tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
779 
780 		if (ehci_is_TDI()) {
781 			switch (ctrl->ops.get_port_speed(ctrl, reg)) {
782 			case PORTSC_PSPD_FS:
783 				break;
784 			case PORTSC_PSPD_LS:
785 				tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
786 				break;
787 			case PORTSC_PSPD_HS:
788 			default:
789 				tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
790 				break;
791 			}
792 		} else {
793 			tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
794 		}
795 
796 		if (reg & EHCI_PS_CSC)
797 			tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
798 		if (reg & EHCI_PS_PEC)
799 			tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
800 		if (reg & EHCI_PS_OCC)
801 			tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
802 		if (ctrl->portreset & (1 << port))
803 			tmpbuf[2] |= USB_PORT_STAT_C_RESET;
804 
805 		srcptr = tmpbuf;
806 		srclen = 4;
807 		break;
808 	case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
809 		reg = ehci_readl(status_reg);
810 		reg &= ~EHCI_PS_CLEAR;
811 		switch (le16_to_cpu(req->value)) {
812 		case USB_PORT_FEAT_ENABLE:
813 			reg |= EHCI_PS_PE;
814 			ehci_writel(status_reg, reg);
815 			break;
816 		case USB_PORT_FEAT_POWER:
817 			if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams))) {
818 				reg |= EHCI_PS_PP;
819 				ehci_writel(status_reg, reg);
820 			}
821 			break;
822 		case USB_PORT_FEAT_RESET:
823 			if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS &&
824 			    !ehci_is_TDI() &&
825 			    EHCI_PS_IS_LOWSPEED(reg)) {
826 				/* Low speed device, give up ownership. */
827 				debug("port %d low speed --> companion\n",
828 				      port - 1);
829 				reg |= EHCI_PS_PO;
830 				ehci_writel(status_reg, reg);
831 				return -ENXIO;
832 			} else {
833 				int ret;
834 
835 				reg |= EHCI_PS_PR;
836 				reg &= ~EHCI_PS_PE;
837 				ehci_writel(status_reg, reg);
838 				/*
839 				 * caller must wait, then call GetPortStatus
840 				 * usb 2.0 specification say 50 ms resets on
841 				 * root
842 				 */
843 				ctrl->ops.powerup_fixup(ctrl, status_reg, &reg);
844 
845 				ehci_writel(status_reg, reg & ~EHCI_PS_PR);
846 				/*
847 				 * A host controller must terminate the reset
848 				 * and stabilize the state of the port within
849 				 * 2 milliseconds
850 				 */
851 				ret = handshake(status_reg, EHCI_PS_PR, 0,
852 						2 * 1000);
853 				if (!ret) {
854 					reg = ehci_readl(status_reg);
855 					if ((reg & (EHCI_PS_PE | EHCI_PS_CS))
856 					    == EHCI_PS_CS && !ehci_is_TDI()) {
857 						debug("port %d full speed --> companion\n", port - 1);
858 						reg &= ~EHCI_PS_CLEAR;
859 						reg |= EHCI_PS_PO;
860 						ehci_writel(status_reg, reg);
861 						return -ENXIO;
862 					} else {
863 						ctrl->portreset |= 1 << port;
864 					}
865 				} else {
866 					printf("port(%d) reset error\n",
867 					       port - 1);
868 				}
869 			}
870 			break;
871 		case USB_PORT_FEAT_TEST:
872 			ehci_shutdown(ctrl);
873 			reg &= ~(0xf << 16);
874 			reg |= ((le16_to_cpu(req->index) >> 8) & 0xf) << 16;
875 			ehci_writel(status_reg, reg);
876 			break;
877 		default:
878 			debug("unknown feature %x\n", le16_to_cpu(req->value));
879 			goto unknown;
880 		}
881 		/* unblock posted writes */
882 		(void) ehci_readl(&ctrl->hcor->or_usbcmd);
883 		break;
884 	case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
885 		reg = ehci_readl(status_reg);
886 		reg &= ~EHCI_PS_CLEAR;
887 		switch (le16_to_cpu(req->value)) {
888 		case USB_PORT_FEAT_ENABLE:
889 			reg &= ~EHCI_PS_PE;
890 			break;
891 		case USB_PORT_FEAT_C_ENABLE:
892 			reg |= EHCI_PS_PE;
893 			break;
894 		case USB_PORT_FEAT_POWER:
895 			if (HCS_PPC(ehci_readl(&ctrl->hccr->cr_hcsparams)))
896 				reg &= ~EHCI_PS_PP;
897 			break;
898 		case USB_PORT_FEAT_C_CONNECTION:
899 			reg |= EHCI_PS_CSC;
900 			break;
901 		case USB_PORT_FEAT_OVER_CURRENT:
902 			reg |= EHCI_PS_OCC;
903 			break;
904 		case USB_PORT_FEAT_C_RESET:
905 			ctrl->portreset &= ~(1 << port);
906 			break;
907 		default:
908 			debug("unknown feature %x\n", le16_to_cpu(req->value));
909 			goto unknown;
910 		}
911 		ehci_writel(status_reg, reg);
912 		/* unblock posted write */
913 		(void) ehci_readl(&ctrl->hcor->or_usbcmd);
914 		break;
915 	default:
916 		debug("Unknown request\n");
917 		goto unknown;
918 	}
919 
920 	mdelay(1);
921 	len = min3(srclen, (int)le16_to_cpu(req->length), length);
922 	if (srcptr != NULL && len > 0)
923 		memcpy(buffer, srcptr, len);
924 	else
925 		debug("Len is 0\n");
926 
927 	dev->act_len = len;
928 	dev->status = 0;
929 	return 0;
930 
931 unknown:
932 	debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
933 	      req->requesttype, req->request, le16_to_cpu(req->value),
934 	      le16_to_cpu(req->index), le16_to_cpu(req->length));
935 
936 	dev->act_len = 0;
937 	dev->status = USB_ST_STALLED;
938 	return -1;
939 }
940 
941 static const struct ehci_ops default_ehci_ops = {
942 	.set_usb_mode		= ehci_set_usbmode,
943 	.get_port_speed		= ehci_get_port_speed,
944 	.powerup_fixup		= ehci_powerup_fixup,
945 	.get_portsc_register	= ehci_get_portsc_register,
946 };
947 
ehci_setup_ops(struct ehci_ctrl * ctrl,const struct ehci_ops * ops)948 static void ehci_setup_ops(struct ehci_ctrl *ctrl, const struct ehci_ops *ops)
949 {
950 	if (!ops) {
951 		ctrl->ops = default_ehci_ops;
952 	} else {
953 		ctrl->ops = *ops;
954 		if (!ctrl->ops.set_usb_mode)
955 			ctrl->ops.set_usb_mode = ehci_set_usbmode;
956 		if (!ctrl->ops.get_port_speed)
957 			ctrl->ops.get_port_speed = ehci_get_port_speed;
958 		if (!ctrl->ops.powerup_fixup)
959 			ctrl->ops.powerup_fixup = ehci_powerup_fixup;
960 		if (!ctrl->ops.get_portsc_register)
961 			ctrl->ops.get_portsc_register =
962 					ehci_get_portsc_register;
963 	}
964 }
965 
966 #ifndef CONFIG_DM_USB
ehci_set_controller_priv(int index,void * priv,const struct ehci_ops * ops)967 void ehci_set_controller_priv(int index, void *priv, const struct ehci_ops *ops)
968 {
969 	struct ehci_ctrl *ctrl = &ehcic[index];
970 
971 	ctrl->priv = priv;
972 	ehci_setup_ops(ctrl, ops);
973 }
974 
ehci_get_controller_priv(int index)975 void *ehci_get_controller_priv(int index)
976 {
977 	return ehcic[index].priv;
978 }
979 #endif
980 
ehci_common_init(struct ehci_ctrl * ctrl,uint tweaks)981 static int ehci_common_init(struct ehci_ctrl *ctrl, uint tweaks)
982 {
983 	struct QH *qh_list;
984 	struct QH *periodic;
985 	uint32_t reg;
986 	uint32_t cmd;
987 	int i;
988 
989 	/* Set the high address word (aka segment) for 64-bit controller */
990 	if (ehci_readl(&ctrl->hccr->cr_hccparams) & 1)
991 		ehci_writel(&ctrl->hcor->or_ctrldssegment, 0);
992 
993 	qh_list = &ctrl->qh_list;
994 
995 	/* Set head of reclaim list */
996 	memset(qh_list, 0, sizeof(*qh_list));
997 	qh_list->qh_link = cpu_to_hc32(virt_to_phys(qh_list) | QH_LINK_TYPE_QH);
998 	qh_list->qh_endpt1 = cpu_to_hc32(QH_ENDPT1_H(1) |
999 						QH_ENDPT1_EPS(USB_SPEED_HIGH));
1000 	qh_list->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1001 	qh_list->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1002 	qh_list->qh_overlay.qt_token =
1003 			cpu_to_hc32(QT_TOKEN_STATUS(QT_TOKEN_STATUS_HALTED));
1004 
1005 	flush_dcache_range((unsigned long)qh_list,
1006 			   ALIGN_END_ADDR(struct QH, qh_list, 1));
1007 
1008 	/* Set async. queue head pointer. */
1009 	ehci_writel(&ctrl->hcor->or_asynclistaddr, virt_to_phys(qh_list));
1010 
1011 	/*
1012 	 * Set up periodic list
1013 	 * Step 1: Parent QH for all periodic transfers.
1014 	 */
1015 	ctrl->periodic_schedules = 0;
1016 	periodic = &ctrl->periodic_queue;
1017 	memset(periodic, 0, sizeof(*periodic));
1018 	periodic->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
1019 	periodic->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1020 	periodic->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1021 
1022 	flush_dcache_range((unsigned long)periodic,
1023 			   ALIGN_END_ADDR(struct QH, periodic, 1));
1024 
1025 	/*
1026 	 * Step 2: Setup frame-list: Every microframe, USB tries the same list.
1027 	 *         In particular, device specifications on polling frequency
1028 	 *         are disregarded. Keyboards seem to send NAK/NYet reliably
1029 	 *         when polled with an empty buffer.
1030 	 *
1031 	 *         Split Transactions will be spread across microframes using
1032 	 *         S-mask and C-mask.
1033 	 */
1034 	if (ctrl->periodic_list == NULL)
1035 		ctrl->periodic_list = memalign(4096, 1024 * 4);
1036 
1037 	if (!ctrl->periodic_list)
1038 		return -ENOMEM;
1039 	for (i = 0; i < 1024; i++) {
1040 		ctrl->periodic_list[i] = cpu_to_hc32((unsigned long)periodic
1041 						| QH_LINK_TYPE_QH);
1042 	}
1043 
1044 	flush_dcache_range((unsigned long)ctrl->periodic_list,
1045 			   ALIGN_END_ADDR(uint32_t, ctrl->periodic_list,
1046 					  1024));
1047 
1048 	/* Set periodic list base address */
1049 	ehci_writel(&ctrl->hcor->or_periodiclistbase,
1050 		(unsigned long)ctrl->periodic_list);
1051 
1052 	reg = ehci_readl(&ctrl->hccr->cr_hcsparams);
1053 	descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
1054 	debug("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
1055 	/* Port Indicators */
1056 	if (HCS_INDICATOR(reg))
1057 		put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
1058 				| 0x80, &descriptor.hub.wHubCharacteristics);
1059 	/* Port Power Control */
1060 	if (HCS_PPC(reg))
1061 		put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
1062 				| 0x01, &descriptor.hub.wHubCharacteristics);
1063 
1064 	/* Start the host controller. */
1065 	cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
1066 	/*
1067 	 * Philips, Intel, and maybe others need CMD_RUN before the
1068 	 * root hub will detect new devices (why?); NEC doesn't
1069 	 */
1070 	cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
1071 	cmd |= CMD_RUN;
1072 	ehci_writel(&ctrl->hcor->or_usbcmd, cmd);
1073 
1074 	if (!(tweaks & EHCI_TWEAK_NO_INIT_CF)) {
1075 		/* take control over the ports */
1076 		cmd = ehci_readl(&ctrl->hcor->or_configflag);
1077 		cmd |= FLAG_CF;
1078 		ehci_writel(&ctrl->hcor->or_configflag, cmd);
1079 	}
1080 
1081 	/* unblock posted write */
1082 	cmd = ehci_readl(&ctrl->hcor->or_usbcmd);
1083 	mdelay(5);
1084 	reg = HC_VERSION(ehci_readl(&ctrl->hccr->cr_capbase));
1085 	printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff);
1086 
1087 	return 0;
1088 }
1089 
1090 #ifndef CONFIG_DM_USB
usb_lowlevel_stop(int index)1091 int usb_lowlevel_stop(int index)
1092 {
1093 	ehci_shutdown(&ehcic[index]);
1094 	return ehci_hcd_stop(index);
1095 }
1096 
usb_lowlevel_init(int index,enum usb_init_type init,void ** controller)1097 int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
1098 {
1099 	struct ehci_ctrl *ctrl = &ehcic[index];
1100 	uint tweaks = 0;
1101 	int rc;
1102 
1103 	/**
1104 	 * Set ops to default_ehci_ops, ehci_hcd_init should call
1105 	 * ehci_set_controller_priv to change any of these function pointers.
1106 	 */
1107 	ctrl->ops = default_ehci_ops;
1108 
1109 	rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor);
1110 	if (rc)
1111 		return rc;
1112 	if (!ctrl->hccr || !ctrl->hcor)
1113 		return -1;
1114 	if (init == USB_INIT_DEVICE)
1115 		goto done;
1116 
1117 	/* EHCI spec section 4.1 */
1118 	if (ehci_reset(ctrl))
1119 		return -1;
1120 
1121 #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
1122 	rc = ehci_hcd_init(index, init, &ctrl->hccr, &ctrl->hcor);
1123 	if (rc)
1124 		return rc;
1125 #endif
1126 #ifdef CONFIG_USB_EHCI_FARADAY
1127 	tweaks |= EHCI_TWEAK_NO_INIT_CF;
1128 #endif
1129 	rc = ehci_common_init(ctrl, tweaks);
1130 	if (rc)
1131 		return rc;
1132 
1133 	ctrl->rootdev = 0;
1134 done:
1135 	*controller = &ehcic[index];
1136 	return 0;
1137 }
1138 #endif
1139 
_ehci_submit_bulk_msg(struct usb_device * dev,unsigned long pipe,void * buffer,int length)1140 static int _ehci_submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
1141 				 void *buffer, int length)
1142 {
1143 
1144 	if (usb_pipetype(pipe) != PIPE_BULK) {
1145 		debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
1146 		return -1;
1147 	}
1148 	return ehci_submit_async(dev, pipe, buffer, length, NULL);
1149 }
1150 
_ehci_submit_control_msg(struct usb_device * dev,unsigned long pipe,void * buffer,int length,struct devrequest * setup)1151 static int _ehci_submit_control_msg(struct usb_device *dev, unsigned long pipe,
1152 				    void *buffer, int length,
1153 				    struct devrequest *setup)
1154 {
1155 	struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1156 
1157 	if (usb_pipetype(pipe) != PIPE_CONTROL) {
1158 		debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
1159 		return -1;
1160 	}
1161 
1162 	if (usb_pipedevice(pipe) == ctrl->rootdev) {
1163 		if (!ctrl->rootdev)
1164 			dev->speed = USB_SPEED_HIGH;
1165 		return ehci_submit_root(dev, pipe, buffer, length, setup);
1166 	}
1167 	return ehci_submit_async(dev, pipe, buffer, length, setup);
1168 }
1169 
1170 struct int_queue {
1171 	int elementsize;
1172 	unsigned long pipe;
1173 	struct QH *first;
1174 	struct QH *current;
1175 	struct QH *last;
1176 	struct qTD *tds;
1177 };
1178 
1179 #define NEXT_QH(qh) (struct QH *)((unsigned long)hc32_to_cpu((qh)->qh_link) & ~0x1f)
1180 
1181 static int
enable_periodic(struct ehci_ctrl * ctrl)1182 enable_periodic(struct ehci_ctrl *ctrl)
1183 {
1184 	uint32_t cmd;
1185 	struct ehci_hcor *hcor = ctrl->hcor;
1186 	int ret;
1187 
1188 	cmd = ehci_readl(&hcor->or_usbcmd);
1189 	cmd |= CMD_PSE;
1190 	ehci_writel(&hcor->or_usbcmd, cmd);
1191 
1192 	ret = handshake((uint32_t *)&hcor->or_usbsts,
1193 			STS_PSS, STS_PSS, 100 * 1000);
1194 	if (ret < 0) {
1195 		printf("EHCI failed: timeout when enabling periodic list\n");
1196 		return -ETIMEDOUT;
1197 	}
1198 	udelay(1000);
1199 	return 0;
1200 }
1201 
1202 static int
disable_periodic(struct ehci_ctrl * ctrl)1203 disable_periodic(struct ehci_ctrl *ctrl)
1204 {
1205 	uint32_t cmd;
1206 	struct ehci_hcor *hcor = ctrl->hcor;
1207 	int ret;
1208 
1209 	cmd = ehci_readl(&hcor->or_usbcmd);
1210 	cmd &= ~CMD_PSE;
1211 	ehci_writel(&hcor->or_usbcmd, cmd);
1212 
1213 	ret = handshake((uint32_t *)&hcor->or_usbsts,
1214 			STS_PSS, 0, 100 * 1000);
1215 	if (ret < 0) {
1216 		printf("EHCI failed: timeout when disabling periodic list\n");
1217 		return -ETIMEDOUT;
1218 	}
1219 	return 0;
1220 }
1221 
_ehci_create_int_queue(struct usb_device * dev,unsigned long pipe,int queuesize,int elementsize,void * buffer,int interval)1222 static struct int_queue *_ehci_create_int_queue(struct usb_device *dev,
1223 			unsigned long pipe, int queuesize, int elementsize,
1224 			void *buffer, int interval)
1225 {
1226 	struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1227 	struct int_queue *result = NULL;
1228 	uint32_t i, toggle;
1229 
1230 	/*
1231 	 * Interrupt transfers requiring several transactions are not supported
1232 	 * because bInterval is ignored.
1233 	 *
1234 	 * Also, ehci_submit_async() relies on wMaxPacketSize being a power of 2
1235 	 * <= PKT_ALIGN if several qTDs are required, while the USB
1236 	 * specification does not constrain this for interrupt transfers. That
1237 	 * means that ehci_submit_async() would support interrupt transfers
1238 	 * requiring several transactions only as long as the transfer size does
1239 	 * not require more than a single qTD.
1240 	 */
1241 	if (elementsize > usb_maxpacket(dev, pipe)) {
1242 		printf("%s: xfers requiring several transactions are not supported.\n",
1243 		       __func__);
1244 		return NULL;
1245 	}
1246 
1247 	debug("Enter create_int_queue\n");
1248 	if (usb_pipetype(pipe) != PIPE_INTERRUPT) {
1249 		debug("non-interrupt pipe (type=%lu)", usb_pipetype(pipe));
1250 		return NULL;
1251 	}
1252 
1253 	/* limit to 4 full pages worth of data -
1254 	 * we can safely fit them in a single TD,
1255 	 * no matter the alignment
1256 	 */
1257 	if (elementsize >= 16384) {
1258 		debug("too large elements for interrupt transfers\n");
1259 		return NULL;
1260 	}
1261 
1262 	result = malloc(sizeof(*result));
1263 	if (!result) {
1264 		debug("ehci intr queue: out of memory\n");
1265 		goto fail1;
1266 	}
1267 	result->elementsize = elementsize;
1268 	result->pipe = pipe;
1269 	result->first = memalign(USB_DMA_MINALIGN,
1270 				 sizeof(struct QH) * queuesize);
1271 	if (!result->first) {
1272 		debug("ehci intr queue: out of memory\n");
1273 		goto fail2;
1274 	}
1275 	result->current = result->first;
1276 	result->last = result->first + queuesize - 1;
1277 	result->tds = memalign(USB_DMA_MINALIGN,
1278 			       sizeof(struct qTD) * queuesize);
1279 	if (!result->tds) {
1280 		debug("ehci intr queue: out of memory\n");
1281 		goto fail3;
1282 	}
1283 	memset(result->first, 0, sizeof(struct QH) * queuesize);
1284 	memset(result->tds, 0, sizeof(struct qTD) * queuesize);
1285 
1286 	toggle = usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
1287 
1288 	for (i = 0; i < queuesize; i++) {
1289 		struct QH *qh = result->first + i;
1290 		struct qTD *td = result->tds + i;
1291 		void **buf = &qh->buffer;
1292 
1293 		qh->qh_link = cpu_to_hc32((unsigned long)(qh+1) | QH_LINK_TYPE_QH);
1294 		if (i == queuesize - 1)
1295 			qh->qh_link = cpu_to_hc32(QH_LINK_TERMINATE);
1296 
1297 		qh->qh_overlay.qt_next = cpu_to_hc32((unsigned long)td);
1298 		qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1299 		qh->qh_endpt1 =
1300 			cpu_to_hc32((0 << 28) | /* No NAK reload (ehci 4.9) */
1301 			(usb_maxpacket(dev, pipe) << 16) | /* MPS */
1302 			(1 << 14) |
1303 			QH_ENDPT1_EPS(ehci_encode_speed(dev->speed)) |
1304 			(usb_pipeendpoint(pipe) << 8) | /* Endpoint Number */
1305 			(usb_pipedevice(pipe) << 0));
1306 		qh->qh_endpt2 = cpu_to_hc32((1 << 30) | /* 1 Tx per mframe */
1307 			(1 << 0)); /* S-mask: microframe 0 */
1308 		if (dev->speed == USB_SPEED_LOW ||
1309 				dev->speed == USB_SPEED_FULL) {
1310 			/* C-mask: microframes 2-4 */
1311 			qh->qh_endpt2 |= cpu_to_hc32((0x1c << 8));
1312 		}
1313 		ehci_update_endpt2_dev_n_port(dev, qh);
1314 
1315 		td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
1316 		td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
1317 		debug("communication direction is '%s'\n",
1318 		      usb_pipein(pipe) ? "in" : "out");
1319 		td->qt_token = cpu_to_hc32(
1320 			QT_TOKEN_DT(toggle) |
1321 			(elementsize << 16) |
1322 			((usb_pipein(pipe) ? 1 : 0) << 8) | /* IN/OUT token */
1323 			0x80); /* active */
1324 		td->qt_buffer[0] =
1325 		    cpu_to_hc32((unsigned long)buffer + i * elementsize);
1326 		td->qt_buffer[1] =
1327 		    cpu_to_hc32((td->qt_buffer[0] + 0x1000) & ~0xfff);
1328 		td->qt_buffer[2] =
1329 		    cpu_to_hc32((td->qt_buffer[0] + 0x2000) & ~0xfff);
1330 		td->qt_buffer[3] =
1331 		    cpu_to_hc32((td->qt_buffer[0] + 0x3000) & ~0xfff);
1332 		td->qt_buffer[4] =
1333 		    cpu_to_hc32((td->qt_buffer[0] + 0x4000) & ~0xfff);
1334 
1335 		*buf = buffer + i * elementsize;
1336 		toggle ^= 1;
1337 	}
1338 
1339 	flush_dcache_range((unsigned long)buffer,
1340 			   ALIGN_END_ADDR(char, buffer,
1341 					  queuesize * elementsize));
1342 	flush_dcache_range((unsigned long)result->first,
1343 			   ALIGN_END_ADDR(struct QH, result->first,
1344 					  queuesize));
1345 	flush_dcache_range((unsigned long)result->tds,
1346 			   ALIGN_END_ADDR(struct qTD, result->tds,
1347 					  queuesize));
1348 
1349 	if (ctrl->periodic_schedules > 0) {
1350 		if (disable_periodic(ctrl) < 0) {
1351 			debug("FATAL: periodic should never fail, but did");
1352 			goto fail3;
1353 		}
1354 	}
1355 
1356 	/* hook up to periodic list */
1357 	struct QH *list = &ctrl->periodic_queue;
1358 	result->last->qh_link = list->qh_link;
1359 	list->qh_link = cpu_to_hc32((unsigned long)result->first | QH_LINK_TYPE_QH);
1360 
1361 	flush_dcache_range((unsigned long)result->last,
1362 			   ALIGN_END_ADDR(struct QH, result->last, 1));
1363 	flush_dcache_range((unsigned long)list,
1364 			   ALIGN_END_ADDR(struct QH, list, 1));
1365 
1366 	if (enable_periodic(ctrl) < 0) {
1367 		debug("FATAL: periodic should never fail, but did");
1368 		goto fail3;
1369 	}
1370 	ctrl->periodic_schedules++;
1371 
1372 	debug("Exit create_int_queue\n");
1373 	return result;
1374 fail3:
1375 	if (result->tds)
1376 		free(result->tds);
1377 fail2:
1378 	if (result->first)
1379 		free(result->first);
1380 	if (result)
1381 		free(result);
1382 fail1:
1383 	return NULL;
1384 }
1385 
_ehci_poll_int_queue(struct usb_device * dev,struct int_queue * queue)1386 static void *_ehci_poll_int_queue(struct usb_device *dev,
1387 				  struct int_queue *queue)
1388 {
1389 	struct QH *cur = queue->current;
1390 	struct qTD *cur_td;
1391 	uint32_t token, toggle;
1392 	unsigned long pipe = queue->pipe;
1393 
1394 	/* depleted queue */
1395 	if (cur == NULL) {
1396 		debug("Exit poll_int_queue with completed queue\n");
1397 		return NULL;
1398 	}
1399 	/* still active */
1400 	cur_td = &queue->tds[queue->current - queue->first];
1401 	invalidate_dcache_range((unsigned long)cur_td,
1402 				ALIGN_END_ADDR(struct qTD, cur_td, 1));
1403 	token = hc32_to_cpu(cur_td->qt_token);
1404 	if (QT_TOKEN_GET_STATUS(token) & QT_TOKEN_STATUS_ACTIVE) {
1405 		debug("Exit poll_int_queue with no completed intr transfer. token is %x\n", token);
1406 		return NULL;
1407 	}
1408 
1409 	toggle = QT_TOKEN_GET_DT(token);
1410 	usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), toggle);
1411 
1412 	if (!(cur->qh_link & QH_LINK_TERMINATE))
1413 		queue->current++;
1414 	else
1415 		queue->current = NULL;
1416 
1417 	invalidate_dcache_range((unsigned long)cur->buffer,
1418 				ALIGN_END_ADDR(char, cur->buffer,
1419 					       queue->elementsize));
1420 
1421 	debug("Exit poll_int_queue with completed intr transfer. token is %x at %p (first at %p)\n",
1422 	      token, cur, queue->first);
1423 	return cur->buffer;
1424 }
1425 
1426 /* Do not free buffers associated with QHs, they're owned by someone else */
_ehci_destroy_int_queue(struct usb_device * dev,struct int_queue * queue)1427 static int _ehci_destroy_int_queue(struct usb_device *dev,
1428 				   struct int_queue *queue)
1429 {
1430 	struct ehci_ctrl *ctrl = ehci_get_ctrl(dev);
1431 	int result = -1;
1432 	unsigned long timeout;
1433 
1434 	if (disable_periodic(ctrl) < 0) {
1435 		debug("FATAL: periodic should never fail, but did");
1436 		goto out;
1437 	}
1438 	ctrl->periodic_schedules--;
1439 
1440 	struct QH *cur = &ctrl->periodic_queue;
1441 	timeout = get_timer(0) + 500; /* abort after 500ms */
1442 	while (!(cur->qh_link & cpu_to_hc32(QH_LINK_TERMINATE))) {
1443 		debug("considering %p, with qh_link %x\n", cur, cur->qh_link);
1444 		if (NEXT_QH(cur) == queue->first) {
1445 			debug("found candidate. removing from chain\n");
1446 			cur->qh_link = queue->last->qh_link;
1447 			flush_dcache_range((unsigned long)cur,
1448 					   ALIGN_END_ADDR(struct QH, cur, 1));
1449 			result = 0;
1450 			break;
1451 		}
1452 		cur = NEXT_QH(cur);
1453 		if (get_timer(0) > timeout) {
1454 			printf("Timeout destroying interrupt endpoint queue\n");
1455 			result = -1;
1456 			goto out;
1457 		}
1458 	}
1459 
1460 	if (ctrl->periodic_schedules > 0) {
1461 		result = enable_periodic(ctrl);
1462 		if (result < 0)
1463 			debug("FATAL: periodic should never fail, but did");
1464 	}
1465 
1466 out:
1467 	free(queue->tds);
1468 	free(queue->first);
1469 	free(queue);
1470 
1471 	return result;
1472 }
1473 
_ehci_submit_int_msg(struct usb_device * dev,unsigned long pipe,void * buffer,int length,int interval)1474 static int _ehci_submit_int_msg(struct usb_device *dev, unsigned long pipe,
1475 				void *buffer, int length, int interval)
1476 {
1477 	void *backbuffer;
1478 	struct int_queue *queue;
1479 	unsigned long timeout;
1480 	int result = 0, ret;
1481 
1482 	debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
1483 	      dev, pipe, buffer, length, interval);
1484 
1485 	queue = _ehci_create_int_queue(dev, pipe, 1, length, buffer, interval);
1486 	if (!queue)
1487 		return -1;
1488 
1489 	timeout = get_timer(0) + USB_TIMEOUT_MS(pipe);
1490 	while ((backbuffer = _ehci_poll_int_queue(dev, queue)) == NULL)
1491 		if (get_timer(0) > timeout) {
1492 			printf("Timeout poll on interrupt endpoint\n");
1493 			result = -ETIMEDOUT;
1494 			break;
1495 		}
1496 
1497 	if (backbuffer != buffer) {
1498 		debug("got wrong buffer back (%p instead of %p)\n",
1499 		      backbuffer, buffer);
1500 		return -EINVAL;
1501 	}
1502 
1503 	ret = _ehci_destroy_int_queue(dev, queue);
1504 	if (ret < 0)
1505 		return ret;
1506 
1507 	/* everything worked out fine */
1508 	return result;
1509 }
1510 
1511 #ifndef CONFIG_DM_USB
submit_bulk_msg(struct usb_device * dev,unsigned long pipe,void * buffer,int length)1512 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe,
1513 			    void *buffer, int length)
1514 {
1515 	return _ehci_submit_bulk_msg(dev, pipe, buffer, length);
1516 }
1517 
submit_control_msg(struct usb_device * dev,unsigned long pipe,void * buffer,int length,struct devrequest * setup)1518 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1519 		   int length, struct devrequest *setup)
1520 {
1521 	return _ehci_submit_control_msg(dev, pipe, buffer, length, setup);
1522 }
1523 
submit_int_msg(struct usb_device * dev,unsigned long pipe,void * buffer,int length,int interval)1524 int submit_int_msg(struct usb_device *dev, unsigned long pipe,
1525 		   void *buffer, int length, int interval)
1526 {
1527 	return _ehci_submit_int_msg(dev, pipe, buffer, length, interval);
1528 }
1529 
create_int_queue(struct usb_device * dev,unsigned long pipe,int queuesize,int elementsize,void * buffer,int interval)1530 struct int_queue *create_int_queue(struct usb_device *dev,
1531 		unsigned long pipe, int queuesize, int elementsize,
1532 		void *buffer, int interval)
1533 {
1534 	return _ehci_create_int_queue(dev, pipe, queuesize, elementsize,
1535 				      buffer, interval);
1536 }
1537 
poll_int_queue(struct usb_device * dev,struct int_queue * queue)1538 void *poll_int_queue(struct usb_device *dev, struct int_queue *queue)
1539 {
1540 	return _ehci_poll_int_queue(dev, queue);
1541 }
1542 
destroy_int_queue(struct usb_device * dev,struct int_queue * queue)1543 int destroy_int_queue(struct usb_device *dev, struct int_queue *queue)
1544 {
1545 	return _ehci_destroy_int_queue(dev, queue);
1546 }
1547 #endif
1548 
1549 #ifdef CONFIG_DM_USB
ehci_submit_control_msg(struct udevice * dev,struct usb_device * udev,unsigned long pipe,void * buffer,int length,struct devrequest * setup)1550 static int ehci_submit_control_msg(struct udevice *dev, struct usb_device *udev,
1551 				   unsigned long pipe, void *buffer, int length,
1552 				   struct devrequest *setup)
1553 {
1554 	debug("%s: dev='%s', udev=%p, udev->dev='%s', portnr=%d\n", __func__,
1555 	      dev->name, udev, udev->dev->name, udev->portnr);
1556 
1557 	return _ehci_submit_control_msg(udev, pipe, buffer, length, setup);
1558 }
1559 
ehci_submit_bulk_msg(struct udevice * dev,struct usb_device * udev,unsigned long pipe,void * buffer,int length)1560 static int ehci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,
1561 				unsigned long pipe, void *buffer, int length)
1562 {
1563 	debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1564 	return _ehci_submit_bulk_msg(udev, pipe, buffer, length);
1565 }
1566 
ehci_submit_int_msg(struct udevice * dev,struct usb_device * udev,unsigned long pipe,void * buffer,int length,int interval)1567 static int ehci_submit_int_msg(struct udevice *dev, struct usb_device *udev,
1568 			       unsigned long pipe, void *buffer, int length,
1569 			       int interval)
1570 {
1571 	debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1572 	return _ehci_submit_int_msg(udev, pipe, buffer, length, interval);
1573 }
1574 
ehci_create_int_queue(struct udevice * dev,struct usb_device * udev,unsigned long pipe,int queuesize,int elementsize,void * buffer,int interval)1575 static struct int_queue *ehci_create_int_queue(struct udevice *dev,
1576 		struct usb_device *udev, unsigned long pipe, int queuesize,
1577 		int elementsize, void *buffer, int interval)
1578 {
1579 	debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1580 	return _ehci_create_int_queue(udev, pipe, queuesize, elementsize,
1581 				      buffer, interval);
1582 }
1583 
ehci_poll_int_queue(struct udevice * dev,struct usb_device * udev,struct int_queue * queue)1584 static void *ehci_poll_int_queue(struct udevice *dev, struct usb_device *udev,
1585 				 struct int_queue *queue)
1586 {
1587 	debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1588 	return _ehci_poll_int_queue(udev, queue);
1589 }
1590 
ehci_destroy_int_queue(struct udevice * dev,struct usb_device * udev,struct int_queue * queue)1591 static int ehci_destroy_int_queue(struct udevice *dev, struct usb_device *udev,
1592 				  struct int_queue *queue)
1593 {
1594 	debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1595 	return _ehci_destroy_int_queue(udev, queue);
1596 }
1597 
ehci_get_max_xfer_size(struct udevice * dev,size_t * size)1598 static int ehci_get_max_xfer_size(struct udevice *dev, size_t *size)
1599 {
1600 	/*
1601 	 * EHCD can handle any transfer length as long as there is enough
1602 	 * free heap space left, hence set the theoretical max number here.
1603 	 */
1604 	*size = SIZE_MAX;
1605 
1606 	return 0;
1607 }
1608 
ehci_register(struct udevice * dev,struct ehci_hccr * hccr,struct ehci_hcor * hcor,const struct ehci_ops * ops,uint tweaks,enum usb_init_type init)1609 int ehci_register(struct udevice *dev, struct ehci_hccr *hccr,
1610 		  struct ehci_hcor *hcor, const struct ehci_ops *ops,
1611 		  uint tweaks, enum usb_init_type init)
1612 {
1613 	struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
1614 	struct ehci_ctrl *ctrl = dev_get_priv(dev);
1615 	int ret = -1;
1616 
1617 	debug("%s: dev='%s', ctrl=%p, hccr=%p, hcor=%p, init=%d\n", __func__,
1618 	      dev->name, ctrl, hccr, hcor, init);
1619 
1620 	if (!ctrl || !hccr || !hcor)
1621 		goto err;
1622 
1623 	priv->desc_before_addr = true;
1624 
1625 	ehci_setup_ops(ctrl, ops);
1626 	ctrl->hccr = hccr;
1627 	ctrl->hcor = hcor;
1628 	ctrl->priv = ctrl;
1629 
1630 	ctrl->init = init;
1631 	if (ctrl->init == USB_INIT_DEVICE)
1632 		goto done;
1633 
1634 	ret = ehci_reset(ctrl);
1635 	if (ret)
1636 		goto err;
1637 
1638 	if (ctrl->ops.init_after_reset) {
1639 		ret = ctrl->ops.init_after_reset(ctrl);
1640 		if (ret)
1641 			goto err;
1642 	}
1643 
1644 	ret = ehci_common_init(ctrl, tweaks);
1645 	if (ret)
1646 		goto err;
1647 done:
1648 	return 0;
1649 err:
1650 	free(ctrl);
1651 	debug("%s: failed, ret=%d\n", __func__, ret);
1652 	return ret;
1653 }
1654 
ehci_deregister(struct udevice * dev)1655 int ehci_deregister(struct udevice *dev)
1656 {
1657 	struct ehci_ctrl *ctrl = dev_get_priv(dev);
1658 
1659 	if (ctrl->init == USB_INIT_DEVICE)
1660 		return 0;
1661 
1662 	ehci_shutdown(ctrl);
1663 
1664 	return 0;
1665 }
1666 
1667 struct dm_usb_ops ehci_usb_ops = {
1668 	.control = ehci_submit_control_msg,
1669 	.bulk = ehci_submit_bulk_msg,
1670 	.interrupt = ehci_submit_int_msg,
1671 	.create_int_queue = ehci_create_int_queue,
1672 	.poll_int_queue = ehci_poll_int_queue,
1673 	.destroy_int_queue = ehci_destroy_int_queue,
1674 	.get_max_xfer_size  = ehci_get_max_xfer_size,
1675 };
1676 
1677 #endif
1678