| /external/swiftshader/third_party/LLVM/lib/Target/ |
| D | TargetSubtargetInfo.cpp | 25 bool TargetSubtargetInfo::enablePostRAScheduler( in enablePostRAScheduler() function in TargetSubtargetInfo
|
| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| D | SPUSubtarget.cpp | 50 bool SPUSubtarget::enablePostRAScheduler( in enablePostRAScheduler() function in SPUSubtarget
|
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| D | MBlazeSubtarget.cpp | 56 enablePostRAScheduler(CodeGenOpt::Level OptLevel, in enablePostRAScheduler() function in MBlazeSubtarget
|
| /external/llvm/lib/Target/ |
| D | TargetSubtargetInfo.cpp | 48 bool TargetSubtargetInfo::enablePostRAScheduler() const { in enablePostRAScheduler() function in TargetSubtargetInfo
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMSubtarget.cpp | 211 bool ARMSubtarget::enablePostRAScheduler( in enablePostRAScheduler() function in ARMSubtarget
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsSubtarget.cpp | 134 bool MipsSubtarget::enablePostRAScheduler() const { return true; } in enablePostRAScheduler() function in MipsSubtarget
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCSubtarget.cpp | 183 bool PPCSubtarget::enablePostRAScheduler() const { return true; } in enablePostRAScheduler() function in PPCSubtarget
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCSubtarget.cpp | 189 bool PPCSubtarget::enablePostRAScheduler() const { return true; } in enablePostRAScheduler() function in PPCSubtarget
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | TargetSubtargetInfo.cpp | 62 bool TargetSubtargetInfo::enablePostRAScheduler() const { in enablePostRAScheduler() function in TargetSubtargetInfo
|
| D | PostRASchedulerList.cpp | 266 bool PostRAScheduler::enablePostRAScheduler( in enablePostRAScheduler() function in PostRAScheduler
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMSubtarget.cpp | 295 bool ARMSubtarget::enablePostRAScheduler() const { in enablePostRAScheduler() function in ARMSubtarget
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsSubtarget.cpp | 214 bool MipsSubtarget::enablePostRAScheduler() const { return true; } in enablePostRAScheduler() function in MipsSubtarget
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonSubtarget.h | 109 bool enablePostRAScheduler() const override { return true; } in enablePostRAScheduler() function
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMSubtarget.cpp | 360 bool ARMSubtarget::enablePostRAScheduler() const { in enablePostRAScheduler() function in ARMSubtarget
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonSubtarget.h | 178 bool enablePostRAScheduler() const override { return true; } in enablePostRAScheduler() function
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64Subtarget.h | 153 bool enablePostRAScheduler() const override { in enablePostRAScheduler() function
|
| /external/llvm/lib/CodeGen/ |
| D | PostRASchedulerList.cpp | 266 bool PostRAScheduler::enablePostRAScheduler( in enablePostRAScheduler() function in PostRAScheduler
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64Subtarget.h | 198 bool enablePostRAScheduler() const override { in enablePostRAScheduler() function
|