/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/SVE/ |
D | eor.s | 10 eor z5.b, z5.b, #0xf9 label 16 eor z23.h, z23.h, #0xfff9 label 22 eor z0.s, z0.s, #0xfffffff9 label 28 eor z0.d, z0.d, #0xfffffffffffffff9 label 34 eor z5.b, z5.b, #0x6 label 40 eor z23.h, z23.h, #0x6 label 46 eor z0.s, z0.s, #0x6 label 52 eor z0.d, z0.d, #0x6 label 58 eor z23.d, z13.d, z8.d label 64 eor z0.d, z0.d, z0.d label [all …]
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D | eor-diagnostics.s | 6 eor z5.b, z5.b, #0xfa label 11 eor z5.b, z5.b, #0xfff9 label 16 eor z5.h, z5.h, #0xfffa label 21 eor z5.h, z5.h, #0xfffffff9 label 26 eor z5.s, z5.s, #0xfffffffa label 31 eor z5.s, z5.s, #0xffffffffffffff9 label 36 eor z15.d, z15.d, #0xfffffffffffffffa label 44 eor z7.d, z8.d, #254 label 49 eor z0.d, p0/m, z1.d, z2.d label 55 eor z21.d, z5.d, z26.b label [all …]
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | arm-arithmetic-aliases.s | 46 eor r2, r2, #6 label 47 eor r2, #6 label 48 eor r2, r2, r3 label 49 eor r2, r3 label
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/external/llvm/test/MC/ARM/ |
D | arm-arithmetic-aliases.s | 46 eor r2, r2, #6 label 47 eor r2, #6 label 48 eor r2, r2, r3 label 49 eor r2, r3 label
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
D | arm-arithmetic-aliases.s | 46 eor r2, r2, #6 label 47 eor r2, #6 label 48 eor r2, r2, r3 label 49 eor r2, r3 label
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
D | arm64-diags.s | 323 eor w0, w0, w0, lsl #32 label
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/external/llvm/test/MC/AArch64/ |
D | arm64-diags.s | 262 eor w0, w0, w0, lsl #32 label
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/external/icu/icu4c/source/common/ |
D | ubidi.cpp | 2128 DirProp sor, DirProp eor) { in resolveImplicitLevels() 2753 DirProp sor, eor; in ubidi_setPara() local
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/external/v8/src/regexp/arm/ |
D | regexp-macro-assembler-arm.cc | 536 __ eor(r0, current_character(), Operand(0x01)); in CheckSpecialCharacterClass() local 553 __ eor(r0, current_character(), Operand(0x01)); in CheckSpecialCharacterClass() local
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/external/icu/icu4j/main/classes/core/src/com/ibm/icu/text/ |
D | Bidi.java | 3403 private void resolveImplicitLevels(int start, int limit, short sor, short eor) in resolveImplicitLevels() 4162 short sor, eor; in setPara() local
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/external/icu/android_icu4j/src/main/java/android/icu/text/ |
D | Bidi.java | 3369 private void resolveImplicitLevels(int start, int limit, short sor, short eor) in resolveImplicitLevels() 4125 short sor, eor; in setPara() local
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/external/u-boot/include/ |
D | fsl_immap.h | 102 u32 eor; /* Enhanced Optimization Register */ member
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/external/boringssl/src/crypto/curve25519/asm/ |
D | x25519-asm-arm.S | 247 eor r4,r4,r2 label
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/external/v8/src/compiler/arm/ |
D | code-generator-arm.cc | 1121 __ eor(i.OutputRegister(), i.InputRegister(0), i.InputOperand2(1), in AssembleArchInstruction() local 2874 __ eor(kSpeculationPoisonRegister, kSpeculationPoisonRegister, in AssembleBranchPoisoning() local
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/external/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 144 __ eor(w19, w20, w21); in GenerateTestSequenceBase() local 145 __ eor(x22, x23, x24); in GenerateTestSequenceBase() local 778 __ eor(v29.V16B(), v25.V16B(), v3.V16B()); in GenerateTestSequenceNEON() local 779 __ eor(v3.V8B(), v16.V8B(), v28.V8B()); in GenerateTestSequenceNEON() local
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/external/vixl/test/aarch32/ |
D | test-assembler-aarch32.cc | 686 __ eor(r5, r2, r3); // Ensure that r2, r3 and r4 are identical. in TEST() local 687 __ eor(r6, r2, r4); in TEST() local 698 __ eor(r1, r1, r2); in TEST() local
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/external/v8/src/builtins/arm/ |
D | builtins-arm.cc | 2499 __ eor(result_reg, result_reg, Operand(double_high, ASR, 31)); in Generate_DoubleToI() local
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/external/vixl/benchmarks/aarch32/ |
D | asm-disasm-speed-test.cc | 260 __ eor(r1, r6, 0x1); in Generate_1() local 6822 __ eor(r1, r5, 0x1); in Generate_52() local 7097 __ eor(r1, r5, 0x1); in Generate_54() local 7372 __ eor(r1, r5, 0x1); in Generate_56() local 7902 __ eor(r1, r5, 0x1); in Generate_60() local 8284 __ eor(r1, r7, 0x1); in Generate_63() local 8692 __ eor(r1, fp, 0x1); in Generate_66() local
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/external/vixl/src/aarch32/ |
D | assembler-aarch32.h | 2201 void eor(Register rd, Register rn, const Operand& operand) { in eor() function 2204 void eor(Condition cond, Register rd, Register rn, const Operand& operand) { in eor() function 2207 void eor(EncodingSize size, in eor() function
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/external/python/cpython3/Lib/test/ |
D | test_socket.py | 2350 def checkFlags(self, flags, eor=None, checkset=0, checkunset=0, ignore=0): argument
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/external/v8/src/arm64/ |
D | assembler-arm64.cc | 1252 void Assembler::eor(const Register& rd, in eor() function in v8::internal::Assembler
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D | simulator-logic-arm64.cc | 1022 LogicVRegister Simulator::eor(VectorFormat vform, LogicVRegister dst, in eor() function in v8::internal::Simulator
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/external/swiftshader/third_party/subzero/src/ |
D | IceAssemblerARM32.cpp | 1526 void AssemblerARM32::eor(const Operand *OpRd, const Operand *OpRn, in eor() function in Ice::ARM32::AssemblerARM32
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/external/v8/src/arm/ |
D | assembler-arm.cc | 1493 void Assembler::eor(Register dst, Register src1, const Operand& src2, in eor() function in v8::internal::Assembler
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/external/vixl/src/aarch64/ |
D | assembler-aarch64.cc | 609 void Assembler::eor(const Register& rd, in eor() function in vixl::aarch64::Assembler
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