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1 //===-- RISCVFixupKinds.h - RISCV Specific Fixup Entries --------*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 
10 #ifndef LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVFIXUPKINDS_H
11 #define LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVFIXUPKINDS_H
12 
13 #include "llvm/MC/MCFixup.h"
14 
15 #undef RISCV
16 
17 namespace llvm {
18 namespace RISCV {
19 enum Fixups {
20   // fixup_riscv_hi20 - 20-bit fixup corresponding to hi(foo) for
21   // instructions like lui
22   fixup_riscv_hi20 = FirstTargetFixupKind,
23   // fixup_riscv_lo12_i - 12-bit fixup corresponding to lo(foo) for
24   // instructions like addi
25   fixup_riscv_lo12_i,
26   // fixup_riscv_lo12_s - 12-bit fixup corresponding to lo(foo) for
27   // the S-type store instructions
28   fixup_riscv_lo12_s,
29   // fixup_riscv_pcrel_hi20 - 20-bit fixup corresponding to pcrel_hi(foo) for
30   // instructions like auipc
31   fixup_riscv_pcrel_hi20,
32   // fixup_riscv_pcrel_lo12_i - 12-bit fixup corresponding to pcrel_lo(foo) for
33   // instructions like addi
34   fixup_riscv_pcrel_lo12_i,
35   // fixup_riscv_pcrel_lo12_s - 12-bit fixup corresponding to pcrel_lo(foo) for
36   // the S-type store instructions
37   fixup_riscv_pcrel_lo12_s,
38   // fixup_riscv_jal - 20-bit fixup for symbol references in the jal
39   // instruction
40   fixup_riscv_jal,
41   // fixup_riscv_branch - 12-bit fixup for symbol references in the branch
42   // instructions
43   fixup_riscv_branch,
44   // fixup_riscv_rvc_jump - 11-bit fixup for symbol references in the
45   // compressed jump instruction
46   fixup_riscv_rvc_jump,
47   // fixup_riscv_rvc_branch - 8-bit fixup for symbol references in the
48   // compressed branch instruction
49   fixup_riscv_rvc_branch,
50   // fixup_riscv_call - A fixup representing a call attached to the auipc
51   // instruction in a pair composed of adjacent auipc+jalr instructions.
52   fixup_riscv_call,
53   // fixup_riscv_relax - Used to generate an R_RISCV_RELAX relocation type,
54   // which indicates the linker may relax the instruction pair.
55   fixup_riscv_relax,
56 
57   // fixup_riscv_invalid - used as a sentinel and a marker, must be last fixup
58   fixup_riscv_invalid,
59   NumTargetFixupKinds = fixup_riscv_invalid - FirstTargetFixupKind
60 };
61 } // end namespace RISCV
62 } // end namespace llvm
63 
64 #endif
65