1 /**********************************************************
2 * Copyright 2009-2015 VMware, Inc. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person
5 * obtaining a copy of this software and associated documentation
6 * files (the "Software"), to deal in the Software without
7 * restriction, including without limitation the rights to use, copy,
8 * modify, merge, publish, distribute, sublicense, and/or sell copies
9 * of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
18 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
19 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 **********************************************************/
25
26 /**
27 * @file
28 * Common definitions for the VMware SVGA winsys.
29 *
30 * @author Jose Fonseca <jfonseca@vmware.com>
31 */
32
33
34 #ifndef VMW_SCREEN_H_
35 #define VMW_SCREEN_H_
36
37
38 #include "pipe/p_compiler.h"
39 #include "pipe/p_state.h"
40
41 #include "svga_winsys.h"
42 #include "pipebuffer/pb_buffer_fenced.h"
43 #include <os/os_thread.h>
44
45 #define VMW_GMR_POOL_SIZE (16*1024*1024)
46 #define VMW_QUERY_POOL_SIZE (8192)
47 #define VMW_DEBUG_FLUSH_STACK 10
48
49 /*
50 * Something big, but arbitrary. The kernel reports an error if it can't
51 * handle this, and the svga driver will resort to multiple partial
52 * uploads.
53 */
54 #define VMW_MAX_BUFFER_SIZE (512*1024*1024)
55
56 struct pb_manager;
57 struct vmw_region;
58
59 struct vmw_cap_3d {
60 boolean has_cap;
61 SVGA3dDevCapResult result;
62 };
63
64 struct vmw_winsys_screen
65 {
66 struct svga_winsys_screen base;
67
68 struct {
69 int drm_fd;
70 uint32_t hwversion;
71 uint32_t num_cap_3d;
72 struct vmw_cap_3d *cap_3d;
73 uint64_t max_mob_memory;
74 uint64_t max_surface_memory;
75 uint64_t max_texture_size;
76 boolean have_drm_2_6;
77 boolean have_drm_2_9;
78 uint32_t drm_execbuf_version;
79 } ioctl;
80
81 struct {
82 struct pb_manager *gmr;
83 struct pb_manager *gmr_mm;
84 struct pb_manager *gmr_fenced;
85 struct pb_manager *gmr_slab;
86 struct pb_manager *gmr_slab_fenced;
87 struct pb_manager *query_mm;
88 struct pb_manager *query_fenced;
89 struct pb_manager *mob_fenced;
90 struct pb_manager *mob_cache;
91 struct pb_manager *mob_shader_slab;
92 struct pb_manager *mob_shader_slab_fenced;
93 } pools;
94
95 struct pb_fence_ops *fence_ops;
96
97 /*
98 * Screen instances
99 */
100 dev_t device;
101 int open_count;
102
103 cnd_t cs_cond;
104 mtx_t cs_mutex;
105 };
106
107
108 static inline struct vmw_winsys_screen *
vmw_winsys_screen(struct svga_winsys_screen * base)109 vmw_winsys_screen(struct svga_winsys_screen *base)
110 {
111 return (struct vmw_winsys_screen *)base;
112 }
113
114 /* */
115 uint32_t
116 vmw_region_size(struct vmw_region *region);
117
118 uint32
119 vmw_ioctl_context_create(struct vmw_winsys_screen *vws);
120
121 uint32
122 vmw_ioctl_extended_context_create(struct vmw_winsys_screen *vws,
123 boolean vgpu10);
124
125 void
126 vmw_ioctl_context_destroy(struct vmw_winsys_screen *vws,
127 uint32 cid);
128
129 uint32
130 vmw_ioctl_surface_create(struct vmw_winsys_screen *vws,
131 SVGA3dSurfaceFlags flags,
132 SVGA3dSurfaceFormat format,
133 unsigned usage,
134 SVGA3dSize size,
135 uint32 numFaces,
136 uint32 numMipLevels,
137 unsigned sampleCount);
138 uint32
139 vmw_ioctl_gb_surface_create(struct vmw_winsys_screen *vws,
140 SVGA3dSurfaceFlags flags,
141 SVGA3dSurfaceFormat format,
142 unsigned usage,
143 SVGA3dSize size,
144 uint32 numFaces,
145 uint32 numMipLevels,
146 unsigned sampleCount,
147 uint32 buffer_handle,
148 struct vmw_region **p_region);
149
150 int
151 vmw_ioctl_gb_surface_ref(struct vmw_winsys_screen *vws,
152 const struct winsys_handle *whandle,
153 SVGA3dSurfaceFlags *flags,
154 SVGA3dSurfaceFormat *format,
155 uint32_t *numMipLevels,
156 uint32_t *handle,
157 struct vmw_region **p_region);
158
159 void
160 vmw_ioctl_surface_destroy(struct vmw_winsys_screen *vws,
161 uint32 sid);
162
163 void
164 vmw_ioctl_command(struct vmw_winsys_screen *vws,
165 int32_t cid,
166 uint32_t throttle_us,
167 void *commands,
168 uint32_t size,
169 struct pipe_fence_handle **fence,
170 int32_t imported_fence_fd,
171 uint32_t flags);
172
173 struct vmw_region *
174 vmw_ioctl_region_create(struct vmw_winsys_screen *vws, uint32_t size);
175
176 void
177 vmw_ioctl_region_destroy(struct vmw_region *region);
178
179 struct SVGAGuestPtr
180 vmw_ioctl_region_ptr(struct vmw_region *region);
181
182 void *
183 vmw_ioctl_region_map(struct vmw_region *region);
184 void
185 vmw_ioctl_region_unmap(struct vmw_region *region);
186
187
188 int
189 vmw_ioctl_fence_finish(struct vmw_winsys_screen *vws,
190 uint32_t handle, uint32_t flags);
191
192 int
193 vmw_ioctl_fence_signalled(struct vmw_winsys_screen *vws,
194 uint32_t handle, uint32_t flags);
195
196 void
197 vmw_ioctl_fence_unref(struct vmw_winsys_screen *vws,
198 uint32_t handle);
199
200 uint32
201 vmw_ioctl_shader_create(struct vmw_winsys_screen *vws,
202 SVGA3dShaderType type,
203 uint32 code_len);
204 void
205 vmw_ioctl_shader_destroy(struct vmw_winsys_screen *vws, uint32 shid);
206
207 int
208 vmw_ioctl_syncforcpu(struct vmw_region *region,
209 boolean dont_block,
210 boolean readonly,
211 boolean allow_cs);
212 void
213 vmw_ioctl_releasefromcpu(struct vmw_region *region,
214 boolean readonly,
215 boolean allow_cs);
216 /* Initialize parts of vmw_winsys_screen at startup:
217 */
218 boolean vmw_ioctl_init(struct vmw_winsys_screen *vws);
219 boolean vmw_pools_init(struct vmw_winsys_screen *vws);
220 boolean vmw_query_pools_init(struct vmw_winsys_screen *vws);
221 boolean vmw_mob_pools_init(struct vmw_winsys_screen *vws);
222 boolean vmw_winsys_screen_init_svga(struct vmw_winsys_screen *vws);
223
224 void vmw_ioctl_cleanup(struct vmw_winsys_screen *vws);
225 void vmw_pools_cleanup(struct vmw_winsys_screen *vws);
226
227 struct vmw_winsys_screen *vmw_winsys_create(int fd);
228 void vmw_winsys_destroy(struct vmw_winsys_screen *sws);
229 void vmw_winsys_screen_set_throttling(struct pipe_screen *screen,
230 uint32_t throttle_us);
231
232 struct pb_manager *
233 simple_fenced_bufmgr_create(struct pb_manager *provider,
234 struct pb_fence_ops *ops);
235 void
236 vmw_fences_signal(struct pb_fence_ops *fence_ops,
237 uint32_t signaled,
238 uint32_t emitted,
239 boolean has_emitted);
240
241 struct svga_winsys_gb_shader *
242 vmw_svga_winsys_shader_create(struct svga_winsys_screen *sws,
243 SVGA3dShaderType type,
244 const uint32 *bytecode,
245 uint32 bytecodeLen);
246 void
247 vmw_svga_winsys_shader_destroy(struct svga_winsys_screen *sws,
248 struct svga_winsys_gb_shader *shader);
249
250 #endif /* VMW_SCREEN_H_ */
251