1 /* 2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <pmu_regs.h> 8 #include "rk3399_mcu.h" 9 10 #define M0_SCR 0xe000ed10 /* System Control Register (SCR) */ 11 12 #define SCR_SLEEPDEEP_SHIFT (1 << 2) 13 handle_suspend(void)14void handle_suspend(void) 15 { 16 unsigned int status_value; 17 18 while (1) { 19 status_value = mmio_read_32(PMU_BASE + PMU_POWER_ST); 20 if (status_value) { 21 mmio_clrbits_32(PMU_BASE + PMU_PWRMODE_CON, 0x01); 22 return; 23 } 24 } 25 26 /* m0 enter deep sleep mode */ 27 mmio_setbits_32(M0_SCR, SCR_SLEEPDEEP_SHIFT); 28 } 29