| /external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMCCodeEmitter.cpp | 439 bool isAdd = true; in EncodeAddrModeOpValues() local
705 bool isAdd = true; in getAddrModeImm12OpValue() local
759 bool isAdd = Imm8 >= 0; in getT2Imm8s4OpValue() local
784 bool isAdd = true; in getT2AddrModeImm8s4OpValue() local
899 bool isAdd = ARM_AM::getAM2Op(MO2.getImm()) == ARM_AM::add; in getLdStSORegOpValue() local
942 bool isAdd = ARM_AM::getAM2Op(Imm) == ARM_AM::add; in getAddrMode2OffsetOpValue() local
962 bool isAdd = MO1.getImm() != 0; in getPostIdxRegOpValue() local
976 bool isAdd = ARM_AM::getAM3Op(Imm) == ARM_AM::add; in getAddrMode3OffsetOpValue() local
998 bool isAdd = ARM_AM::getAM3Op(Imm) == ARM_AM::add; in getAddrMode3OpValue() local
1054 bool isAdd; in getAddrMode5OpValue() local
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| D | ARMAsmBackend.cpp | 218 bool isAdd = true; in adjustFixupValue() local
369 bool isAdd = true; in adjustFixupValue() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMCCodeEmitter.cpp | 571 bool isAdd = true; in EncodeAddrModeOpValues() local
890 bool isAdd = true; in getAddrModeImm12OpValue() local
948 bool isAdd = Imm8 >= 0; in getT2Imm8s4OpValue() local
974 bool isAdd = true; in getT2AddrModeImm8s4OpValue() local
1086 bool isAdd = ARM_AM::getAM2Op(MO2.getImm()) == ARM_AM::add; in getLdStSORegOpValue() local
1120 bool isAdd = ARM_AM::getAM2Op(Imm) == ARM_AM::add; in getAddrMode2OffsetOpValue() local
1141 bool isAdd = MO1.getImm() != 0; in getPostIdxRegOpValue() local
1156 bool isAdd = ARM_AM::getAM3Op(Imm) == ARM_AM::add; in getAddrMode3OffsetOpValue() local
1192 bool isAdd = ARM_AM::getAM3Op(Imm) == ARM_AM::add; in getAddrMode3OpValue() local
1252 bool isAdd; in getAddrMode5OpValue() local
[all …]
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| D | ARMAsmBackend.cpp | 431 bool isAdd = true; in adjustFixupValue() local
660 bool isAdd = true; in adjustFixupValue() local
680 bool isAdd = true; in adjustFixupValue() local
707 bool isAdd = true; in adjustFixupValue() local
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMCCodeEmitter.cpp | 560 bool isAdd = true; in EncodeAddrModeOpValues() local
879 bool isAdd = true; in getAddrModeImm12OpValue() local
937 bool isAdd = Imm8 >= 0; in getT2Imm8s4OpValue() local
963 bool isAdd = true; in getT2AddrModeImm8s4OpValue() local
1075 bool isAdd = ARM_AM::getAM2Op(MO2.getImm()) == ARM_AM::add; in getLdStSORegOpValue() local
1109 bool isAdd = ARM_AM::getAM2Op(Imm) == ARM_AM::add; in getAddrMode2OffsetOpValue() local
1130 bool isAdd = MO1.getImm() != 0; in getPostIdxRegOpValue() local
1145 bool isAdd = ARM_AM::getAM3Op(Imm) == ARM_AM::add; in getAddrMode3OffsetOpValue() local
1181 bool isAdd = ARM_AM::getAM3Op(Imm) == ARM_AM::add; in getAddrMode3OpValue() local
1241 bool isAdd; in getAddrMode5OpValue() local
[all …]
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| D | ARMAsmBackend.cpp | 410 bool isAdd = true; in adjustFixupValue() local
610 bool isAdd = true; in adjustFixupValue() local
630 bool isAdd = true; in adjustFixupValue() local
657 bool isAdd = true; in adjustFixupValue() local
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| /external/apache-commons-math/src/main/java/org/apache/commons/math/fraction/ |
| D | Fraction.java | 476 private Fraction addSub(Fraction fraction, boolean isAdd) { in addSub()
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/MC/ |
| D | MCInstrDesc.h | 247 bool isAdd() const { return Flags & (1ULL << MCID::Add); } in isAdd() function
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| /external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
| D | CodeGenInstruction.h | 234 bool isAdd : 1; variable
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 342 bool isAdd; member
1378 bool isAdd = Imm >= 0; in addPostIdxImm8Operands() local
1389 bool isAdd = Imm >= 0; in addPostIdxImm8s4Operands() local
1628 static ARMOperand *CreatePostIdxReg(unsigned RegNum, bool isAdd, in CreatePostIdxReg()
2695 bool isAdd = true; in parsePostIdxReg() local
2773 bool isAdd = true; in parseAM3Offset() local
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonHardwareLoops.cpp | 421 bool isAdd = (UpdOpc == Hexagon::A2_addi || UpdOpc == Hexagon::A2_addp); in findInductionRegister() local
1602 bool isAdd = (UpdOpc == Hexagon::A2_addi || UpdOpc == Hexagon::A2_addp); in fixupInductionVariable() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 758 bool isAdd; member
2664 bool isAdd = Imm >= 0; in addPostIdxImm8Operands() local
2675 bool isAdd = Imm >= 0; in addPostIdxImm8s4Operands() local
3138 CreatePostIdxReg(unsigned RegNum, bool isAdd, ARM_AM::ShiftOpc ShiftTy, in CreatePostIdxReg()
4858 bool isAdd = true; in parsePostIdxReg() local
4940 bool isAdd = true; in parseAM3Offset() local
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| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 524 bool isAdd; member
2392 bool isAdd = Imm >= 0; in addPostIdxImm8Operands() local
2403 bool isAdd = Imm >= 0; in addPostIdxImm8s4Operands() local
2822 CreatePostIdxReg(unsigned RegNum, bool isAdd, ARM_AM::ShiftOpc ShiftTy, in CreatePostIdxReg()
4647 bool isAdd = true; in parsePostIdxReg() local
4729 bool isAdd = true; in parseAM3Offset() local
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| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMCodeEmitter.cpp | 306 bool isAdd = true; in getAddrMode5OpValue() local
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMBaseInstrInfo.cpp | 601 bool isAdd = ARM_AM::getAM2Op(OffImm) == ARM_AM::add; in isLdstScaledRegNotPlusLsl2() local
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| /external/swiftshader/src/Reactor/ |
| D | LLVMReactor.cpp | 208 llvm::Value *lowerPSAT(llvm::Value *x, llvm::Value *y, bool isAdd, bool isSigned) in lowerPSAT()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 33700 auto combineMulShlAddOrSub = [&](int Mult, int Shift, bool isAdd) { in combineMulSpecial()
33710 auto combineMulMulAddOrSub = [&](int Mul1, int Mul2, bool isAdd) { in combineMulSpecial()
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