1 /******************************************************************************
2 * *
3 * Copyright (C) 2018 The Android Open Source Project
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at:
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 *****************************************************************************
18 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19 */
20 #include <ixheaacd_type_def.h>
21 #include "ixheaacd_sbr_common.h"
22 #include <ixheaacd_type_def.h>
23 #include "ixheaacd_bitbuffer.h"
24 #include "ixheaacd_defines.h"
25 #include <ixheaacd_aac_rom.h>
26
27 #include "ixheaacd_sbrdecsettings.h"
28 #include "ixheaacd_env_extr_part.h"
29 #include <ixheaacd_sbr_rom.h>
30
31 #include "ixheaacd_common_rom.h"
32 #include "ixheaacd_pulsedata.h"
33
34 #include "ixheaacd_pns.h"
35 #include "ixheaacd_drc_data_struct.h"
36
37 #include "ixheaacd_lt_predict.h"
38
39 #include "ixheaacd_channelinfo.h"
40 #include "ixheaacd_drc_dec.h"
41 #include "ixheaacd_sbrdecoder.h"
42
43 #include "ixheaacd_channel.h"
44
45 #include "ixheaacd_audioobjtypes.h"
46 #include "ixheaacd_memory_standards.h"
47 #include "ixheaacd_adts.h"
48 #include "ixheaacd_audioobjtypes.h"
49 #include "ixheaacd_latmdemux.h"
50 #include "ixheaacd_aacdec.h"
51
52 #include "ixheaacd_mps_polyphase.h"
53 #include "ixheaacd_config.h"
54 #include "ixheaacd_mps_dec.h"
55
56 #include "ixheaacd_struct_def.h"
57 #include "ixheaacd_error_codes.h"
58
59 #include "ixheaacd_adts_crc_check.h"
60
ixheaacd_adts_crc_open(ia_adts_crc_info_struct * ptr_adts_crc_info)61 VOID ixheaacd_adts_crc_open(ia_adts_crc_info_struct *ptr_adts_crc_info) {
62 WORD32 i, j;
63 UWORD16 val;
64
65 ptr_adts_crc_info->no_reg = 0;
66 ptr_adts_crc_info->crc_active = 0;
67
68 for (i = 0; i <= 255; ++i) {
69 for (val = i << 8, j = 8; --j >= 0;) {
70 val = (val & 0x8000) ? (val << 1) ^ 0x8005 : val << 1;
71 }
72
73 ptr_adts_crc_info->crc_lookup[i] = val;
74 }
75 }
76
ixheaacd_copy_bit_buf_state(ia_bit_buf_struct * it_bit_buff_src,ia_crc_bit_buf_struct_handle it_crc_bit_buff_dst)77 VOID ixheaacd_copy_bit_buf_state(
78 ia_bit_buf_struct *it_bit_buff_src,
79 ia_crc_bit_buf_struct_handle it_crc_bit_buff_dst) {
80 it_crc_bit_buff_dst->ptr_bit_buf_base = it_bit_buff_src->ptr_bit_buf_base;
81 it_crc_bit_buff_dst->ptr_bit_buf_end = it_bit_buff_src->ptr_bit_buf_end;
82 it_crc_bit_buff_dst->ptr_read_next = it_bit_buff_src->ptr_read_next;
83 it_crc_bit_buff_dst->bit_pos = it_bit_buff_src->bit_pos;
84 it_crc_bit_buff_dst->cnt_bits = it_bit_buff_src->cnt_bits;
85 it_crc_bit_buff_dst->size = it_bit_buff_src->size;
86 }
87
ixheaacd_adts_crc_start_reg(ia_adts_crc_info_struct * ptr_adts_crc_info,ia_bit_buf_struct * it_bit_buff_src,WORD32 no_bits)88 WORD32 ixheaacd_adts_crc_start_reg(ia_adts_crc_info_struct *ptr_adts_crc_info,
89 ia_bit_buf_struct *it_bit_buff_src,
90 WORD32 no_bits) {
91 UWORD32 no_bytes;
92
93 ptr_adts_crc_info->str_crc_reg_data[ptr_adts_crc_info->no_reg].bit_cnt = 0;
94 ptr_adts_crc_info->str_crc_reg_data[ptr_adts_crc_info->no_reg].max_bits =
95 no_bits;
96
97 if (no_bits < 0) {
98 no_bits = -no_bits;
99 }
100
101 if (no_bits == 0) {
102 no_bits = 16 << 3;
103 }
104
105 no_bytes = no_bits >> 3;
106
107 if (no_bytes << 3 < (UWORD32)no_bits) {
108 no_bytes++;
109 }
110
111 ptr_adts_crc_info->str_crc_reg_data[ptr_adts_crc_info->no_reg].buf_size =
112 no_bytes;
113 ptr_adts_crc_info->str_crc_reg_data[ptr_adts_crc_info->no_reg].active = 1;
114
115 ixheaacd_copy_bit_buf_state(
116 it_bit_buff_src,
117 &(ptr_adts_crc_info->str_crc_reg_data[ptr_adts_crc_info->no_reg]
118 .str_bit_buf));
119
120 ptr_adts_crc_info->no_reg += 1;
121
122 return (ptr_adts_crc_info->no_reg - 1);
123 }
124
ixheaacd_adts_crc_end_reg(ia_adts_crc_info_struct * ptr_adts_crc_info,ia_bit_buf_struct * it_bit_buff_src,WORD32 reg)125 VOID ixheaacd_adts_crc_end_reg(ia_adts_crc_info_struct *ptr_adts_crc_info,
126 ia_bit_buf_struct *it_bit_buff_src, WORD32 reg) {
127 ptr_adts_crc_info->str_crc_reg_data[reg].active = 0;
128 ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt =
129 ptr_adts_crc_info->str_crc_reg_data[reg].str_bit_buf.cnt_bits -
130 it_bit_buff_src->cnt_bits;
131 }
132
ixheaacd_adts_crc_fast_crc(ia_adts_crc_info_struct * ptr_adts_crc_info,UWORD16 * crc_reg,UWORD8 feed)133 VOID ixheaacd_adts_crc_fast_crc(ia_adts_crc_info_struct *ptr_adts_crc_info,
134 UWORD16 *crc_reg, UWORD8 feed) {
135 *crc_reg =
136 (*crc_reg << 8) ^ ptr_adts_crc_info->crc_lookup[(*crc_reg >> 8) ^ feed];
137 }
138
ixheaacd_adts_crc_slow_crc(UWORD16 * crc_reg,UWORD8 feed,UWORD32 no_bits)139 VOID ixheaacd_adts_crc_slow_crc(UWORD16 *crc_reg, UWORD8 feed,
140 UWORD32 no_bits) {
141 UWORD32 i;
142 UWORD16 tmp;
143 for (i = 0; i < no_bits; i++) {
144 tmp = (feed & (1 << (7 - i))) >> (7 - i);
145 tmp ^= (*crc_reg & (1 << 15)) >> 15;
146 tmp *= 32773;
147 *crc_reg <<= 1;
148 *crc_reg ^= tmp;
149 }
150 }
151
ixheaacd_adts_crc_check_crc(ia_adts_crc_info_struct * ptr_adts_crc_info)152 WORD32 ixheaacd_adts_crc_check_crc(ia_adts_crc_info_struct *ptr_adts_crc_info) {
153 WORD32 error_code = AAC_DEC_OK;
154 UWORD16 crc = 65535;
155 WORD32 reg;
156 ia_crc_reg_data_struct *ptr_reg_data;
157
158 for (reg = 0; reg < ptr_adts_crc_info->no_reg; reg++) {
159 UWORD8 bits;
160 UWORD32 bits_remaining;
161
162 ptr_reg_data = &ptr_adts_crc_info->str_crc_reg_data[reg];
163
164 if (ptr_reg_data->max_bits > 0) {
165 if (ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt >
166 ptr_reg_data->max_bits)
167 bits_remaining = ptr_reg_data->max_bits;
168 else
169 bits_remaining = ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt;
170 } else {
171 bits_remaining = ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt;
172 }
173
174 while (bits_remaining >= 8) {
175 bits = (UWORD8)ixheaacd_read_bits_buf(
176 (ia_bit_buf_struct *)(&ptr_adts_crc_info->str_crc_reg_data[reg]
177 .str_bit_buf),
178 8);
179 ixheaacd_adts_crc_fast_crc(ptr_adts_crc_info, &crc, bits);
180 bits_remaining -= 8;
181 }
182
183 bits = (UWORD8)ixheaacd_read_bits_buf(
184 (ia_bit_buf_struct *)(&ptr_adts_crc_info->str_crc_reg_data[reg]
185 .str_bit_buf),
186 bits_remaining);
187 ixheaacd_adts_crc_slow_crc(&crc, (UWORD8)(bits << (8 - bits_remaining)),
188 bits_remaining);
189
190 if (ptr_reg_data->max_bits >
191 ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt) {
192 bits_remaining = ptr_reg_data->max_bits -
193 ptr_adts_crc_info->str_crc_reg_data[reg].bit_buf_cnt;
194
195 for (; bits_remaining >= 8; bits_remaining -= 8) {
196 ixheaacd_adts_crc_fast_crc(ptr_adts_crc_info, &crc, 0);
197 }
198
199 ixheaacd_adts_crc_slow_crc(&crc, 0, bits_remaining);
200 }
201 }
202
203 ptr_adts_crc_info->no_reg = 0;
204
205 if (crc != ptr_adts_crc_info->file_value) {
206 return (IA_ENHAACPLUS_DEC_EXE_NONFATAL_ADTS_HDR_CRC_FAIL);
207 }
208
209 return (error_code);
210 }
211