1 /******************************************************************************
2 * *
3 * Copyright (C) 2018 The Android Open Source Project
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at:
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 *****************************************************************************
18 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19 */
20 #include <string.h>
21 #include <stdio.h>
22 #include <stdarg.h>
23 #include <assert.h>
24
25 #include <ixheaacd_type_def.h>
26
27 #include "ixheaacd_bitbuffer.h"
28
29 #include "ixheaacd_defines.h"
30 #include "ixheaacd_memory_standards.h"
31 #include "ixheaacd_sbrdecsettings.h"
32 #include "ixheaacd_env_extr_part.h"
33 #include "ixheaacd_aac_rom.h"
34 #include "ixheaacd_common_rom.h"
35 #include <ixheaacd_sbr_rom.h>
36 #include "ixheaacd_pulsedata.h"
37 #include "ixheaacd_pns.h"
38
39 #include "ixheaacd_sbr_common.h"
40 #include "ixheaacd_drc_data_struct.h"
41 #include "ixheaacd_drc_dec.h"
42
43 #include "ixheaacd_lt_predict.h"
44
45 #include "ixheaacd_channelinfo.h"
46 #include "ixheaacd_channel.h"
47 #include "ixheaacd_channelinfo.h"
48 #include "ixheaacd_sbrdecoder.h"
49 #include "ixheaacd_audioobjtypes.h"
50 #include "ixheaacd_latmdemux.h"
51 #include "ixheaacd_aacdec.h"
52 #include "ixheaacd_sbr_common.h"
53
54 #include "ixheaacd_mps_polyphase.h"
55 #include "ixheaacd_config.h"
56 #include "ixheaacd_mps_dec.h"
57
58 #include "ixheaacd_struct_def.h"
59
60 #include "ixheaacd_config.h"
61 #include "ixheaacd_interface.h"
62 #include "ixheaacd_info.h"
63 #include "ixheaacd_struct.h"
64 #include "ixheaacd_constants.h"
65 #include "ixheaacd_error_standards.h"
66
67 #include "ixheaacd_error_codes.h"
68
ixheaacd_sbr_ratio(UWORD32 core_sbr_framelength_idx)69 UWORD32 ixheaacd_sbr_ratio(UWORD32 core_sbr_framelength_idx) {
70 UWORD32 sbr_ratio_index = 0x0FF;
71
72 switch (core_sbr_framelength_idx) {
73 case 0:
74 case 1:
75 sbr_ratio_index = USAC_SBR_RATIO_NO_SBR;
76 break;
77 case 2:
78 sbr_ratio_index = USAC_SBR_RATIO_INDEX_8_3;
79 break;
80 case 3:
81 sbr_ratio_index = USAC_SBR_RATIO_INDEX_2_1;
82 break;
83 case 4:
84 sbr_ratio_index = USAC_SBR_RATIO_INDEX_4_1;
85 break;
86 }
87
88 return sbr_ratio_index;
89 }
90
ixheaacd_get_sample_freq_indx(WORD32 sampling_freq)91 WORD32 ixheaacd_get_sample_freq_indx(WORD32 sampling_freq) {
92 WORD32 sampling_rate_tbl[] = {96000, 88200, 64000, 48000, 44100, 32000,
93 24000, 22050, 16000, 12000, 11025, 8000,
94 7350, 0, 0, 0};
95
96 WORD32 index;
97 WORD32 tbl_size = sizeof(sampling_rate_tbl) / sizeof(WORD32) - 1;
98
99 for (index = 0; index < tbl_size; index++) {
100 if (sampling_rate_tbl[index] == sampling_freq) break;
101 }
102
103 if (index > tbl_size) {
104 return tbl_size - 1;
105 }
106
107 return index;
108 }
ixheaacd_sbr_params(UWORD32 core_sbr_framelength_idx,WORD32 * output_framelength,WORD32 * block_size,WORD32 * output_samples,WORD32 * sample_rate_layer,UWORD32 * sample_freq_indx)109 UWORD32 ixheaacd_sbr_params(UWORD32 core_sbr_framelength_idx,
110 WORD32 *output_framelength, WORD32 *block_size,
111 WORD32 *output_samples, WORD32 *sample_rate_layer,
112 UWORD32 *sample_freq_indx) {
113 UWORD32 sbr_ratio_index = 0x0FF;
114
115 *output_framelength = -1;
116
117 switch (core_sbr_framelength_idx) {
118 case 0:
119 sbr_ratio_index = USAC_SBR_RATIO_NO_SBR;
120 *output_framelength = USAC_OUT_FRAMELENGTH_768;
121 *block_size = 768;
122 *output_samples = *block_size;
123 break;
124 case 1:
125 sbr_ratio_index = USAC_SBR_RATIO_NO_SBR;
126 *output_framelength = USAC_OUT_FRAMELENGTH_1024;
127 *block_size = 1024;
128 *output_samples = *block_size;
129 break;
130 case 2:
131 sbr_ratio_index = USAC_SBR_RATIO_INDEX_8_3;
132 *output_framelength = USAC_OUT_FRAMELENGTH_2048;
133 *block_size = 768;
134 *output_samples = (*block_size * 8) / 3;
135 *sample_rate_layer = (*sample_rate_layer * 3) >> 3;
136 break;
137 case 3:
138 sbr_ratio_index = USAC_SBR_RATIO_INDEX_2_1;
139 *output_framelength = USAC_OUT_FRAMELENGTH_2048;
140 *block_size = 1024;
141 *output_samples = *block_size * 2;
142 *sample_rate_layer = *sample_rate_layer >> 1;
143 break;
144 case 4:
145 sbr_ratio_index = USAC_SBR_RATIO_INDEX_4_1;
146 *output_framelength = USAC_OUT_FRAMELENGTH_4096;
147 *block_size = 1024;
148 *output_samples = *block_size * 4;
149 *sample_rate_layer = *sample_rate_layer >> 2;
150 break;
151 }
152
153 *sample_freq_indx = ixheaacd_get_sample_freq_indx(*sample_rate_layer);
154
155 return sbr_ratio_index;
156 }
157
ixheaacd_read_escape_value(ia_bit_buf_struct * it_bit_buff,UWORD32 * ext_ele_value,UWORD32 no_bits1,UWORD32 no_bits2,UWORD32 no_bits3)158 VOID ixheaacd_read_escape_value(ia_bit_buf_struct *it_bit_buff,
159 UWORD32 *ext_ele_value, UWORD32 no_bits1,
160 UWORD32 no_bits2, UWORD32 no_bits3) {
161 UWORD32 value = 0;
162 UWORD32 val_add = 0;
163 UWORD32 max_val1 = (1 << no_bits1) - 1;
164 UWORD32 max_val2 = (1 << no_bits2) - 1;
165
166 value = ixheaacd_read_bits_buf(it_bit_buff, no_bits1);
167
168 if (value == max_val1) {
169 val_add = ixheaacd_read_bits_buf(it_bit_buff, no_bits2);
170
171 value += val_add;
172
173 if (val_add == max_val2) {
174 val_add = ixheaacd_read_bits_buf(it_bit_buff, no_bits3);
175
176 value += val_add;
177 }
178 }
179
180 *ext_ele_value = value;
181 }
182
ixheaacd_get_usac_chan_conf(ia_usac_config_struct * pstr_usac_config,UWORD32 ch_config_index)183 static VOID ixheaacd_get_usac_chan_conf(ia_usac_config_struct *pstr_usac_config,
184 UWORD32 ch_config_index) {
185 switch (ch_config_index) {
186 case 1:
187 pstr_usac_config->num_out_channels = 1;
188 pstr_usac_config->output_channel_pos[0] = BS_OUTPUT_CHANNEL_POS_C;
189 break;
190 case 2:
191 pstr_usac_config->num_out_channels = 2;
192 pstr_usac_config->output_channel_pos[0] = BS_OUTPUT_CHANNEL_POS_L;
193 pstr_usac_config->output_channel_pos[1] = BS_OUTPUT_CHANNEL_POS_R;
194 break;
195
196 default:
197 assert(0);
198 break;
199 }
200 }
201
ixheaacd_sbr_config(ia_bit_buf_struct * it_bit_buff,ia_usac_dec_sbr_config_struct * pstr_usac_sbr_config)202 VOID ixheaacd_sbr_config(ia_bit_buf_struct *it_bit_buff,
203 ia_usac_dec_sbr_config_struct *pstr_usac_sbr_config) {
204 pstr_usac_sbr_config->harmonic_sbr = ixheaacd_read_bits_buf(it_bit_buff, 1);
205 pstr_usac_sbr_config->bs_inter_tes = ixheaacd_read_bits_buf(it_bit_buff, 1);
206 pstr_usac_sbr_config->bs_pvc = ixheaacd_read_bits_buf(it_bit_buff, 1);
207 pstr_usac_sbr_config->dflt_start_freq =
208 ixheaacd_read_bits_buf(it_bit_buff, 4);
209
210 pstr_usac_sbr_config->dflt_stop_freq = ixheaacd_read_bits_buf(it_bit_buff, 4);
211 pstr_usac_sbr_config->dflt_header_extra1 =
212 ixheaacd_read_bits_buf(it_bit_buff, 1);
213 pstr_usac_sbr_config->dflt_header_extra2 =
214 ixheaacd_read_bits_buf(it_bit_buff, 1);
215
216 if (pstr_usac_sbr_config->dflt_header_extra1) {
217 pstr_usac_sbr_config->dflt_freq_scale =
218 ixheaacd_read_bits_buf(it_bit_buff, 2);
219 pstr_usac_sbr_config->dflt_alter_scale =
220 ixheaacd_read_bits_buf(it_bit_buff, 1);
221 pstr_usac_sbr_config->dflt_noise_bands =
222 ixheaacd_read_bits_buf(it_bit_buff, 2);
223 }
224
225 if (pstr_usac_sbr_config->dflt_header_extra2) {
226 pstr_usac_sbr_config->dflt_limiter_bands =
227 ixheaacd_read_bits_buf(it_bit_buff, 2);
228 pstr_usac_sbr_config->dflt_limiter_gains =
229 ixheaacd_read_bits_buf(it_bit_buff, 2);
230 pstr_usac_sbr_config->dflt_interpol_freq =
231 ixheaacd_read_bits_buf(it_bit_buff, 1);
232 pstr_usac_sbr_config->dflt_smoothing_mode =
233 ixheaacd_read_bits_buf(it_bit_buff, 1);
234 }
235 }
236
ixheaacd_ext_element_config(ia_bit_buf_struct * it_bit_buff,ia_usac_dec_element_config_struct * pstr_usac_element_config,UWORD8 * ptr_usac_ext_ele_payload,WORD32 * ptr_usac_ext_ele_payload_len,WORD32 * preroll_flag)237 WORD32 ixheaacd_ext_element_config(
238 ia_bit_buf_struct *it_bit_buff,
239 ia_usac_dec_element_config_struct *pstr_usac_element_config,
240 UWORD8 *ptr_usac_ext_ele_payload, WORD32 *ptr_usac_ext_ele_payload_len,
241 WORD32 *preroll_flag) {
242 UWORD32 usac_ext_element_type, usac_ext_element_config_length, flag;
243
244 UWORD32 i;
245
246 ixheaacd_read_escape_value(it_bit_buff, &(usac_ext_element_type), 4, 8, 16);
247
248 ixheaacd_read_escape_value(it_bit_buff, &(usac_ext_element_config_length), 4,
249 8, 16);
250 if (usac_ext_element_config_length >= 768) return -1;
251
252 flag = ixheaacd_read_bits_buf(it_bit_buff, 1);
253
254 *ptr_usac_ext_ele_payload_len = 0;
255
256 if (flag) {
257 ixheaacd_read_escape_value(
258 it_bit_buff,
259 (UWORD32 *)(&(pstr_usac_element_config->usac_ext_eleme_def_len)), 8, 16,
260 0);
261 pstr_usac_element_config->usac_ext_eleme_def_len += 1;
262
263 } else {
264 pstr_usac_element_config->usac_ext_eleme_def_len = 0;
265 }
266
267 pstr_usac_element_config->usac_ext_elem_pld_frag =
268 ixheaacd_read_bits_buf(it_bit_buff, 1);
269
270 switch (usac_ext_element_type) {
271 case ID_EXT_ELE_FILL:
272 break;
273 case ID_EXT_ELE_AUDIOPREROLL:
274 *preroll_flag = 1;
275 break;
276 case ID_EXT_ELE_UNI_DRC:
277 for (i = 0; i < usac_ext_element_config_length; i++) {
278 ptr_usac_ext_ele_payload[i] = ixheaacd_read_bits_buf(it_bit_buff, 8);
279 }
280 *ptr_usac_ext_ele_payload_len = usac_ext_element_config_length;
281 break;
282
283 default:
284 if ((it_bit_buff->cnt_bits >> 3) < (WORD32)usac_ext_element_config_length)
285 return -1;
286 it_bit_buff->ptr_read_next += usac_ext_element_config_length;
287 it_bit_buff->cnt_bits -= (usac_ext_element_config_length << 3);
288
289 break;
290 }
291
292 return 0;
293 }
294
ixheaacd_mps212_config(ia_bit_buf_struct * it_bit_buff,ia_usac_dec_mps_config_struct * pstr_usac_mps212_config,WORD32 stereo_config_index)295 VOID ixheaacd_mps212_config(
296 ia_bit_buf_struct *it_bit_buff,
297 ia_usac_dec_mps_config_struct *pstr_usac_mps212_config,
298 WORD32 stereo_config_index) {
299 pstr_usac_mps212_config->bs_freq_res = ixheaacd_read_bits_buf(it_bit_buff, 3);
300
301 pstr_usac_mps212_config->bs_fixed_gain_dmx =
302 ixheaacd_read_bits_buf(it_bit_buff, 3);
303
304 pstr_usac_mps212_config->bs_temp_shape_config =
305 ixheaacd_read_bits_buf(it_bit_buff, 2);
306
307 pstr_usac_mps212_config->bs_decorr_config =
308 ixheaacd_read_bits_buf(it_bit_buff, 2);
309
310 pstr_usac_mps212_config->bs_high_rate_mode =
311 ixheaacd_read_bits_buf(it_bit_buff, 1);
312
313 pstr_usac_mps212_config->bs_phase_coding =
314 ixheaacd_read_bits_buf(it_bit_buff, 1);
315
316 pstr_usac_mps212_config->bs_ott_bands_phase_present =
317 ixheaacd_read_bits_buf(it_bit_buff, 1);
318
319 if (pstr_usac_mps212_config->bs_ott_bands_phase_present) {
320 pstr_usac_mps212_config->bs_ott_bands_phase =
321 ixheaacd_read_bits_buf(it_bit_buff, 5);
322 }
323
324 if (stereo_config_index > 1) {
325 pstr_usac_mps212_config->bs_residual_bands =
326 ixheaacd_read_bits_buf(it_bit_buff, 5);
327
328 pstr_usac_mps212_config->bs_ott_bands_phase =
329 max(pstr_usac_mps212_config->bs_ott_bands_phase,
330 pstr_usac_mps212_config->bs_residual_bands);
331
332 pstr_usac_mps212_config->bs_pseudo_lr =
333 ixheaacd_read_bits_buf(it_bit_buff, 1);
334 }
335
336 if (pstr_usac_mps212_config->bs_temp_shape_config == 2)
337 pstr_usac_mps212_config->bs_env_quant_mode =
338 ixheaacd_read_bits_buf(it_bit_buff, 1);
339 }
340
ixheaacd_cpe_config(ia_bit_buf_struct * it_bit_buff,ia_usac_dec_element_config_struct * pstr_usac_element_config,WORD32 sbr_ratio_index)341 VOID ixheaacd_cpe_config(
342 ia_bit_buf_struct *it_bit_buff,
343 ia_usac_dec_element_config_struct *pstr_usac_element_config,
344 WORD32 sbr_ratio_index) {
345 pstr_usac_element_config->tw_mdct = ixheaacd_read_bits_buf(it_bit_buff, 1);
346 pstr_usac_element_config->noise_filling =
347 ixheaacd_read_bits_buf(it_bit_buff, 1);
348
349 if (sbr_ratio_index > 0) {
350 ixheaacd_sbr_config(it_bit_buff,
351 &(pstr_usac_element_config->str_usac_sbr_config));
352 pstr_usac_element_config->stereo_config_index =
353 ixheaacd_read_bits_buf(it_bit_buff, 2);
354
355 } else {
356 pstr_usac_element_config->stereo_config_index = 0;
357 }
358
359 if (pstr_usac_element_config->stereo_config_index > 0)
360 ixheaacd_mps212_config(it_bit_buff,
361 &(pstr_usac_element_config->str_usac_mps212_config),
362 pstr_usac_element_config->stereo_config_index);
363 }
364
ixheaacd_decoder_config(ia_bit_buf_struct * it_bit_buff,ia_usac_decoder_config_struct * pstr_usac_decoder_config,WORD32 sbr_ratio_index,UINT32 * chan)365 WORD32 ixheaacd_decoder_config(
366 ia_bit_buf_struct *it_bit_buff,
367 ia_usac_decoder_config_struct *pstr_usac_decoder_config,
368 WORD32 sbr_ratio_index, UINT32 *chan) {
369 UWORD32 elem_idx = 0;
370 UWORD32 err = 0;
371
372 ixheaacd_read_escape_value(
373 it_bit_buff, &(pstr_usac_decoder_config->num_elements), 4, 8, 16);
374 pstr_usac_decoder_config->num_elements += 1;
375 pstr_usac_decoder_config->preroll_flag = 0;
376
377 if (pstr_usac_decoder_config->num_elements > USAC_MAX_ELEMENTS) {
378 return -1;
379 }
380
381 for (elem_idx = 0; elem_idx < pstr_usac_decoder_config->num_elements;
382 elem_idx++) {
383 ia_usac_dec_element_config_struct *pstr_usac_element_config =
384 &(pstr_usac_decoder_config->str_usac_element_config[elem_idx]);
385
386 pstr_usac_decoder_config->usac_element_type[elem_idx] =
387 ixheaacd_read_bits_buf(it_bit_buff, 2);
388
389 switch (pstr_usac_decoder_config->usac_element_type[elem_idx]) {
390 case ID_USAC_SCE:
391
392 pstr_usac_element_config->tw_mdct =
393 ixheaacd_read_bits_buf(it_bit_buff, 1);
394 pstr_usac_element_config->noise_filling =
395 ixheaacd_read_bits_buf(it_bit_buff, 1);
396
397 if (sbr_ratio_index > 0)
398 ixheaacd_sbr_config(it_bit_buff,
399 &(pstr_usac_element_config->str_usac_sbr_config));
400
401 break;
402
403 case ID_USAC_CPE:
404 ixheaacd_cpe_config(it_bit_buff, pstr_usac_element_config,
405 sbr_ratio_index);
406 if (pstr_usac_element_config->stereo_config_index > 1 && *chan < 2)
407 return -1;
408
409 break;
410
411 case ID_USAC_LFE:
412
413 pstr_usac_element_config->tw_mdct = 0;
414 pstr_usac_element_config->noise_filling = 0;
415 break;
416
417 case ID_USAC_EXT:
418 err = ixheaacd_ext_element_config(
419 it_bit_buff, pstr_usac_element_config,
420 &pstr_usac_decoder_config->usac_ext_ele_payload_buf[elem_idx][0],
421 &pstr_usac_decoder_config->usac_ext_ele_payload_len[elem_idx],
422 &(pstr_usac_decoder_config->preroll_flag));
423
424 if (pstr_usac_decoder_config->usac_ext_ele_payload_len[elem_idx] > 0) {
425 pstr_usac_decoder_config->usac_ext_ele_payload_present[elem_idx] = 1;
426 } else {
427 pstr_usac_decoder_config->usac_ext_ele_payload_present[elem_idx] = 0;
428 }
429 if (err != 0) return -1;
430 break;
431 default:
432 return -1;
433 break;
434 }
435 }
436 return err;
437 }
438
ixheaacd_config_extension(ia_bit_buf_struct * it_bit_buff,ia_usac_decoder_config_struct * pstr_usac_decoder_config)439 WORD32 ixheaacd_config_extension(
440 ia_bit_buf_struct *it_bit_buff,
441 ia_usac_decoder_config_struct *pstr_usac_decoder_config) {
442 UWORD32 i, j;
443 UWORD32 num_config_extensions;
444 UWORD32 usac_config_ext_type, usac_config_ext_len;
445
446 ixheaacd_read_escape_value(it_bit_buff, &(num_config_extensions), 2, 4, 8);
447 num_config_extensions += 1;
448 if (USAC_MAX_CONFIG_EXTENSIONS < num_config_extensions) {
449 return -1;
450 }
451
452 pstr_usac_decoder_config->num_config_extensions = num_config_extensions;
453 memset(pstr_usac_decoder_config->usac_cfg_ext_info_len, 0,
454 USAC_MAX_CONFIG_EXTENSIONS * sizeof(WORD32));
455 memset(pstr_usac_decoder_config->usac_cfg_ext_info_present, 0,
456 USAC_MAX_CONFIG_EXTENSIONS * sizeof(WORD32));
457
458 for (j = 0; j < num_config_extensions; j++) {
459 UWORD32 tmp;
460 UWORD32 fill_byte_val = 0xa5;
461
462 ixheaacd_read_escape_value(it_bit_buff, &(usac_config_ext_type), 4, 8, 16);
463 ixheaacd_read_escape_value(it_bit_buff, &(usac_config_ext_len), 4, 8, 16);
464
465 switch (usac_config_ext_type) {
466 case ID_CONFIG_EXT_FILL:
467 for (i = 0; i < usac_config_ext_len; i++) {
468 fill_byte_val = ixheaacd_read_bits_buf(it_bit_buff, 8);
469 if (fill_byte_val != 0xa5) return -1;
470 }
471 break;
472 default:
473 if ((WORD32)usac_config_ext_len > (it_bit_buff->cnt_bits >> 3)) {
474 return -1;
475 }
476 if (ID_CONFIG_EXT_LOUDNESS_INFO == usac_config_ext_type) {
477 for (i = 0; i < usac_config_ext_len; i++) {
478 UWORD8 byte_val = ixheaacd_read_bits_buf(it_bit_buff, 8);
479 pstr_usac_decoder_config->usac_cfg_ext_info_buf[j][i] = byte_val;
480 }
481 pstr_usac_decoder_config->usac_cfg_ext_info_len[j] =
482 usac_config_ext_len;
483 pstr_usac_decoder_config->usac_cfg_ext_info_present[j] = 1;
484 } else {
485 for (i = 0; i < usac_config_ext_len; i++)
486 tmp = ixheaacd_read_bits_buf(it_bit_buff, 8);
487 }
488 break;
489 }
490 }
491
492 return 0;
493 }
494
ixheaacd_config(ia_bit_buf_struct * it_bit_buff,ia_usac_config_struct * pstr_usac_conf,UINT32 * chan)495 WORD32 ixheaacd_config(ia_bit_buf_struct *it_bit_buff,
496 ia_usac_config_struct *pstr_usac_conf, UINT32 *chan) {
497 WORD32 tmp, err;
498 err = 0;
499
500 pstr_usac_conf->usac_sampling_frequency_index =
501 ixheaacd_read_bits_buf(it_bit_buff, 5);
502
503 if (pstr_usac_conf->usac_sampling_frequency_index == 0x1f) {
504 pstr_usac_conf->usac_sampling_frequency =
505 ixheaacd_read_bits_buf(it_bit_buff, 24);
506
507 if (pstr_usac_conf->usac_sampling_frequency > USAC_MAX_SAMPLE_RATE) {
508 return IA_FATAL_ERROR;
509 }
510
511 } else {
512 static const WORD32 sampling_rate_tbl[] = {
513 96000, 88200, 64000, 48000, 44100, 32000, 24000, 22050,
514 16000, 12000, 11025, 8000, 7350, 0, 0, 57600,
515 51200, 40000, 38400, 34150, 28800, 25600, 20000, 19200,
516 17075, 14400, 12800, 9600, 0, 0, 0};
517
518 pstr_usac_conf->usac_sampling_frequency =
519 sampling_rate_tbl[pstr_usac_conf->usac_sampling_frequency_index];
520 }
521
522 pstr_usac_conf->core_sbr_framelength_index =
523 ixheaacd_read_bits_buf(it_bit_buff, 3);
524
525 if (pstr_usac_conf->core_sbr_framelength_index > MAX_CORE_SBR_FRAME_LEN_IDX)
526 return -1;
527
528 pstr_usac_conf->channel_configuration_index =
529 ixheaacd_read_bits_buf(it_bit_buff, 5);
530 if (pstr_usac_conf->channel_configuration_index >= 3) return -1;
531
532 if (pstr_usac_conf->channel_configuration_index == 0) {
533 UWORD32 i;
534
535 ixheaacd_read_escape_value(it_bit_buff,
536 (UWORD32 *)(&(pstr_usac_conf->num_out_channels)),
537 5, 8, 16);
538 if (BS_MAX_NUM_OUT_CHANNELS < pstr_usac_conf->num_out_channels) {
539 return IA_ENHAACPLUS_DEC_INIT_FATAL_STREAM_CHAN_GT_MAX;
540 }
541 for (i = 0; i < pstr_usac_conf->num_out_channels; i++)
542 pstr_usac_conf->output_channel_pos[i] =
543 ixheaacd_read_bits_buf(it_bit_buff, 5);
544
545 } else {
546 ixheaacd_get_usac_chan_conf(pstr_usac_conf,
547 pstr_usac_conf->channel_configuration_index);
548 }
549
550 err = ixheaacd_decoder_config(
551 it_bit_buff, &(pstr_usac_conf->str_usac_dec_config),
552 ixheaacd_sbr_ratio(pstr_usac_conf->core_sbr_framelength_index), chan);
553 if (err != 0) return -1;
554
555 tmp = ixheaacd_read_bits_buf(it_bit_buff, 1);
556
557 if (tmp) {
558 err = ixheaacd_config_extension(it_bit_buff,
559 &pstr_usac_conf->str_usac_dec_config);
560 if (err != 0) return -1;
561 }
562
563 return err;
564 }
565
ixheaacd_conf_default(ia_usac_config_struct * pstr_usac_conf)566 VOID ixheaacd_conf_default(ia_usac_config_struct *pstr_usac_conf) {
567 WORD32 i;
568
569 pstr_usac_conf->num_out_channels = 0;
570
571 for (i = 0; i < BS_MAX_NUM_OUT_CHANNELS; i++)
572 pstr_usac_conf->output_channel_pos[i] = BS_OUTPUT_CHANNEL_POS_NA;
573
574 pstr_usac_conf->str_usac_dec_config.num_elements = 0;
575
576 for (i = 0; i < USAC_MAX_ELEMENTS; i++)
577 pstr_usac_conf->str_usac_dec_config.usac_element_type[i] = ID_USAC_INVALID;
578
579 return;
580 }
581